JPS5972023U - Pop noise removal circuit - Google Patents

Pop noise removal circuit

Info

Publication number
JPS5972023U
JPS5972023U JP16802382U JP16802382U JPS5972023U JP S5972023 U JPS5972023 U JP S5972023U JP 16802382 U JP16802382 U JP 16802382U JP 16802382 U JP16802382 U JP 16802382U JP S5972023 U JPS5972023 U JP S5972023U
Authority
JP
Japan
Prior art keywords
power supply
noise removal
supply voltage
removal circuit
pop noise
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16802382U
Other languages
Japanese (ja)
Inventor
前田　龍国
Original Assignee
クラリオン株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by クラリオン株式会社 filed Critical クラリオン株式会社
Priority to JP16802382U priority Critical patent/JPS5972023U/en
Publication of JPS5972023U publication Critical patent/JPS5972023U/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本考案の一実施例を示す回路図、第２図及び第
３図は該実施例の動作説明図である。 １・・・メイン回路、２・・・最終段バッファ増幅器、
５・・・電源制御回路。FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIGS. 2 and 3 are diagrams illustrating the operation of the embodiment. 1... Main circuit, 2... Final stage buffer amplifier,
5...Power control circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] メイン回路にショーテイング型スイッチを介して電源を
接続すると共に最終段バッファ増幅器にはトランジスタ
を介して上記電源を接続し、上記スイッチによる電源オ
ン時に上記増幅器の電源電圧をメイン回路の電源電圧よ
り遅く立上るようにし、かつ上記スイッチによる電源オ
フ時に上記増幅器の電源電圧をメイン回路の電源電圧よ
り早く立下るように構成したことを特徴とするポツプ音
除去回路。A power supply is connected to the main circuit through a shorting type switch, and the power supply is connected to the final stage buffer amplifier through a transistor, and when the power is turned on by the switch, the power supply voltage of the amplifier is set to be slower than the power supply voltage of the main circuit. and is configured such that the power supply voltage of the amplifier falls earlier than the power supply voltage of the main circuit when the power is turned off by the switch.
JP16802382U 1982-11-08 1982-11-08 Pop noise removal circuit Pending JPS5972023U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16802382U JPS5972023U (en) 1982-11-08 1982-11-08 Pop noise removal circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16802382U JPS5972023U (en) 1982-11-08 1982-11-08 Pop noise removal circuit

Publications (1)

Publication Number Publication Date
JPS5972023U true JPS5972023U (en) 1984-05-16

Family

ID=30367440

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16802382U Pending JPS5972023U (en) 1982-11-08 1982-11-08 Pop noise removal circuit

Country Status (1)

Country Link
JP (1) JPS5972023U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5340739B1 (en) * 1968-11-14 1978-10-28

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5340739B1 (en) * 1968-11-14 1978-10-28

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