JPS5836497B2 - hand tai souchi no seizou houhou - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor device, and particularly to a method for forming multilayer wiring therein.

In integrated circuits, wiring is becoming more multi-layered as the degree of integration increases.In order to achieve multi-layer wiring, through holes are provided in desired areas to connect the first layer (lower layer) wiring and the second layer (upper layer) wiring. It becomes necessary to make contact with

In conventional integrated circuits, in order to make this contact, the area where the contact is made between the first layer aluminum wiring and the second layer aluminum wiring is made wide, and this area is used to connect the two to deal with problems such as misalignment. was.

To explain this with reference to Fig. 1, a is a plan view and b is a plan view.
are cross-sectional views, and in these figures, 1 is a silicon semiconductor substrate, 2 is an insulating film of silicon dioxide, 3 is a first layer aluminum wiring pattern, and 4 is PSG (phosphorus silicate glass).
The insulating film 4a is a contact window opened in this PSG film, and 5 is a second layer aluminum film formed on the upper surface of the insulating film.

As shown in this figure, the first layer wiring 3 has a wide area portion 3a in the contact portion, and the cut second layer wiring 5 has a wide area portion 5a equal to or larger than that of the first layer wiring in the contact portion. In preparation, both wirings 3 and 5 are connected through a window 4a made in the PSG film 4 where these portions 3a and 5a overlap.
are connected.

In this way, widening the wiring area of the contact part is
Due to the following reasons.

That is, this multilayer wiring is made by depositing aluminum on an insulating film 2 with electrode windows, patterning it to form the first wiring 3, then growing a PSG film over the entire surface, and patterning it. Then open a window 4a in the contact part,
If the contact area is not wide-area, the accuracy of mask alignment will be poor, as shown in Figure 5a.
1rma. ,) Is it true? 2nd layer wiring 5
However, as shown in the figure, there is a risk that a disconnection 5a may occur at the sharp edge 3a caused by the etching of the exposed first layer wiring 3.

In order to avoid this, as shown in FIG.
must be able to be formed on the first layer aluminum wiring.

The reason why the second layer wiring 5 on the upper layer is provided with a wide area portion wider than that of the first layer wiring is because this wide area portion 5a is provided with the window 4a.
This is to completely cover the first layer wiring and prevent the first layer wiring from being attacked during etching for forming the second layer wiring.

For this reason, the contact portions of both the first and second layer wirings 3 and 5 require wide area portions 3a and 5a, which hinders the improvement of the degree of integration.

The present invention aims to solve these problems and provide a wiring forming method that allows easy alignment.

The present invention provides a method for manufacturing a semiconductor device having multilayer wiring, in which a metal material for wiring is deposited and patterned, and a first
A polyimide film is formed on the entire surface with the resist used for patterning remaining, and then the resist is removed and the periphery of the first interconnect is filled with a polyimide film, and then a PSG film is applied over the entire surface. Then, the PSG film of the part of the first wiring that makes contact with the second wiring is removed, and then a conductive material that is not attacked by the etching solution for the metal material for the wiring is coated on the entire surface. The method further includes the step of depositing and patterning the metal material for wiring to form a second wiring, and further etching and removing the film of the conductive material exposed between the second wirings. Next, this will be explained in detail with reference to an example.

Figures 2 to 4 show the main steps of the manufacturing method of the present invention,
In these figures, the same parts as in FIG. 1 are given the same reference numerals.

In the present invention, first, as shown in FIG. 2, the periphery of the first layer wiring 3 is filled with a polyimide insulating film 11 to flatten it so that no sharp corners are formed at the edges of the first layer wiring.

The area around the first layer wiring 3 is filled with a polyimide film as follows.

After etching the first layer wiring, the resist was left behind.
A polyimide solution is applied to the entire surface in step t, but since the resist surface is water repellent, the polyimide hardly adheres, and only adheres to the areas where the film is not present and between the first layer wiring patterns.

Furthermore, if the resist is removed and heat treated to form a film, a polyimide film 11 shown in FIG. 2 is obtained.

After the recesses between the first layer wiring patterns are filled with the polyimide film and flattened, the PSG film 12 is extended to a certain extent over the entire surface.

Next, as shown in FIG. 3, the PSG film 12 on the contact portion of the first layer wiring 3 is removed to open a contact window 12a.

In FIG. 3, the contact window 12a is made wider than the first layer wiring 3, but it may have the same width or a narrower width, or it may not be aligned with the first layer wiring 3 and may be slightly shifted.

Although in FIG. 3 as well as in FIG. 1 and FIG. 2 the contact portion of the first layer wiring 3 has a wide area, it may have the same width as the other wiring portions.

The through holes are not limited to the first layer wiring as shown in FIG.

Even if the area is wide, the surface other than the first layer wiring is made of polyimide, and the insulating film 2 will not be etched even when opening a through hole.

Next, in the present invention, the PSG film 12 button and its contact window 1
Polyimide film 11 and first layer wiring 3 exposed in 2a
A conductive film 13 is formed by thinly depositing a conductive material such as polysilicon or titanium on the entire surface of the substrate.

This conductive material may be a metal material for wiring, in this case aluminum, as long as it is not etched by the etching solution, has low electrical resistance, and makes good ohmic contact with the metal material for wiring. Alternatively, it may be made of other materials than titanium.

After this conductive film 13 is deposited, aluminum is deposited for second layer wiring to form a film 14.

Next, the film 14 is patterned by photoprocessing, and the fourth
A second layer wiring 5 is formed as shown in the figure.

Next, the conductive film 13 is etched using the second layer wiring 5 as a mask, and all parts except the conductive film 13 under the second layer wiring 5 are removed.

In this method, even if the film 14 is slightly over-etched when etching to form the second layer wiring, the conductive film 13 prevents the etching, so that the underlying wiring 3 will not be damaged.

Therefore, even if the second layer wiring 5 is narrower than the first layer wiring 3 as shown in FIG.
, 5 are slightly shifted from each other, and even if the contact portions of the wirings 3 and 5 do not have large area areas, the first and second layer wirings can be contacted without any problem.

? The contact between the first-layer wiring 3 and the second-layer wiring 5 can be simply heat-treated. For example, when the materials of the first and second-layer wiring are aluminum and the conductive film 13 is polysilicon, the two can be easily alloyed by this heat treatment. Make good ohmic contact.

The same applies when the conductive film 13 is made of titanium.

As is well known, phosphoric acid is used for etching aluminum films, and a mixed solution of hydrofluoric acid and nitric acid is used for etching polysilicon.
Hydrofluoric acid is used for etching titanium, and hydrofluoric acid is used for etching PSG film.

Note that the polyide film is acid-resistant and will not be attacked during etching of the conductive film 13.

As explained in detail above, according to the present invention, there is no need to make the wiring contact portion large in area, so the degree of integration can be improved, and there is no need to increase the precision of alignment, which increases work efficiency. , manufacturing yield can be improved.

Furthermore, the present invention can be applied to conventional methods, and has the advantage of not requiring alignment accuracy during second layer wiring.

[Brief explanation of drawings]

Figures 1a and b are plan views and cross-sectional views showing contact parts of multilayer wiring, Figures 2, 3, and 4a and b
FIG. 5 is a sectional view and a plan view illustrating the steps of the manufacturing method of the present invention, and FIG. In the figure, 3 is a first wiring, 5 is a second wiring, 11 is a polyimide film, 4 is a PSG film, and 13 is a film of a conductive material.

Claims (1)

[Claims] 1. In a method for manufacturing a semiconductor device including multilayer wiring,
A metal material for wiring is deposited and patterned to form a first wiring, and polyimide is applied to the entire surface with the resist used for patterning remaining, and then the resist is removed to form the first wiring. The periphery of the first wiring is filled with a polyimide film, then a PSG film is made to extend to a certain extent over the entire surface, the PSG film is removed from the portion of the first wiring that makes contact with the second wiring, and then the first wiring is covered with a polyimide film. After depositing a conductive material that is not attacked by the etching solution for the metal material used for wiring, the metal material for wiring is deposited and patterned. A method for manufacturing a semiconductor device, comprising the step of etching and removing the film of the conductive material.