JPS5835376B2 - hybrid integrated circuit board - Google Patents

hybrid integrated circuit board

Info

Publication number
JPS5835376B2
JPS5835376B2 JP52133330A JP13333077A JPS5835376B2 JP S5835376 B2 JPS5835376 B2 JP S5835376B2 JP 52133330 A JP52133330 A JP 52133330A JP 13333077 A JP13333077 A JP 13333077A JP S5835376 B2 JPS5835376 B2 JP S5835376B2
Authority
JP
Japan
Prior art keywords
integrated circuit
hybrid integrated
circuit board
crack
oxide film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP52133330A
Other languages
Japanese (ja)
Other versions
JPS5466462A (en
Inventor
武雄 近藤
勝利 内田
明 風見
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Original Assignee
Tokyo Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Sanyo Electric Co Ltd, Sanyo Denki Co Ltd filed Critical Tokyo Sanyo Electric Co Ltd
Priority to JP52133330A priority Critical patent/JPS5835376B2/en
Publication of JPS5466462A publication Critical patent/JPS5466462A/en
Publication of JPS5835376B2 publication Critical patent/JPS5835376B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Insulated Metal Substrates For Printed Circuits (AREA)
  • Laminated Bodies (AREA)

Description

【発明の詳細な説明】 本発明は混成集積回路基板に関する。[Detailed description of the invention] The present invention relates to hybrid integrated circuit boards.

既に特公昭46−13234号公報でアルミニウム基板
の表面を陽極酸化して酸化膜を形成した混成集積回路基
板を提案した。
Japanese Patent Publication No. 46-13234 has already proposed a hybrid integrated circuit board in which an oxide film is formed by anodizing the surface of an aluminum substrate.

斯る混成集積回路基板はセラミックに比べて良熱伝導性
であるため放熱性が良く高出力の混成集積回路を実現で
きる。
Since such a hybrid integrated circuit board has better thermal conductivity than ceramic, it has better heat dissipation and can realize a high output hybrid integrated circuit.

しかしながら斯る基板の電気的な絶縁は主として酸化膜
に依存しているので、酸化膜にクラック(割れ)が発生
するとクラック内に侵入した水分あるいは半田工程での
フラックスによって基板上に形成された回路とアルミニ
ウム基板との間にリーク電流が発生したり最悪の場合シ
ョートする危惧を有している。
However, the electrical insulation of such a board depends mainly on the oxide film, so if a crack occurs in the oxide film, the circuit formed on the board may be damaged by moisture that has entered the crack or flux from the soldering process. There is a risk that leakage current may occur between the aluminum substrate and the aluminum substrate, or in the worst case, a short circuit may occur.

本発明は端上した点に鑑みてなされ、絶縁性の良い混成
集積回路基板を提供することにある。
The present invention has been made in view of the above points, and an object thereof is to provide a hybrid integrated circuit board with good insulation.

以下図面を参照して本発明の一実施例を詳述する。An embodiment of the present invention will be described in detail below with reference to the drawings.

本発明に依る混成集積回路基板は図示する如く、アルミ
ニウム等の良熱伝導性の金属基板1、基板1表面を陽極
酸化して形成した酸化アルミニウムの如き酸化膜2、高
温処理工程iとで発生した酸化膜2のクラック3、本発
明の特徴であるクラック3内に含浸されたシリコンオイ
ル等の液状絶縁物4より構成されている。
As shown in the figure, the hybrid integrated circuit board according to the present invention includes a metal substrate 1 having good thermal conductivity such as aluminum, an oxide film 2 such as aluminum oxide formed by anodizing the surface of the substrate 1, and a high temperature treatment step i. The crack 3 of the oxidized film 2 is made up of a liquid insulating material 4 such as silicone oil that is impregnated into the crack 3, which is a feature of the present invention.

端上した構造に依れば、クラック3内には液状絶縁物4
がほぼ充填され、またクラック3は極めて微小であるた
め毛細管現象により液状絶縁物4はクラック3内に固定
され外部に流れ出ることもない。
According to the structure shown above, there is a liquid insulator 4 inside the crack 3.
is almost filled, and since the crack 3 is extremely small, the liquid insulator 4 is fixed within the crack 3 due to capillary action and does not flow out to the outside.

また液状絶縁物4は液状であるために減圧下でシリコン
オイル液内に基板を配置してかけば、毛細管現象でクラ
ツク3全体に容易に含浸できるのである。
Furthermore, since the liquid insulator 4 is in a liquid state, by placing the substrate in a silicone oil liquid under reduced pressure, it can be easily impregnated into the entire crack 3 by capillary action.

以上に詳述した如く本発明に依れば、クラック内のみに
液状絶縁物を含浸させることができ、混成集積回路基板
上には前述した特公昭46−13234号公報に記載さ
れている如く混成集積回路を構成できるので、水分ある
いはフラックスのクラック内への浸入が完全に防止でき
極めて絶縁性が良好となる。
As described in detail above, according to the present invention, it is possible to impregnate only the inside of the crack with a liquid insulator, and on the hybrid integrated circuit board, as described in Japanese Patent Publication No. 46-13234, Since an integrated circuit can be formed, moisture or flux can be completely prevented from penetrating into the cracks, resulting in extremely good insulation.

【図面の簡単な説明】[Brief explanation of drawings]

図面は本発明を説明する断面図である。 1は金属基板、2は酸化膜、3はクラック、4は液状絶
縁物である。
The drawings are cross-sectional views for explaining the present invention. 1 is a metal substrate, 2 is an oxide film, 3 is a crack, and 4 is a liquid insulator.

Claims (1)

【特許請求の範囲】[Claims] 1 金属基板と該金属基板の表面に陽極酸化により形成
された前記金属基板の酸化膜と該酸化膜に高温処理工程
などで発生したクラックと該クラック内に含浸された液
状絶縁物とを具備したことを特徴とする混成集積回路基
板。
1. A metal substrate, an oxide film of the metal substrate formed by anodization on the surface of the metal substrate, cracks generated in the oxide film during a high-temperature treatment process, etc., and a liquid insulator impregnated in the cracks. A hybrid integrated circuit board characterized by:
JP52133330A 1977-11-04 1977-11-04 hybrid integrated circuit board Expired JPS5835376B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP52133330A JPS5835376B2 (en) 1977-11-04 1977-11-04 hybrid integrated circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP52133330A JPS5835376B2 (en) 1977-11-04 1977-11-04 hybrid integrated circuit board

Publications (2)

Publication Number Publication Date
JPS5466462A JPS5466462A (en) 1979-05-29
JPS5835376B2 true JPS5835376B2 (en) 1983-08-02

Family

ID=15102184

Family Applications (1)

Application Number Title Priority Date Filing Date
JP52133330A Expired JPS5835376B2 (en) 1977-11-04 1977-11-04 hybrid integrated circuit board

Country Status (1)

Country Link
JP (1) JPS5835376B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59123297A (en) * 1982-12-27 1984-07-17 インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション Method of forming substrate for printed circuit board

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4124824Y1 (en) * 1964-08-19 1966-12-19

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4124824Y1 (en) * 1964-08-19 1966-12-19

Also Published As

Publication number Publication date
JPS5466462A (en) 1979-05-29

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