JPS5833758A - Programmable controller - Google Patents

Abstract

PURPOSE:To provide failure flags as a part of the user's program, by detecting failures in a device and arbitrarily setting the inhibiting state of a controlling object. CONSTITUTION:A CPU5 executes a control operation as an instruction executing means and an input and output revise emans and various OS processing mentioned later, and a memory 6 being an RAM is used as a working memory. As a failure diagnostic means, a battery failure detecting circuit 7 detecting the failure in a battery voltage and a temperature failure detecting circuit 8 detecting abnormal temperature rise in the device are provided. Further, failure detection flags F1, F2 and an output inhibiting flag FO are set in the working memory 6. The flag F1 is set when a failure is detected at the battery failure detection circuit 7. The flag F2 is set when a failure is detected at the circuit 8.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a programmable controller, and particularly to a control method when an abnormality inside the device is detected.

Conventional programmable controllers have a means for detecting battery voltage abnormalities, a means for detecting an abnormality in the voltage inside the device, and a parity check for the pass line inside the Kamoden. An abnormality diagnosing means such as a means for detecting an abnormality is provided, and when an abnormality in the device is detected by this abnormality diagnosing means, the operation of the programmable controller is stopped (all output signals are turned off). It was structured like this.

However, from the standpoint of the user of a programmable controller, when an abnormality occurs within the device, the operation of the device can be completely controlled, regardless of the type of abnormality or the situation of the object to be controlled when the abnormality occurs. The one that stops is Tora WA@
This was often not always appropriate.

This invention was made in view of the same points as the conventional ones mentioned above, and its purpose is to determine what kind of abnormality is detected inside the sensor, and what kind of situation the controlled object is in, to prohibit the control output. To provide a programmable controller which allows a user to arbitrarily set what is to be done and to set it as part of a user program.

Hereinafter, embodiments of the present invention will be described in detail based on the drawings.

FIG. 1 is a block diagram showing a schematic configuration of a programmable controller according to the present invention. This programmable controller has a user program memory 1 in which a user program is stored, an input alI2 to which an external input signal is applied, and an output [113
Then, each instruction in the input/output memory 4, which is a buffer memory 9 for input/output data corresponding to the input 11112 and the output circuit 3, and the user program memory 1 are executed in sequence at high speed, and the data in the input/output h memory 4 is an instruction that performs arithmetic processing based on the data and rewrites the output data of the above-mentioned population h memory 4 with the processing result, and an input update that writes the λ data of the above formula 1as2 into a predetermined area of the above-mentioned input/output memory 4. and an output that sets the output data of the predetermined area of the input/output memory 4 to the output [11I3! Basically, she has a new hair style.

The above-mentioned instruction execution means, input updating means, and output updating means are realized by a CPLl (central processing unit) 5 constituted by a so-called microprocessor.

The CPU 5 executes various O8 processes (operating system), which will be described later, in addition to control operations as an instruction execution means and an input/output update means, and a memory 6, which is a RAM, is used as a working memory for this section.

Further, the programmable controller according to the present invention has a plurality of types of abnormality diagnosis means for detecting abnormalities inside the device, and is set corresponding to each abnormality diagnosis means, and can be set or reset according to the diagnosis. The abnormality flag F1. F2, and an instruction arbitrarily set in the user program memory 1 as part of the user program during the operation of the instruction execution means, the abnormality flag F1. F2 and any input/output digital style,
The operation of the output updating means is prohibited in accordance with the state of the output prohibition 7-lag FO which is set or reset based on the result of an arbitrary logic calculation, and the output prohibition flag FO, and a predetermined output state is achieved. and output prohibition means.

Upper nil! In this example, the abnormality of the ordinary examination is 7~
Battery abnormality detection eye 117 that detects abnormality in battery voltage
and a $l trace abnormality output 81118 that detects an abnormal increase in temperature within the device. Further, the above-mentioned 5- abnormality flags Fl, F2 and output prohibition flag FO are set in the working memo 6. Kousei Flak FL has battery abnormality detection 11m! It is set when abnormal force is detected at step 7. The abnormality detection flag F2 is set to 2 when an abnormality is detected in the concentration abnormality detection cycle 18.

Output prohibition flag? FO is flagged as abnormality F1. For example, in the case of a ladder diagram type programmable controller, arbitrarily setting in the user program to set or reset τ based on the state of F2 and any input/output data means that output is prohibited, as shown in No. 211. The flag FO is used as an output relay, and the conditions for lightly operating this relay FO are as follows: abnormality flag i:1. F2 is treated as the input ist point, and after these inputs, 1mF1. Configure any ladder diagram using F2 and any input/output contacts related to the controlled device, and this! This means converting into a predetermined command format and storing it in the user program memory 4 in advance.

Next, an outline of the control operation by the CPU 5 will be sequentially explained according to the flowchart shown in FIG. 3-6. In the first step 101 following the initial processing 100, the input circuit 2
The external input signal given to the input/output memory 4 is written into a predetermined area of the input/output memory 4 (operation of input updating means). In the next steps 102 and 103, the user program stored in the user program memory 1 is executed at high speed from the start address to the end instruction (operation of instruction execution means).

As a result, the input/output memory 4 is
The output data of is rewritten, and the state of the above-mentioned output prohibition flag FO is also determined. Next step 104
It is determined whether the output prohibition flag FO is set or not.

The fact that the output prohibition flag FO is reset means that normal operation is performed without prohibiting the control output. In this case, the process advances to step 105, and the output data of the input/output memory 4 is output! i! 1113 and output as an external output signal (operation of output updating means) Primary step 10
In step 7, the output of battery abnormality detection alI7 is checked to determine whether there is an abnormality. If it is abnormal, the abnormality flag F1 is set in step 108, and if it is not abnormal, the abnormality flag F1 is reset in step 109.

In the subsequent step 110, the output of the m-degree abnormality detection l1llI8 is checked to determine whether or not there is an abnormality.

If it is abnormal, the abnormality flag F2 is set in step 111, and if it is not abnormal, the abnormality flag F2 is set in step 112.
Reset 2. In the following step 113, various O8 processes such as monitor display and input reception processing from a program console (not shown) are performed, and then step 10 is performed.
This means that one or more steps 101 or 5113, which return to step 1, are repeatedly executed at high speed. In the process of execution, the input and output data becomes elementary as the control state of the controlled object passes, and an abnormality is detected again! ! ! If an abnormality is detected in step 17.8, the abnormality flag F1. F2 is set. For example, if the driving conditions for the output prohibition flag FO are set by the user as shown in FIG. Output prohibition flag FO when flag F1 is set and external input signal ■1 is turned on
is set. When the output prohibition flag FO is set, YES is determined in step 104, and the output update operation in step 105 is not performed, and step 106 is performed.
In step 106, all external output signals derived from the output circuit 3 are turned off. Then, the process advances to step 107.

In this way, instead of unconditionally prohibiting the output when an abnormality is detected by the abnormality detection 11m17 or 8, it is possible to combine the output signal of the abnormality detection 11117.8' with any input/output data of that line. This allows the user to set the output to be prohibited when a combinational logic state occurs.

In addition, the abnormality diagnosis means in the above embodiment is battery abnormality detection! ! 117 and m* abnormality detection circuit 8, the present invention is not limited thereto, and the internal diagnostic function for detecting abnormalities on various other circuits may be implemented, for example, in the CP.
It is possible to set abnormality flags corresponding to each of these abnormalities by using the abnormality flag U5 so that all of these abnormality flags can be used as driving conditions for the output prohibition flag FO.

Further, in the above embodiment, all external output signals are turned off as the output prohibition mode, but the present invention is not limited to this, and the output state immediately before the output prohibition flag is set. It can also be configured to carry a belt, or to exit in a predetermined specific exit pattern.

As explained in detail above, in the programmable controller according to the present invention, it is possible to determine what kind of abnormal state is detected and what kind of control state the output prohibition mode is set to. It is possible to set conditions suitable for the usage mode from the user's standpoint, and it is much easier to use than conventional systems, and can respond to various demands from the user.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a schematic configuration of a programmable controller according to the present invention, FIG. 2 is a diagram showing an example of a condition setting program for prohibiting output power, and FIG. 3 is a block diagram showing a schematic configuration of a programmable controller according to the present invention. FIG. 2 is a flowchart showing m-operation. FIG. 1-----User 10g memory 2--Human power circuit 3...Output 1g1m 4--Human output memory s ---c p u 6--One working memory 7--One battery Abnormality detection l1lI 8---11 Direct abnormality detection am FO-1 output prohibition flag Fl, F2-- Abnormal flag Patent applicant Tateishi Den-Co., Ltd. 11- Fig. 1 Fig. 2

Claims (1)

[Claims] (1) A user program memory in which a user program is stored, an input aim to which an external input signal is applied, an output circuit to send out an external output signal, and a buffer memory for input/output data corresponding to the above input items and output circuits. An instruction to execute each instruction in the input/output memory and the user program memory in sequence at high speed, perform arithmetic processing based on the data in the input/output memory, and then rewrite the output data in the input/output memory at *mm. Execution means and an input for writing the input data of the input/output into a predetermined area of the input/output memory. In a programmable controller having a new means and an output updating means for setting output data of a predetermined area of the input/output memory to the output circuit, a multi-purpose abnormality diagnosis means for detecting an abnormality inside the device; - a plurality of active slots that are set corresponding to the diagnostic means and set or reset according to the diagnostic results; By executing the instruction set in , the above error flag and any input/output data, the output prohibition flag that is set or reset according to the result of any logical operation, and the above according to the state of this output prohibition flag are set or reset. A programmable controller comprising: output updating means for inhibiting a part of the output updating means to achieve a predetermined output state.