JPH075957A - Information processor - Google Patents

Abstract

PURPOSE:To provide an information processor provided with a power source control means capable of automatically checking the state of a power source switch, the state of a supply power source voltage, and the executing state of a program, etc., and performing power source disconnection processing. CONSTITUTION:Power source control for the information processor is performed by a switch off decision means 3 which decides the switching state of the information processor based on the state of a physical switch 1 located outside the information processor, output from a voltage drop detecting means 2, and the outputs from a pre-processing means 9 and from a post-processing means 7.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an information processing apparatus having a power supply control means.

[0002]

2. Description of the Related Art In a conventional information processing apparatus (in this specification, a personal computer, a handheld computer, an office computer, etc. are referred to as an information processing apparatus), a power switch is turned off or a power supply voltage is lowered during execution of a program. Then, the process was interrupted regardless of the state of the program being executed. For this reason, re-execution from the interrupted portion is impossible, and in particular, interruption during input / output processing may destroy the medium itself being used. This is the power battery
It was a very big problem for the accidental interruption due to the voltage drop.

[0003]

SUMMARY OF THE INVENTION In order to solve the above problems, the present invention is to automatically check the state of the power switch, the state of the power supply voltage, the execution state of the program, etc. to perform the power-off process. An object of the present invention is to provide an information processing apparatus having a power supply control means that can be used.

[0004]

According to the present invention, there is provided switch-off determining means for determining power-off based on a state of a physical switch and a signal from a voltage drop detecting means, and the switch-off determining means.
Power-off processing means for actually performing power-off processing in response to an instruction from the off-determination means, pre-processing means for prohibiting the power-off to the switch / off determination means, and storing only that information when a power-off factor occurs And the input / output processing means for continuing the input / output processing and the items prohibited by the pre-processing means are canceled, and the set information is checked when a power-off factor occurs during the operation of the input / output processing means. It is characterized by comprising post-processing means for executing power-off after completion of input / output processing.

[0005]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The structure of the present invention will be described with reference to FIG.

The power supply control of the information processing apparatus of the present invention includes the state of the switch 1 (hereinafter referred to as a physical switch) outside the information processing apparatus and the power supply voltage drop (hereinafter referred to as voltage drop). ) The output from the detection means 2,
This is performed by the switch-off determining means 3 which determines the switch state of the information processing device based on the outputs from the pre-processing means 9 and the post-processing means 7. The output of the switch-off determination means 3 is input to the logical electric switch 4 to perform an actual power on / off operation. Here, the preprocessing unit 9 performs input / output even when a power-off factor (that is, when the physical switch 1 is turned off, a voltage drop occurs, etc.) occurs during the operation of the input / output processing execution unit 8. During the operation of the processing execution means 8, it is means for prohibiting the power-off in order to continue it. Also, the post-processing means 7
Is means for releasing the power-off prohibition item for the power-off factor and outputting to execute power-off when a power-off factor occurs during the operation of the input / output processing execution means 8.

FIG. 2 is a block diagram showing the hardware configuration of the present invention. Here, the power supply of the information processing device is controlled by the power switch 25, which determines whether the power is turned on or off from the outputs from the physical switch 26, the power lease 27, and the central processing unit 21, and the output of the power controller 25. It consists of an electrical switch 24 that actually turns the power on and off.

FIG. 3 is a diagram for explaining the hardware configuration diagram of FIG. 2 in more detail. If the voltage of the power supply lease 27 drops below a certain level, the A-D converter-28
The power supply controller 25 detects the state of voltage drop via the. Then, the information is further provided to the power controller 25
Informs the central processing unit 21.

The power supply controller 25 is composed of, for example, a microprocessor, and its structure will be described below with reference to FIG. Reference numeral 71 denotes a program counter which is a register for holding program address information (address of the program memory 74). Reference numeral 72 denotes an 8-bit register which holds stack head address information of the data memory 73 by a stack pointer. 75 is a general-purpose register. Reference numeral 76 is a register for storing the calculation result and exchanging data with the data memory 73, the I / O port 77, the general-purpose register 75 and the like. Reference numeral 77 is a register indicating whether or not there is a carry in the register 76. Also, 7
Reference numeral 8 is an arithmetic unit. Reference numeral 79 is an instruction decoder that decodes the instructions stored in the program memory 74. The system clock generation circuit 80 is composed of an RC oscillator circuit (not shown) and a 1/2 frequency divider circuit (not shown). The RC oscillator circuit oscillates by an external resistor (not shown) connected to CL1 and CL2 terminals (not shown) and a captor (not shown). It is also possible to input an external clock from CL1 input without RC oscillation.
The RC oscillator circuit then acts only as an inverting buffer. The output 81 from the RC oscillator circuit is sent to the clock control circuit 83, where it is frequency-divided and the timer / event.
It becomes the count pulse of the counter 84. In addition, the signal divided by 1/2 from the RC oscillator circuit output is
It becomes the clock 82 and is sent to the serial interface 86. The count / clock generating circuit 87 comprises a crystal oscillating circuit (not shown). The crystal oscillator circuit oscillates by a crystal connected to X1 and X2 terminals (not shown), a resistor R (not shown), and a capacitor C (not shown). It is also possible to input an external clock from the X1 input without performing crystal oscillation, in which case the crystal oscillation circuit functions only as an inverting buffer.
The output 88 from the count clock generation circuit 87 is sent to the clock control circuit 83 and directly or divided into a count pulse 89 of the timer / event counter 84. Further, 85 is an interrupt control circuit, and 86
Is a serial interface used for inputting / outputting serial data.

Next, the operation of the information processing apparatus of the present invention configured as described above will be described with reference to the flowchart of FIG. First, the power-off factor may be generated when the input / output process is being executed or not. When the input / output processing is not being executed, the power-off processing means 5 operates and the power is turned off immediately after the power-off factor occurs. Figure 5
The flow chart shown in FIG. 6 shows the case where a power-off factor occurs during execution of input / output processing. First, the input / output processing starting means 10 prepares for input / output processing (<1>). Next, the pre-processing means 9 prohibits the power-off of the switch-off determination means 3 (<
2>). After that, the input / output processing execution means 8 executes the input / output processing, but even if a power-off factor occurs at this time, the information is merely stored and the processing is not interrupted (<3>). After that, when the input / output processing is completed, the post-processing means 7 releases the prohibition of the power-off to the switch-off determination means 3 (<4>), further checks the storage area of the power-off information, and obtains the information of the power-off factor occurrence. If detected, the information area is first cleared and then the power is turned off. If there is no power-off factor, the input / output processing termination means 6 operates to finish the input / output processing and proceed to the next processing (<5>). As described above, the power off during the execution of the input / output processing is executed after the completion.

[0011]

As described above, according to the present invention, even if a power-off factor occurs regardless of the execution state of the program, the processing is interrupted at the end of the input / output processing, so that the destruction of the medium used can be prevented. Also, it became possible to continue from the point of interruption. Due to these, the present invention has the effect of increasing the reliability of the information processing apparatus.

[Brief description of drawings]

FIG. 1 is a block diagram showing an outline of the present invention.

FIG. 2 is a diagram showing a hardware configuration of an embodiment of the present invention.

FIG. 3 is a diagram showing FIG. 2 in more detail.

FIG. 4 is a diagram showing details of the power supply controller 25 of FIGS. 2 and 3;

FIG. 5 is a flowchart showing the operation of the information processing apparatus of the present invention.

[Explanation of symbols]

 2: Voltage drop detection means 3: Switch-off determination means 7: Post-processing means 9: Pre-processing means

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[Procedure amendment]

[Submission date] January 26, 1994

[Procedure Amendment 1]

[Document name to be amended] Statement

[Name of item to be amended] Claims

[Correction method] Change

[Correction content]

[Claims]

[Procedure Amendment 2]

[Document name to be amended] Statement

[Correction target item name] 0001

[Correction method] Change

[Correction content]

[0001]

The present invention relates to input / output processing even when the voltage drops.
The present invention relates to an information processing device that continues processing.

[Procedure 3]

[Document name to be amended] Statement

[Name of item to be corrected] 0003

[Correction method] Change

[Correction content]

[0003]

SUMMARY OF THE INVENTION In order to solve the above problems, the present invention automatically checks the state of the power supply voltage and the execution state of the program, and performs a power-off process.
It is an object of the present invention to provide an information processing device that can be used .

[Procedure amendment 4]

[Document name to be amended] Statement

[Correction target item name] 0004

[Correction method] Change

[Correction content]

[0004]

The present invention provides a power supply.
And a voltage drop to detect the voltage drop of the battery
An information processing device comprising a detection means , wherein a switch-off determination means for determining power-off based on a signal from the voltage drop detection means, and an actual power-off processing by an instruction from the switch-off determination means preprocessing means for inhibiting the power off for a power-off processing means for the switch-off determining unit before the input process is started, electricity
When a pressure drop occurs, the information indicating the occurrence of the voltage drop is stored in the storage means.
And an input / output processing execution means for storing the input / output data and continuing the input / output processing;
A post-processing unit for releasing the prohibition of the power-off performed , and
After releasing the prohibition of the power-off by the quantity processing means,
Based on the information stored in the stage indicating the occurrence of brownout
And a power-off processing means for executing the off processing .

[Procedure Amendment 5]

[Document name to be amended] Statement

[Correction target item name] 0007

[Correction method] Change

[Correction content]

FIG. 2 is a block diagram showing the hardware configuration of the present invention. Here, the power of the information processing apparatus, a physical switch 26, the power supply controller 25 determines the power on / off from the output of the power source source over scan 27 and the central processing unit 21, the output of the power source controller 25 It consists of an electrical switch 24 that actually turns the power on and off.

[Procedure correction 6]

[Document name to be amended] Statement

[Correction target item name] 0008

[Correction method] Change

[Correction content]

FIG. 3 is a diagram for explaining the hardware configuration diagram of FIG. 2 in more detail. In the power source 27,
There is a battery 32 for supplying power to the device. And
The battery 32 can be charged by the AC adapter 34.
It When the voltage of the battery 32 drops and falls below a certain amount, A
-Power converter via D converter 28 and signal line 33
The tracker 25 detects a voltage drop state. And that
The power supply controller 25 sends information to the center via the signal line 30.
Notify the processor 21. Also supplied by the battery 32
The voltage to be supplied to the central processing unit 21
22 and the RAM 23.

[Procedure Amendment 7]

[Document name to be amended] Statement

[Correction target item name] 0009

[Correction method] Change

[Correction content]

The power supply controller 25 is composed of, for example, a microprocessor, and its structure will be described below with reference to FIG. Reference numeral 71 denotes a program counter which is a register for holding program address information (address of the program memory 74). A stack pointer 72 is an 8-bit register which holds stack head address information of the data memory 73. 75 is a general-purpose register. Reference numeral 76 is a register for storing the calculation result and exchanging data with the data memory 73, the I / O port 77, the general-purpose register 75 and the like. Also, 100 is a register 76
This is a register indicating whether or not there is a carry. or,
Reference numeral 78 is an arithmetic unit. Reference numeral 79 is an instruction decoder that decodes the instructions stored in the program memory 74. The system clock generation circuit 80 is composed of an RC oscillator circuit (not shown) and a 1/2 frequency divider circuit (not shown). The RC oscillator circuit oscillates by an external resistor (not shown) connected to CL1 and CL2 terminals (not shown) and a captor (not shown). It is also possible to input an external clock from the CL1 input without performing RC oscillation, in which case the RC oscillation circuit functions only as an inverting buffer, and the output 81 from the RC oscillation circuit is sent to the clock control circuit 83. Then, the frequency is divided into the count pulse of the timer / event counter 84. Also, RC
The signal further divided by 1/2 from the output of the oscillation circuit becomes the system clock 82 and the serial interface 8
Sent to 6. The count / clock generating circuit 87 comprises a crystal oscillating circuit (not shown). The crystal oscillator circuit oscillates by a crystal connected to X1 and X2 terminals (not shown), a resistor R (not shown), and a capacitor C (not shown). Also, without crystal oscillation,
It is also possible to input an external clock from the X1 input, in which case the crystal oscillator circuit only functions as an inverting buffer. Output 88 from count / clock generation circuit 87
Is sent to the clock control circuit 83 and directly or divided into the count pulse 89 of the timer / event counter 84. Reference numeral 85 is an interrupt control circuit, and 86 is a serial interface used for inputting / outputting serial data.

[Procedure Amendment 8]

[Document name to be amended] Statement

[Correction target item name] 0011

[Correction method] Change

[Correction content]

[0011]

As described above, according to the present invention, the processing is interrupted at the end of the input / output processing even if the power supply voltage drops regardless of the program execution state, so that the media used is destroyed. It was possible to prevent it and continue from the point of interruption. Due to these, the present invention has the effect of increasing the reliability of the information processing apparatus.

[Procedure Amendment 9]

[Document name to be corrected] Drawing

[Name of item to be corrected] Figure 3

[Correction method] Change

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[Figure 3]

Claims (1)

[Claims] 1. A switch-off deciding means for deciding the power-off based on a state of a physical switch and a signal from a voltage drop detecting means, and a power supply for actually performing a power-off processing according to an instruction from the switch-off deciding means. An off processing means; a preprocessing means for prohibiting the switch-off determination means from turning off the power; and an input / output processing means for storing only that information and continuing the input / output processing when a power-off factor occurs, The post-processing means removes the matter prohibited by the pre-processing means and checks the set information when the power-off factor occurs during the operation of the input / output processing means, and executes the power-off after the end of the input / output processing. An information processing device characterized by being formed.