JPS5854402A - Programmable controller - Google Patents

Abstract

PURPOSE:To set up the starting of a device by a user's program optionally from a user's standpoint by fitting an abnormal flag means for the inside of a device, an electric power source flag means and an output inhibition flag means set or reset by the result of an optional logical operation between optional I/O data. CONSTITUTION:Instruction executing and I/O updating means are realized by a CPU (central processing unit) 5 composed of what is called a microprocessor. The CPU5 executes various kinds of OS (operating system) processing in addition to control operation as instruction executing and I/O updating means and an RAM is used as a working memory 6. When a main electric power source is cut off, an I/O memory 4 and the working memory 6 are backed up by a battery 9 to hold their stored contents.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a programmable controller, and in particular, to a programmable controller that starts or stops actual control operation when power is applied or when an abnormality is detected inside the device. There are means for detecting battery voltage fluctuations, means for detecting an abnormal rise in temperature inside the equipment, and means for detecting abnormalities in data by checking the parity of the pass line in the equipment. An abnormality diagnosing means is provided, and when an abnormality in the device is detected by the abnormality diagnosing means, the operation of the programmable controller is stopped (all output signals are turned off).

However, from the user's perspective of a programmable controller, when some kind of abnormality occurs within the device, the operation of the device is completely stopped, regardless of the type of abnormality or the situation of the object to be controlled when the abnormality occurs. It was often not practical to do so.

In addition, some conventional programmable controllers are configured to start the actual 111IJIMI operation of the controlled equipment when the power is turned on or when the power is restored after a power outage; There are two types of controllers that are configured so that the actual control operation does not start unless a separate start command is given using a start switch, etc. The former controller is often used for process vJIIl systems, and the latter controller is used for controlling machine tools, etc. It is used in However, in the past, the above-mentioned activation method of the purchased controller could not be adjusted by the user each time according to the purpose of use, which was very inconvenient.

This invention was made in view of the conventional problems mentioned above, and its purpose is to disable the control output when an abnormality is detected inside the device and under what conditions of the controlled object. It is possible for the user to set it as a part of the user program, and also to decide whether to start it automatically when the power is turned on or to start it depending on some condition. arbitrarily depending on the position]
- To provide a programmable second component that can be set using the program.

Hereinafter, embodiments of the present invention will be described in detail based on the drawings.

FIG. 1 is a block diagram showing a schematic configuration of a programmable controller according to the present invention. Input circuit 2 and output path 3 for sending external input signals
, an input/output memory 4 serving as a buffer memory for input/output data corresponding to the input circuit 2 and output circuit 3, and each instruction in the user program memory 1 is sequentially executed at high speed, and the commands are executed based on the data in the input/output memory 4. an instruction executing means for performing a pruning process and rewriting the output data of the output memory 4 with the processing result; and an input updating means for writing the input data of the input circuit 2 into a predetermined area of the input/output memory 4. , and output updating means for setting the output data of a predetermined area of the input/output memory 4 to the output circuit 3.

The above-mentioned instruction execution means, input updating means, and output updating means are realized by a CPU (central processing unit) 5 constituted by a so-called microprocessor.

The CPU 5 performs control operations as an instruction execution means and an input/output updating means, as well as various O8 processes (operating system) to be described later, and at this time, the memory 6, which is a RAM, is used as a re-keying memory. Note that the input/output camera t4 and the working memory 6 are backed up by the battery 9 and stored in memory when the main power is turned off.

Furthermore, the 10-gram pull controller according to the present invention includes an abnormality diagnosis means for detecting an abnormality inside the device, and an abnormality flag F1 that is set corresponding to the abnormality diagnosis means and is set or reset according to the diagnosis result of the abnormality diagnosis means. , an electric fishing flag F2 that is set when the power is turned off or turned on, and is reset in conjunction with the operation of the output updating means, and as part of the user program during the operation of the command execution means. Above 1-The program memory 1
By executing an instruction arbitrarily set in , the above abnormality flag 1:1. An output prohibition flag FO is set or reset according to the result of any logical operation between the power supply flag F2 and any input/output data, and the operation of the output updating means is prohibited according to the state of this output prohibition flag FO. and output prohibition means for setting the output to a predetermined output state.

Upper yK! As the abnormality diagnosing means, a battery abnormality detection circuit 7 for detecting abnormality in the voltage of the battery 9 is provided in this embodiment. Further, an instantaneous power failure detection circuit 8 is provided to promptly detect a very short power failure (abnormal voltage drop) of the main power supply. In addition, the above abnormality flag F1. The power supply flag F2 and the output prohibition flag FO are set in the working memory 6. The abnormality flag F1 is set when the battery abnormality detection circuit 7 detects an abnormality. As will be described later, the power supply flag F2 is set in the initial process when the power is turned on (when the power is restored), and is also set when an abnormality is detected by the momentary power failure abnormality detection circuit 8.

Change output prohibition flag FO to abnormality flag Fl and power supply flag F2
For example, in the case of a ladder diagram programmable controller, the output prohibition flag is set or reset based on the state of any input/output data, as shown in Figure 2. Let FO be the output relay, and this relay F
The conditions for driving O are the abnormality flag Fl and the power off 2.
F2 as an input contact, and these input contacts F1. F2 and any input/output contacts related to the controlled device
II to construct an arbitrary ladder diagram, convert it into a predetermined instruction format, and store it in the user program memory 4.
This means that it is set in advance.

Next, an outline of the control operation by the CPU 5 will be sequentially explained according to the flowchart of FIG. In the first step 1°O after power is turned on or restored, various well-known initial processes are performed, and as part of the process, the power supply flag F2 is set. In step 101 following initial processing 100, an external input signal applied to input circuit 2 is written into a predetermined area of input/output memory 4 (operation of input updating means). Next step 102.
103, the user program stored in the user program memory 1 is executed at high speed from the start address to the end instruction (operation of instruction execution means). As a result, the output data of the input/output memory 4 is rewritten according to the execution result of each instruction, and the state of the above-mentioned output prohibition flag FO is also determined. In the next step 104, it is determined whether the output prohibition flag FO is set or not. The fact that the output prohibition flag FO is reset means that normal operation is performed without inhibiting the t+1JIIl output. In this case, the process advances to step 105, the power supply flag F2 is reset, and the process proceeds to the next step 10.
At 6, the output data of the input/output memory 4 is supplied to the output circuit 3 and outputted as an external output signal (operation of the output updating means). Setting the output prohibition flag FO means that the output update operation is prohibited and normal actual control operation is not performed. In this case, steps 104 to 10
The process proceeds to step 7, where all external output signals derived from the output circuit 3 are turned off, and then the process proceeds to step 108 (in this case, the power supply flag F2 is not reset). In the next step 108, the output of the battery abnormality detection circuit 7 is checked to determine whether there is an abnormality. If it is abnormal,
The abnormality flag F1 is set in step 109, and if it is not abnormal, the abnormality flag F1 is reset in step 110.

In the subsequent step 111, the output of the momentary power failure abnormality detection circuit 8 is checked to determine whether or not there is an abnormality.

If there is no abnormality, various O8 processes such as monitor display and input reception processing from a program console (not shown) are performed in step 112, and then the process returns to step 101. If an abnormality is detected in the instantaneous power failure abnormality detection circuit 8, the power supply flag F2 is set in step 113, the necessary data is promptly saved in the following step 114, and the main power supply is returned to normal in step 115. We will have to wait for it to recover. It should be noted that the instantaneous power failure abnormality detection circuit 8 and the above-mentioned processing associated with its abnormality detection are not necessarily necessary to implement the present invention.

This means that steps 101 to 112 described above are repeatedly executed at high speed. During the execution process, input/output data changes as the control status of the controlled device progresses.
Further, when an abnormality is detected in the abnormality detection circuit 7.8, the Tatsumi flag F1. Telephone phonograph F2 is set. and,
For example, assume that the driving conditions for the output prohibition flag FO are set by the user as shown in FIG. In the example of FIG. 2, when the abnormality flag F1 is set, the output prohibition flag FO
In addition to being set, the output prohibition flag FO is set when the B contact 11 corresponding to the externally connected pushbutton switch (starting switch) is on and the power supply flag F2 is set.

Therefore, after the power flag F2 is set in the initial processing 100, the start switch is pressed and the B contact
1 is not turned off, the output prohibition flag FO remains set, and in that state, the output update in step 106 is not performed, all external output signals are turned off, and no actual control operation is performed on the controlled equipment. When the B contact 11 is turned off and a start command is given, actual control operation is performed for the first time.

Note that if you do not create a user program like the one above that uses the power flag F2, the actual
1 operation is started.

Although the battery abnormality detection circuit has been described as an abnormality diagnosis means in the above embodiment, the present invention is not limited to this, and the CPU 5 may have an internal diagnostic function for detecting abnormalities on various other circuits. In addition, abnormality flags can be set corresponding to each of these abnormalities, and all of these abnormality flags can be used as driving conditions for the output prohibition flag FO.

Furthermore, in the above embodiment, all external output signals are turned off as the output prohibition mode, but the present invention is not limited to this, and the output state immediately before the output prohibition flag is set is set. The output pattern can be maintained or configured to output a specific output pattern that has been set in advance. Also, in the output prohibited state,
The output data of the input/output camera 7 may also not be updated to prevent unnecessary changes in the output data before and after the output prohibition is canceled.

As explained in detail above, in the programmable controller according to the present invention, the user can determine what kind of abnormal state is detected and what kind of control state is to be used to set the output prohibited state. In addition to being able to set conditions that suit the user from the user's standpoint, the user can also set the automatic startup when the power is turned on or the startup with some kind of condition, allowing the user to set the conditions at their discretion. It is much easier to use than the original, and can meet the various demands of users.

[Brief explanation of the drawing]

si diagram is a block diagram showing a schematic configuration of the programmable controller according to the present invention, Figures 11 and 2 are diagrams showing an example of a section fF programming diagram for inhibiting output, and Figure 13 is a block diagram showing the schematic configuration of the programmable controller according to the present invention. It is a flowchart showing vehicle operation. 1...User program memory 2...
Input circuit 3... Output circuit 4... Input/output memory 5... CPU 6... Working memory 7... Battery abnormality detection circuit 8. ...Momentary interruption abnormality detection circuit FO...Output prohibition 11 flag Fl...Abnormal flag F2...Power supply flag Patent applicant J Shiwa Denki Co., Ltd. Sugi

Claims (1)

[Claims] (1) A user program memory in which a user program is stored, an input circuit to which an external input signal is applied, an output circuit to send an external output signal, and a buffer 7 memory for input/output data corresponding to the input circuit and output circuit. An instruction that sequentially executes each instruction in the input/output memory and the user program memory, performs arithmetic processing based on the data in the input/output memory, and rewrites the output data in the input/output memory with the processing result. A programmable device comprising an execution means, an input update means for writing input data of the input circuit into a predetermined area of the input/output memory, and an output update means for setting output data of the predetermined area of the input/output memory in the output circuit. - In the controller, there is an abnormality # disconnection means for detecting an abnormality inside the device, an abnormality flag that is set corresponding to this abnormality diagnosis means, and is set or reset according to the diagnosis result, and when the power is turned off. or a power supply flag that is set when the power is turned on and reset with the operation of the output updating means, and a power flag that is arbitrarily set in the user program memory as part of the user program during the operation of the instruction execution means. The output prohibition flag is set or reset as a result of any logical ms between the abnormality flag, the power supply flag, and any human output data by executing the above instruction, and when this output prohibition flag is set. A programmable controller comprising: output inhibiting means for inhibiting the operation of the output updating means to achieve a predetermined output state.