JPS61221941A - Back up device for programmable controller - Google Patents

Back up device for programmable controller

Info

Publication number
JPS61221941A
JPS61221941A JP60062056A JP6205685A JPS61221941A JP S61221941 A JPS61221941 A JP S61221941A JP 60062056 A JP60062056 A JP 60062056A JP 6205685 A JP6205685 A JP 6205685A JP S61221941 A JPS61221941 A JP S61221941A
Authority
JP
Japan
Prior art keywords
bus
cpu
programmable controller
switching
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60062056A
Other languages
Japanese (ja)
Inventor
Toshio Uchida
利夫 内田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP60062056A priority Critical patent/JPS61221941A/en
Publication of JPS61221941A publication Critical patent/JPS61221941A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To switch buses optionally and to attain the easy maintenance of a back-up device for programmable controller by adding a manual switching function to a bus switching device which changes automatically a faulty utility system to a spare system to continue a control action. CONSTITUTION:When a utility system is working, i.e., a bus 102 is connected to a bus 100, a manual switch signal 301 is supplied to a manual switching circuit 54. Then a switch command signal 400 is delivered to a CPU of a utility system as long as the healthy signal 201 of a spare system CPU is active. The CPU of the utility system receives the signal 400 and copies the interim data on a data memory DM50 to a DM51. Then the CPU of the utility system delivers a bus switch signal 500 to the circuit 54 at a dividing point of the scanning execution and actuates a bus switching circuit 53 via a bus switching control circuit 52 to connect the bus 102 to a bus 101 at the side of the spare system.

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明は、常用系から待機系に任意にバスを切換えて制
御を続行させるプログラマブルコントローラのバックア
ップ装置に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a backup device for a programmable controller that arbitrarily switches a bus from a regular system to a standby system to continue control.

【発明の技術的背景とその問題点〕[Technical background of the invention and its problems]

プログラマブルコントローラのバックアップ装置の一般
的な構成を第2図に示す。
FIG. 2 shows a general configuration of a backup device for a programmable controller.

第2図において、CPU (中央演算処理装置)lおよ
びPM(プログラムメモリ)3は常用系のプログラマブ
ルコントローラを、CPU2およびPM4は待機系のプ
ログラマブルコントローラを構成し、常時は常用系が工
10(入出力装置)6に接続されてシステムの制御動作
を行ない、常用系の異常時はバス切換装置5によってシ
ステムバスを100から101に切換えて待機系を動作
させる。
In FIG. 2, a CPU (central processing unit) 1 and a PM (program memory) 3 constitute a regular programmable controller, and a CPU 2 and PM4 constitute a standby programmable controller. The bus switching device 5 switches the system bus from 100 to 101 to operate the standby system when there is an abnormality in the regular system.

バス切換装置の従来の一例を第3図に示す。An example of a conventional bus switching device is shown in FIG.

第31!l/T:おいて、50.51はそれぞれ常用系
および待機系用のDM(データ記憶装置)、52はバス
切換制御回路、53はバス切換回路である。
31st! l/T: where 50 and 51 are DMs (data storage devices) for the regular system and standby system, respectively, 52 is a bus switching control circuit, and 53 is a bus switching circuit.

常時はバス102がバス切換回路53内で常用系側にあ
り、常用系のCPUIがバス100および102を介し
て工106に結合され、PM3のプログラムに従って制
御動作が行われると共に、途中データはDM50に保持
され、さらにDM50の途中データは順次待機系用のD
M51にコピーされる。
Normally, the bus 102 is on the regular side in the bus switching circuit 53, and the regular CPU is connected to the bus 106 via the buses 100 and 102, and control operations are performed according to the PM3 program, and intermediate data is transferred to the DM50. Furthermore, the intermediate data of DM50 is sequentially stored in the D for standby system.
Copied to M51.

この状態で常用系のCPUIまたはPM3に異常が発生
してCPUIのヘルシイ信号200がインアクティブに
なると、待機系のCPU2のヘルシイ信号201がアク
ティブであることを条件としてバス切換制御回路52の
指令でバス切換回路53がバス100を待機側のバス1
01に切換える。
In this state, if an abnormality occurs in the regular CPU or PM3 and the healthy signal 200 of the CPU becomes inactive, the command from the bus switching control circuit 52 will The bus switching circuit 53 switches the bus 100 to the bus 1 on the standby side.
Switch to 01.

これによって待機系のCPUがバス101および102
を介して工106に接続され、0M51にコピーされて
いる正常な途中データを用いて、PM4のプログラムが
待機系を動作させ、システムを停止することなく制御を
継続し、これによってプログラマブルコントローラのバ
ックアップ動作が行なわれる。
This allows the standby CPU to connect to buses 101 and 102.
The PM4 program operates the standby system using the normal intermediate data that is connected to the 0M51 and continues control without stopping the system, thereby providing backup for the programmable controller. An action is taken.

しかしながら上記従来のバックアップ装置は。However, the above-mentioned conventional backup device.

常用系に異常が発生したり、常用系の電源がしゃ断した
場合など重故障発生時だけに制御途中で待機系に切換え
るものであり、常用系と待機系との間で任意に切換える
ことはできない。
The system switches to the standby system during control only when an abnormality occurs in the regular system or a major failure occurs, such as when the power to the regular system is cut off, and it cannot be switched arbitrarily between the regular system and the standby system. .

C発明の目的〕 本発明は、常用系の異常時に自動的に待機系に切換えて
制御動作を継続させるバス切換装置に手動切換機能を付
加し、これによって任意にバス切換を可能としてメイン
テナンスを容易にしたプログラマブルコントローラのバ
ックアップ装置を提供することを目的としている。
CObject of the Invention] The present invention adds a manual switching function to a bus switching device that automatically switches to a standby system and continues control operation when there is an abnormality in the regular system, thereby making it possible to switch buses at will and simplify maintenance. The purpose is to provide a backup device for a programmable controller.

〔発明の概要〕[Summary of the invention]

本発明は、常用系のプログラマブルコントローラが異常
になったときシステムバスを自動的に待機系のプログラ
マブルコントローラに切換えて制御動作を継続させるバ
ス切換装置を備えたプログラマブルコントローラのバッ
クアップ装置において、常用系と待機系との間でスキャ
ニング実行に同期して強制的にシステムバスを切換える
手動切換回路を備え、これによって常用系と待機系の間
で任意にバンプレスな手動切換を可能とし、デバッグや
メインテナンスなどの操作性の向上をはかったものであ
る。
The present invention provides a backup device for a programmable controller equipped with a bus switching device that automatically switches the system bus to a standby programmable controller to continue control operations when the regular programmable controller becomes abnormal. Equipped with a manual switching circuit that forcibly switches the system bus between the standby system and the system bus in synchronization with scanning execution.This enables bumpless manual switching between the regular system and the standby system at will, making it easy to perform debugging, maintenance, etc. The aim is to improve operability.

〔発明の実施例〕[Embodiments of the invention]

本発明の一実施例を第1図に示す。 An embodiment of the present invention is shown in FIG.

第1図は、従来の第2図に対して手動切換回路54が追
加され、バス切換制御回路52を介して強制的にバス切
換を行っており、他は従来の第2図と同じである。
Fig. 1 is the same as the conventional Fig. 2 except that a manual switching circuit 54 is added to the conventional Fig. 2, and bus switching is forcibly performed via a bus switching control circuit 52. .

常用系の動作中、すなわちバス102がバス100に接
続されているとき1手動切換回路54に手動切換信号3
01を入力すると、待機系のCPU2のヘルシイ信号2
01がアクティブであることを条件として常用系のCP
UIに対して切換指令信号400を出力する。
When the regular system is in operation, that is, when the bus 102 is connected to the bus 100, the manual switching signal 3 is sent to the manual switching circuit 54.
If you input 01, the healthy signal 2 of the standby CPU 2 will be activated.
Regular CP on the condition that 01 is active
A switching command signal 400 is output to the UI.

常用系のCPUIは切換指令信号400を受けると0M
50の途中データを0M51にコピーした後。
When the CPU of the regular system receives the switching command signal 400, it becomes 0M.
After copying the intermediate data of 50 to 0M51.

スキャニング実行の区切り点でバス切換信号500を手
動切換回路54に出力し、バス切換回路52を介してバ
ス切換回路53を動作させ、バス102を待機系側のバ
ス101に接続する。
At the breakpoint of scanning execution, a bus switching signal 500 is output to the manual switching circuit 54, the bus switching circuit 53 is operated via the bus switching circuit 52, and the bus 102 is connected to the bus 101 on the standby side.

これによって常用系から待機系への切換えが手動によっ
てバンプレスに行われる。。
As a result, switching from the regular system to the standby system can be performed manually and bumplessly. .

待機系から常用系への手動切換も同様な方法で可能であ
る。
Manual switching from the standby system to the regular system is also possible in a similar manner.

なお上記は常用系と待機系とを区別して説明したが、2
つの系が相互に常用系と待機系として動作することも可
能である。
Note that the above explanation distinguishes between the regular system and the standby system, but 2
It is also possible for two systems to mutually operate as a regular system and a standby system.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明によれば、バックアップ機能
を備えたプログラマブルコントローラのメインテナンス
が容易になり、操作面でも効率のよい調整が行えるプロ
グラマブルコントローラのバックアップ装置が得られる
As described above, according to the present invention, it is possible to obtain a backup device for a programmable controller that facilitates maintenance of a programmable controller equipped with a backup function and allows efficient adjustment in terms of operation.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例を示す回路図、第2図はバッ
クアップ装置の一般的な構成を示す系統図、第3図は従
来のバス切換装置の一例を示す回路図である。 1.2・・・中央演算処理装置(CP U)3.4・・
・プログラム記憶装置(PM)5・・・バス切換装置 
 6・・・入出力装置(Ilo)50、51・・・デー
タ記憶装置!(DM)52・・・バス切換制御回路 5
3・・・バス切換回路54・・・手動切換回路 100、101.102・・・システムバス200、2
01・・・ヘルシイ信号 300.301・・・手動切換信号 400、401・・・切換指令信号 500、501・・・バス切換信号 代理人弁理士猪股祥晃 (ほか1名) <1lPFI秀)        (符戦系)第  1
(!! (〕帛@#)           (J部門トR;而
i)第  2  図 (犀用刷         (符戦是)第  3  図
FIG. 1 is a circuit diagram showing an embodiment of the present invention, FIG. 2 is a system diagram showing a general configuration of a backup device, and FIG. 3 is a circuit diagram showing an example of a conventional bus switching device. 1.2... Central processing unit (CPU) 3.4...
・Program storage device (PM) 5...Bus switching device
6... Input/output device (Ilo) 50, 51... Data storage device! (DM)52...Bus switching control circuit 5
3...Bus switching circuit 54...Manual switching circuit 100, 101.102...System bus 200, 2
01...Healthy signal 300.301...Manual switching signal 400, 401...Switching command signal 500, 501...Bus switching signal Attorney Yoshiaki Inomata (and 1 other person) <1lPFI Hide) ( Battle system) 1st
(!! (〕帛@#) (J Division トR; I) Figure 2 (Saiyo Printing (Fuwarze)) Figure 3

Claims (1)

【特許請求の範囲】[Claims] 常用系のプログラマブルコントローラが異常になったと
き、システムバスを自動的に待機系のプログラマブルコ
ントローラに切換えて制御動作をバンプレスに継続させ
るバス切換装置を備えたプログラマブルコントローラの
バックアップ装置において、常用系と待機系との間でス
キャニング実行に同期して強制的にシステムバスを切換
える手動切換回路を備えたことを特徴とするプログラマ
ブルコントローラのバックアップ装置。
A backup device for a programmable controller equipped with a bus switching device that automatically switches the system bus to a standby programmable controller to continue control operations bumplessly when the regular programmable controller becomes abnormal. A backup device for a programmable controller, comprising a manual switching circuit for forcibly switching a system bus between a standby system and a system bus in synchronization with scanning execution.
JP60062056A 1985-03-28 1985-03-28 Back up device for programmable controller Pending JPS61221941A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60062056A JPS61221941A (en) 1985-03-28 1985-03-28 Back up device for programmable controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60062056A JPS61221941A (en) 1985-03-28 1985-03-28 Back up device for programmable controller

Publications (1)

Publication Number Publication Date
JPS61221941A true JPS61221941A (en) 1986-10-02

Family

ID=13189102

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60062056A Pending JPS61221941A (en) 1985-03-28 1985-03-28 Back up device for programmable controller

Country Status (1)

Country Link
JP (1) JPS61221941A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE112015006264B4 (en) 2015-04-22 2018-11-22 Mitsubishi Electric Corporation Programmable logic controller, slave device and duplex system

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52122444A (en) * 1976-04-07 1977-10-14 Hitachi Ltd Connection changeover monitoring unit
JPS57109081A (en) * 1980-12-26 1982-07-07 Omron Tateisi Electronics Co Manual switching system of dual-processor system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52122444A (en) * 1976-04-07 1977-10-14 Hitachi Ltd Connection changeover monitoring unit
JPS57109081A (en) * 1980-12-26 1982-07-07 Omron Tateisi Electronics Co Manual switching system of dual-processor system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE112015006264B4 (en) 2015-04-22 2018-11-22 Mitsubishi Electric Corporation Programmable logic controller, slave device and duplex system
US10234841B2 (en) 2015-04-22 2019-03-19 Mitsubishi Electric Corporation Programmable logic controller, slave device, and duplex system

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