JPS5831626A - Level converter for digital signal - Google Patents

Abstract

PURPOSE:To attenuate or amplify a digital signal without conversion of the signal into an analog signal, by multiplying a multiplier stored in a storage circuit in advance with an input digital signal digitally. CONSTITUTION:A signal digitizing an analog signal into a linear code is inputted to a terminal 1. A synchronizing signal of this input digital signal is given to a control signal generating circuit 5 via a phase synchronizing circuit 4 from a terminal 3. A plurality of multipliers for the level conversion of the input digital signal are stored in advance in a storage device 8, and one of the multipliers is read out at a switch circuit 9 and inputted to a multiplication circuit 6, which multiplies the multipliers from the storage circuit 8 to the digital signal from the terminal 1 based on the control signal from the control signal generating circuit 5 and outputs the result to an output terminal 2.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a digital signal level conversion device suitable for testing and maintenance of digital communication equipment.

In particular, the present invention relates to a digital signal level varying device that can arbitrarily vary the level of a digitized signal to a predetermined value.

In a voice band analog telephone line, attenuators with different attenuation amounts are interposed in series in advance on the telephone line, and the attenuator is selected as appropriate and inserted into the @ line, and the input signal is The attenuation can be increased or decreased to convert the analog telephone line to a desired level value. However, there is no equivalent for digital telephone lines, and in order to convert to the desired level value, the digital signal must be converted back to an analog signal and passed through an attenuator to the desired level.
It was converted back into a digital signal and sent out over a digital line.

In recent years, the number of digital telephone lines has increased, and there is a demand for a device that can convert the level of a digital signal as it is for testing and maintenance purposes.

The present invention was made against this background, and an object of the present invention is to provide a device with a simple configuration that can change the level of a digital signal as it is.

The present invention stores in advance the conditions necessary for rounding to convert the level of an input signal in a storage circuit, and performs arithmetic processing on the input signal based on the stored contents while synchronizing with the input signal. It is characterized by converting it into a signal of a predetermined level and outputting it.

Hereinafter, the configuration and operation of the present invention will be explained based on the drawings of the embodiments.

FIG. 1 is a block diagram of an apparatus according to a first embodiment of the present invention.

To the input terminal IKe:t of this device, a signal digitized with a linear code is applied. That is, input terminal IK
The analog signal is sampled at equal time intervals, the sampled values are digitized into linear codes, and a good signal is input. A digital signal corresponding to a value obtained by arbitrarily attenuating the analog value of this digitized signal by 1 is sent to the output terminal 2.

A synchronization signal of the signal applied to the terminal IK is input to the terminal 3, and this is applied to the synchronization circuit 4. This synchronous circuit 4I
It is composed of a fi phase synchronization circuit (pbr), and performs a phase comparison [F
] The phases are controlled so that they always match. This output signal is supplied to the control signal generation circuit 5 as a basic control signal,
be provided. Five control signal generation circuits generate control signals for controlling the multiplier circuit 6. As a result, the multiplication circuit 6
operates in synchronization with the synchronization signal applied to terminal 1.

The multiplier circuit 6 is supplied with an input signal at a terminal l. Further, the multiplier digit of this multiplier circuit 6 is a signal read out from the storage circuit 8. In this memory circuit 8, a large number of multipliers to be multiplied for level conversion are stored in advance for each address. give. The switch circuit 9 is a rotary dial changeover switch, and the corresponding analog attenuation amount is displayed in decibels.

The multiplication result obtained by the multiplication circuit 6 is sent to the output terminal 2.

With nine devices configured in this way, - for example, an input terminal IK
If we consider the case where the given digital signal has a value of XK, which attenuates by 101B of the analog value, the multiplier is 20724, which is the digital value of the output signal! performs the operation 5536, where the denominator 65554 is 216, meaning the operation of multiplying X by 20724 and cutting off the lower 16 bits.

Regarding this constant, if Mu is a constant for performing level conversion of B decibels, it is generally Mu or Mu -2×10-π.

In particular, when the multiplication circuit 6 performs such calculations, the digital signal obtained at the output terminal 2 is a level-converted signal of the digital signal applied to the input terminal 1.

FIG. 2 is a diagram showing the configuration of a second embodiment of the present invention.

This example is a device configured to perform an arbitrary amount of amplification and attenuation on the digital signal at the input terminal 1. In this embodiment, the shift circuit 10 is placed in the position of the multiplier circuit 6.
There are 41 signs in nine places.

This shift circuit 10 shifts the digits of the digital signal,
Effectively, it is multiplied by a power of 2. Thereafter, by applying a predetermined amount of attenuation in the multiplication circuit 6, it is possible to perform amplification by an arbitrary amount. As in the first embodiment described above, if the shift amount of the shift circuit 10 is set to 0 and the multiplier circuit 6 is operated, an arbitrary amount of attenuation can be achieved. shift circuit 10
can also be provided after the multiplier circuit 6.

FIG. 3 is a block diagram of an apparatus according to a third embodiment of the present invention.

This example is a device configured to perform arbitrary amplification or attenuation on an input signal digitized with a non-linear code.

In the apparatus shown in FIG. 3, 1. A decoding circuit 11 for returning a non-linear code to a linear code is provided before the shift circuit 10, and 1+
A feature is that a code circuit 12 for converting a linear code into a non-linear code is provided after the multiplier circuit 6. As a result, even for POM signals digitized with non-linear codes,
Any amount of amplification or attenuation can be performed.

As explained above, Honji F! According to jIK, the signal level can be changed freely without converting the digitized signal back to an analog signal using an independent device. Furthermore, since the output signal is synchronized with the synchronization signal, it can be output at the same timing as the input signal. Since the level conversion is performed on the digital signal, the amount of conversion is accurate, and no distortion or noise or unnecessary level changes are imparted to the signal.

The device of the present invention connects to the input/output terminal of the POM at the telephone office via a link, etc., converts the level of the POM signal as appropriate and transmits it, and evaluates the value at the other party's telephone office. It is possible to test the transmission characteristics of a line.

[Brief explanation of drawings]

FIG. 1 is a configuration diagram of an apparatus according to a first embodiment of the present invention. FIG. 2 is a configuration diagram of an apparatus according to a second embodiment of the present invention. FIG. 3 is a configuration diagram of an apparatus according to a third embodiment of the present invention. 6...-Multiplication circuit, 8... Memory circuit, 9-... Switch circuit, lO... Shift circuit. Patent applicant representative child 1 Figure M 2 [1

Claims (3)

[Claims] (1) A memory circuit in which the ninth multiplier for level conversion of a digitized signal is stored in a separate address for each level conversion amount, a switch circuit that specifies the read address of this memory circuit, and an input digital A digital signal level conversion device comprising: a multiplier circuit that multiplies a signal by a multiplier read from an address designated by the switch circuit; and a circuit that synchronously controls the operation of the multiplier circuit. (2) 1. before or after the multiplication circuit. A digital signal level conversion device according to claim (1), comprising a shift circuit for performing digit shift of a digital signal. (3) Claim (1) or (2) in which the display of the switch circuit is expressed by the decibel value of the amount of level conversion.
The digital signal level conversion device described in 2.