JPS5831457A - デ−タ処理装置 - Google Patents

デ−タ処理装置

Info

Publication number
JPS5831457A
JPS5831457A JP56129105A JP12910581A JPS5831457A JP S5831457 A JPS5831457 A JP S5831457A JP 56129105 A JP56129105 A JP 56129105A JP 12910581 A JP12910581 A JP 12910581A JP S5831457 A JPS5831457 A JP S5831457A
Authority
JP
Japan
Prior art keywords
shift
logic
flop
flip
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56129105A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6141426B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html
Inventor
Hisayoshi Tsubo
坪　尚義
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP56129105A priority Critical patent/JPS5831457A/ja
Publication of JPS5831457A publication Critical patent/JPS5831457A/ja
Publication of JPS6141426B2 publication Critical patent/JPS6141426B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751—Error or fault detection not based on redundancy
    • G06F11/0754—Error or fault detection not based on redundancy by exceeding limits
    • G06F11/076—Error or fault detection not based on redundancy by exceeding limits by exceeding a count or rate limit, e.g. word- or bit count limit

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
JP56129105A 1981-08-17 1981-08-17 デ−タ処理装置 Granted JPS5831457A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56129105A JPS5831457A (ja) 1981-08-17 1981-08-17 デ−タ処理装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56129105A JPS5831457A (ja) 1981-08-17 1981-08-17 デ−タ処理装置

Publications (2)

Publication Number Publication Date
JPS5831457A true JPS5831457A (ja) 1983-02-24
JPS6141426B2 JPS6141426B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1986-09-16

Family

ID=15001188

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56129105A Granted JPS5831457A (ja) 1981-08-17 1981-08-17 デ−タ処理装置

Country Status (1)

Country Link
JP (1) JPS5831457A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63123135A (ja) * 1986-11-13 1988-05-26 Nec Corp シフトパス診断方式
JPS63280342A (ja) * 1987-05-13 1988-11-17 Nec Corp シフトパス故障診断装置

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63123135A (ja) * 1986-11-13 1988-05-26 Nec Corp シフトパス診断方式
JPS63280342A (ja) * 1987-05-13 1988-11-17 Nec Corp シフトパス故障診断装置

Also Published As

Publication number Publication date
JPS6141426B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1986-09-16

Similar Documents

Publication Publication Date Title
Clark et al. IC-Prolog language features
Foata A combinatorial proof of the Mehler formula
JPH1063707A (ja) 論理回路検証装置および論理回路検証方法
US5657484A (en) Method for carrying out a boolean operation between any two bits of any two registers
US20090012771A1 (en) Transaction-based system and method for abstraction of hardware designs
Berger et al. Fault detection in fanout-free combinational networks
JPS5831457A (ja) デ−タ処理装置
CN114371998A (zh) 一种基于考虑约束的并行广度优先搜索的架构测试方法
US3898444A (en) Binary counter with error detection and transient error correction
Kleijn et al. Process semantics of P/T-Nets with inhibitor arcs
JPS58151646A (ja) 加算器用オ−バ−フロ−検出器
Klaudel et al. Communication as unification in the Petri Box Calculus
US6637009B2 (en) Optimization of a logic circuit having a hierarchical structure
Mukund Finite-state automata on infinite inputs
Abdi et al. Packing odd T‐joins with at most two terminals
Rutten A structural co-induction theorem
JPS61500990A (ja) 浮動小数点条件符号生成方式
US2974309A (en) Magnetic core logical circuits
Johannes et al. SLOCOP-II: A versatile timing verification system for MOSVLSI
Lischner Enumerations
JPH06314229A (ja) 連関構造を用いた知識表現方法
Panangaden A Proof System for Dataflow
Moitra et al. A Proof System for Dataflow Networks with Indeterminate Modules
SU1179339A1 (ru) Микропрограммное устройство управлени
de Boer Reasoning about histories in object-based distributed systems