JPS5830331U - oscillation circuit - Google Patents

oscillation circuit

Info

Publication number
JPS5830331U
JPS5830331U JP12391881U JP12391881U JPS5830331U JP S5830331 U JPS5830331 U JP S5830331U JP 12391881 U JP12391881 U JP 12391881U JP 12391881 U JP12391881 U JP 12391881U JP S5830331 U JPS5830331 U JP S5830331U
Authority
JP
Japan
Prior art keywords
oscillation circuit
comparators
comparator
reference voltage
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12391881U
Other languages
Japanese (ja)
Inventor
信一 三宅
安部 文紀
Original Assignee
三洋電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三洋電機株式会社 filed Critical 三洋電機株式会社
Priority to JP12391881U priority Critical patent/JPS5830331U/en
Publication of JPS5830331U publication Critical patent/JPS5830331U/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の実施例を示す回路図、第2図は第1図
に示された回路の各部波形図である。 1.2・−・第1及び第2のコンパレータ、3・・・イ
ンバータ、4・・・フリップフロップ、5.6・・・N
ANDゲート、7・・・Pチャンネルトランジスタ、8
・・・Nチャンネルトランジスタ。
FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG. 2 is a waveform diagram of each part of the circuit shown in FIG. 1.2...First and second comparators, 3...Inverter, 4...Flip-flop, 5.6...N
AND gate, 7...P channel transistor, 8
...N-channel transistor.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 第1め基準電圧を有する第1のコンパレータと、第2の
基準電圧を有する第2のコンパレータと、該第1及び第
2のコンパレータの出力に依りセットあるいはリセット
されるフリップフロップと、該フリップフロップの出力
に依り充放電が制御されるチャージポンプ回路とを備え
該チャージポンプ回路の出力を前記第1及び第2のコン
パレータの入力に共通に印加することを特徴とする発振
回路。
a first comparator having a first reference voltage; a second comparator having a second reference voltage; a flip-flop that is set or reset depending on the outputs of the first and second comparators; and a charge pump circuit whose charging and discharging are controlled by the output of the oscillation circuit, wherein the output of the charge pump circuit is commonly applied to the inputs of the first and second comparators.
JP12391881U 1981-08-20 1981-08-20 oscillation circuit Pending JPS5830331U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12391881U JPS5830331U (en) 1981-08-20 1981-08-20 oscillation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12391881U JPS5830331U (en) 1981-08-20 1981-08-20 oscillation circuit

Publications (1)

Publication Number Publication Date
JPS5830331U true JPS5830331U (en) 1983-02-28

Family

ID=29917805

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12391881U Pending JPS5830331U (en) 1981-08-20 1981-08-20 oscillation circuit

Country Status (1)

Country Link
JP (1) JPS5830331U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02230821A (en) * 1989-03-03 1990-09-13 Hitachi Ltd Clock generator and information processing system using the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02230821A (en) * 1989-03-03 1990-09-13 Hitachi Ltd Clock generator and information processing system using the same

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