JPS5827662B2 - Insulating film quality evaluation method - Google Patents

Insulating film quality evaluation method

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Publication number
JPS5827662B2
JPS5827662B2 JP13492977A JP13492977A JPS5827662B2 JP S5827662 B2 JPS5827662 B2 JP S5827662B2 JP 13492977 A JP13492977 A JP 13492977A JP 13492977 A JP13492977 A JP 13492977A JP S5827662 B2 JPS5827662 B2 JP S5827662B2
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JP
Japan
Prior art keywords
film
voltage
conductive
liquid crystal
insulating film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP13492977A
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Japanese (ja)
Other versions
JPS5467776A (en
Inventor
直 西岡
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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Priority to JP13492977A priority Critical patent/JPS5827662B2/en
Publication of JPS5467776A publication Critical patent/JPS5467776A/en
Publication of JPS5827662B2 publication Critical patent/JPS5827662B2/en
Expired legal-status Critical Current

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  • Investigating Or Analyzing Materials By The Use Of Electric Means (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Description

【発明の詳細な説明】 この発明は、半導体基板または導電性基板の上に形成さ
れた絶縁膜の膜質評価法に係る。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for evaluating the quality of an insulating film formed on a semiconductor substrate or a conductive substrate.

半導体基板上の絶縁膜の膜質は、半導体装置の製造歩留
、信頼性に極めて大きな影響をおよぼす。
The quality of the insulating film on the semiconductor substrate has an extremely large effect on the manufacturing yield and reliability of semiconductor devices.

可動性イオン、ピンホール欠陥、局部的に電気的絶縁耐
圧の弱くなっている欠陥の存在している不良膜質の絶縁
膜を用いては、高い製造歩留と高信頼性の半導体装置の
製造は望めない。
It is difficult to manufacture semiconductor devices with high manufacturing yield and high reliability using an insulating film of poor quality that contains mobile ions, pinhole defects, and defects that locally weaken the electrical withstand voltage. I can't hope.

したがって半導体工業においては、これら欠陥のない成
膜技術が要求される訳だが、その成膜技術の向上のため
には詳しく膜質を評価する必要がある。
Therefore, in the semiconductor industry, there is a demand for film formation technology that is free of these defects, but in order to improve the film formation technology, it is necessary to evaluate film quality in detail.

可動性イオン、ピンホール欠陥、耐圧不良欠陥を検出し
、膜質を評価する従来の代表的な方法として、金属(M
)、絶縁膜(■ユ半導体(S)のサンドインチ構造から
なるいわゆるMISキャパシタ法がある。
As a typical conventional method for detecting mobile ions, pinhole defects, and voltage resistance defects and evaluating film quality, metal (M
), a so-called MIS capacitor method consisting of a sandwich structure of an insulating film (1) semiconductor (S).

この方法は可動性イオンについての膜質評価にすぐれて
いるが、次の欠点がある。
Although this method is excellent in evaluating film quality regarding mobile ions, it has the following drawbacks.

すなわち比較的広面積の絶縁膜に対して評価する場合や
、定面積の絶縁膜に対して稠密に評価する場合には、こ
れら絶縁膜の上へ多数の導電性電極群を形成し、半導体
基板と個々の導電性電極の間に電圧を印加し、両者間の
静電容量や耐圧、リーク電流を測定する操作を全導電性
電極にわたって行い、導電性電極群の幾例学的配置に対
応させて、これら測定値をマツピングしなければならな
い。
In other words, when evaluating an insulating film with a relatively wide area, or when performing a dense evaluation on an insulating film with a constant area, a large number of conductive electrode groups are formed on these insulating films, and the semiconductor substrate is A voltage is applied between the conductive electrode and each conductive electrode, and the capacitance, withstand voltage, and leakage current between them are measured across all the conductive electrodes, and the results are adjusted to correspond to the geometrical arrangement of the conductive electrode group. These measurements must then be mapped.

この個々の導電性電極による測定は詳細な電気的測定結
果が得られる反面、欠陥の分布を詳細に観測しようとず
れは、絶縁膜上に形成した多数の導電性電極の個々に対
して測定しなければならないから、すべての導電性電極
にわたり迅速に緩測するには高価な自動測定装置とマツ
ピング装置を要する欠点がある。
Although measurements using individual conductive electrodes can provide detailed electrical measurement results, in order to observe defect distribution in detail, it is difficult to measure deviations by measuring individual conductive electrodes formed on an insulating film. This has the disadvantage that rapid measurement across all conductive electrodes requires expensive automated measuring and mapping equipment.

また個々の導電性電極へ電気的接続を行うための探針を
必要とするから導電性電極の寸法をあまり小さくするこ
とのできない欠点がある。
Furthermore, since a probe is required to make an electrical connection to each conductive electrode, there is a drawback that the dimensions of the conductive electrode cannot be made very small.

この探針による電気的接続では、探針の先が導電性電極
を傷つけるはかりでなく、導電性電極下の絶縁膜をも傷
つけてしまう恐れもある。
In this electrical connection using a probe, the tip of the probe may not only damage the conductive electrode, but also the insulating film under the conductive electrode.

さらに絶縁膜の欠陥分布の緩測結果は、マツピング装置
によってはじめて具現化され、半導体基板上で直接に観
測者の視覚に訴えられない欠点もある。
Furthermore, the results of gradual measurement of the defect distribution in the insulating film are realized only by a mapping device, and there is also the drawback that they cannot be directly visualized by the observer's eyes on the semiconductor substrate.

この発明は、可動性イオンについての評価を除く、ピン
ホール欠陥、耐圧不良欠陥の評価に関し、従来のMIS
キャパシタ法の欠点をネマチック液晶の動的散乱現象を
応用して除去し、かつ絶縁膜にかかる電界強度を変化さ
せることにより詳細な膜質評価を行なおうとするもので
ある。
This invention relates to the evaluation of pinhole defects and defective voltage resistance defects, excluding the evaluation of mobile ions, compared to conventional MIS.
The aim is to eliminate the drawbacks of the capacitor method by applying the dynamic scattering phenomenon of nematic liquid crystals, and to perform detailed film quality evaluation by varying the electric field strength applied to the insulating film.

以下図面を参照しながら、本発明について詳しく説明す
ることにする。
The present invention will be described in detail below with reference to the drawings.

なお、説明では、半導体基板としてけい素(Si)基板
、絶縁膜として二酸化けい素(S 102)膜、導電性
電極としてアルミニウム(Al)電極を用いた場合につ
いて述べる。
In the description, a case will be described in which a silicon (Si) substrate is used as the semiconductor substrate, a silicon dioxide (S102) film is used as the insulating film, and an aluminum (Al) electrode is used as the conductive electrode.

第1図は、液晶の動的散乱現象によってピンホール欠陥
、耐圧不良欠陥が検出できる原理を説明するための断面
図である。
FIG. 1 is a cross-sectional view for explaining the principle by which pinhole defects and breakdown voltage defects can be detected by the dynamic scattering phenomenon of liquid crystal.

図において、被評価試料100は、Si基板1の上に5
in2膜2が形成されている。
In the figure, a sample to be evaluated 100 is placed on a Si substrate 1.
An in2 film 2 is formed.

S t 02膜2には欠陥3を含んでいるものとする。It is assumed that the S t 02 film 2 includes a defect 3.

この欠陥3はSiO2膜2に電界を加えるまえに存在し
ていた欠陥や電界を加えたために生じた欠陥で、ピンホ
ール欠陥や耐圧不良欠陥を示すものである。
This defect 3 is a defect that existed before the electric field was applied to the SiO2 film 2 or a defect that occurred due to the application of the electric field, and indicates a pinhole defect or a defect with poor breakdown voltage.

S i02膜2の全面にわたり、公知のAA蒸着技術と
写真食刻技術により多数のAd電極4を形成する。
A large number of Ad electrodes 4 are formed over the entire surface of the Si02 film 2 using known AA vapor deposition techniques and photolithography techniques.

次にAd電極4の上にネマチック液晶膜5を被覆する。Next, the Ad electrode 4 is coated with a nematic liquid crystal film 5.

この場合Al電極4の存在しない部分のS i 02膜
2上にネマチック液晶膜5が被覆されてもよい。
In this case, the nematic liquid crystal film 5 may be coated on the S i 02 film 2 in the portion where the Al electrode 4 is not present.

つづいてネマチック液晶膜5の上にネマチック液晶膜5
と接触させて透明導電膜6を載置する。
Next, the nematic liquid crystal film 5 is placed on the nematic liquid crystal film 5.
The transparent conductive film 6 is placed in contact with the transparent conductive film 6.

透明導電膜6は薄膜であるから通常ではガラス板1に被
着されている。
Since the transparent conductive film 6 is a thin film, it is normally adhered to the glass plate 1.

また透明導電膜6とAl電極4の電気的短絡を防ぎ、動
的散乱現象を生じせしめるに十分かつ均一な膜厚のネマ
チック液晶膜5を確保するため、被評価試料100の周
辺のAl電極4と透明導電膜6の間に開孔を有するポリ
エチレンフィルムのごとき絶縁スペーサ8を介在させて
おく。
In addition, in order to prevent electrical short-circuiting between the transparent conductive film 6 and the Al electrode 4 and to ensure a nematic liquid crystal film 5 with a sufficient and uniform thickness to cause a dynamic scattering phenomenon, the Al electrode 4 is placed around the sample 100 to be evaluated. An insulating spacer 8 such as a polyethylene film having openings is interposed between the transparent conductive film 6 and the transparent conductive film 6 .

次にSi基板1を正電位、透明導電膜6を負電位として
、直流電圧値を変えられる直流電源9により直流電圧を
Si基板1と透明導電膜6の間に印加する。
Next, with the Si substrate 1 at a positive potential and the transparent conductive film 6 at a negative potential, a DC voltage is applied between the Si substrate 1 and the transparent conductive film 6 using a DC power supply 9 whose DC voltage value can be changed.

直流電圧がネマチック液晶膜5に動的散乱現象を生じせ
しめるしきい値以上であり、欠陥3がAl電極4とSi
基板1の間で電気的漏洩をもたらすピンホール欠陥なら
ば、欠陥3のあるAl電極41の上のネマチック液晶膜
5は動的散乱現象を発生して白濁して見える。
The DC voltage is above the threshold value that causes a dynamic scattering phenomenon in the nematic liquid crystal film 5, and the defect 3 is connected to the Al electrode 4 and Si
If it is a pinhole defect that causes electrical leakage between the substrates 1, the nematic liquid crystal film 5 on the Al electrode 41 with the defect 3 will generate a dynamic scattering phenomenon and appear cloudy.

また、直流電圧がしきい値以上であり、かつSiO2膜
2中の絶縁耐圧の低い箇所を絶縁破かいさせる直流電圧
であるならば、欠陥3は耐圧不良欠陥としてA7電極4
とSi基板1の間を電気的漏洩状態とさせるので、前述
のごとく動的散乱現象による白濁が見える。
Further, if the DC voltage is higher than the threshold value and is a DC voltage that breaks the insulation at a location where the dielectric strength is low in the SiO2 film 2, the defect 3 is considered to be a voltage failure defect in the A7 electrode 4.
Since electrical leakage occurs between the Si substrate 1 and the Si substrate 1, clouding due to the dynamic scattering phenomenon is visible as described above.

ネマチック液晶膜5として膜厚約10μmのMBBA膜
を用いるならば、この膜面に垂直な抵抗は108Ω/
cm2以下であり、5102膜2の膜厚が1oooXで
あれば、この膜面に垂直な抵抗は101)Ω/α2以上
である。
If an MBBA film with a thickness of about 10 μm is used as the nematic liquid crystal film 5, the resistance perpendicular to the film surface is 108Ω/
cm2 or less, and if the film thickness of the 5102 film 2 is 1oooX, the resistance perpendicular to the film surface is 101)Ω/α2 or more.

またネマチック液晶のしきい値電圧は一般にIOV前後
である。
Further, the threshold voltage of a nematic liquid crystal is generally around IOV.

さらに半導体工業で用いられるS 102膜2の絶縁耐
圧は107v/Crl1近くの電界強度に対応するもの
である。
Furthermore, the dielectric breakdown voltage of the S102 film 2 used in the semiconductor industry corresponds to an electric field strength near 107v/Crl1.

第2図は、ネマチック液晶膜5が欠陥3により白濁して
見えるAl電極41と、欠陥3のないためネマチック液
晶膜5の白濁なしで見えるAl電極42の両者の共存す
る被評価試料100の上面図である。
FIG. 2 shows the top surface of a sample to be evaluated 100 in which both an Al electrode 41 in which the nematic liquid crystal film 5 appears cloudy due to defects 3 and an Al electrode 42 in which the nematic liquid crystal film 5 does not appear cloudy due to the absence of defects 3 coexist. It is a diagram.

図では透明導電膜6や直流電源9等を図示していないが
、被評価試料100のはゾ全面にわたり、欠陥3の存在
分布をネマチック液晶膜5の白濁して見えるA7電極4
1と白濁なしで見えるAl電極42の分布として一目瞭
然と知ることができ、膜質の均一性を評価できる。
Although the transparent conductive film 6, DC power supply 9, etc. are not shown in the figure, the presence distribution of defects 3 can be seen over the entire surface of the sample 100 to be evaluated, and the A7 electrode 4 of the nematic liquid crystal film 5 appears cloudy.
1 and the distribution of the Al electrode 42 visible without cloudiness can be clearly seen, and the uniformity of the film quality can be evaluated.

また白濁して見えるA7電極41の観察なので探針は不
要である。
Further, since the A7 electrode 41 is observed as cloudy, a probe is not required.

本発明は、第1図および第2図で説明した装置構成、欠
陥の検出、表示で、以下に述べる操作を行うものである
The present invention performs the operations described below using the apparatus configuration, defect detection, and display described in FIGS. 1 and 2.

第3図は、Si基板1と透明導電膜6の間の直流電圧■
を変化させたときの、欠陥3を含んでいるために動的散
乱現象で白濁して見えるAl電極41の数の変化の一例
を示す。
FIG. 3 shows the DC voltage between the Si substrate 1 and the transparent conductive film 6.
An example of a change in the number of Al electrodes 41 that appear cloudy due to a dynamic scattering phenomenon due to the inclusion of defects 3 when changing is shown.

図において、vthは、ネマチック液晶膜5を動的散乱
状態にさせるしきい値である。
In the figure, vth is a threshold value that causes the nematic liquid crystal film 5 to enter a dynamic scattering state.

まず直流電圧をVthより若干大きい値のV。First, set the DC voltage to V, which is slightly larger than Vth.

に設定し、この時の白濁して見えるAl電極41数のN
At this time, the number of Al electrodes 41 that appeared cloudy was N.
.

を計数する。つづいて1M流電圧を■。Count. Next, 1M current voltage ■.

より△Vだけ大きい■1=■o+△Vとし、この時の白
濁して見えるAl電極41数の、N1を計数する。
Set ■1=■o+ΔV, which is larger by ΔV, and count N1, the number of 41 Al electrodes that appear cloudy at this time.

つづいて直流電圧を■。に戻し白濁して見えるAA電極
41数のN10を計数する。
Next, look at the DC voltage■. The number N10 of the 41 AA electrodes that appear cloudy is counted.

つづいて直流電圧を■2=■o+2△■とし、この時の
白濁して見えるAl電極41数のN2を計数する。
Next, the DC voltage is set to ■2=■o+2Δ■, and N2 of the number of 41 Al electrodes that appear cloudy at this time is counted.

つづいて直流電圧を■、に戻し白濁して見えるAl電極
41数のNiを計数する。
Subsequently, the DC voltage was returned to (2), and the Ni on the Al electrode 41, which appeared cloudy, was counted.

以下同様に■。Similarly below ■.

−Vo + nΔ■の時の白濁して見えるAl電極41
数のNnとvn+1−vo十(n+1)△■にしたのち
■。
-Vo + nΔ■ Al electrode 41 appears cloudy
After making the numbers Nn and vn+1-vo ten(n+1)△■■.

に戻した時の白濁して見えるA、l電極41数のN′を
計数する。
Count the number N' of the 41 A and L electrodes that appear cloudy when returned to normal.

こうした操作によるNnは、ピンホール欠陥により白濁
して見えるAl電極41数のNと直流電圧vnでの耐圧
不良欠陥により白濁して見えるAl電極41数のNnB
とから成っている。
Through these operations, the Nn of the 41 Al electrodes appear cloudy due to pinhole defects, and the NnB of the 41 Al electrodes appear cloudy due to defective withstand voltage at DC voltage vn.
It consists of.

またN′nは、ピンホール欠陥により白濁して見えるA
l電極41数のN と、さらに電圧増加分△Vを与えた
ため永久破壊を起した耐圧不良欠陥により白濁して見え
るAA電極41数のN′nBから成っている。
In addition, N'n is A that appears cloudy due to pinhole defects.
It consists of N, which is the number of 1 electrodes, and N'nB, which is the number of 41 AA electrodes, which appear cloudy due to a defect in voltage resistance that caused permanent breakdown due to the application of the voltage increase ΔV.

■oがvthより若干大きい値ならば、Noは、ピンホ
ール欠陥により白濁して見えるAA電極41数のN に
ほぼ等しい。
(2) If o is a value slightly larger than vth, No is approximately equal to N, which is the number of AA electrodes 41 that appear cloudy due to pinhole defects.

例えば、前述のネマチック液晶膜5と5i02膜2の例
の場合では、■oがvthより若干大きい10数Vであ
っても、SiO2膜2は絶縁破壊をほとんど起さないの
でN。
For example, in the case of the above-mentioned nematic liquid crystal film 5 and 5i02 film 2, even if o is a few tens of volts, which is slightly larger than vth, the SiO2 film 2 hardly causes dielectric breakdown, so N.

−N。となる。-N. becomes.

それゆえ〔1〕Noはピンホール欠陥により白濁して見
えるAl電極41数、〔2〕(Nn−No)は直流電圧
■ での耐圧不良欠陥により白濁して見えるAl電極4
1数、 (3,:] (]N、+1−Nnは直流電圧増
加分△■で新らたに発生した耐圧不良欠陥により白濁し
て見えるAl電極41数、〔4〕(N’−N)は直流電
圧増加分△■で発生した回 n 復不能な永久破壊の耐圧不良欠陥により白濁して見える
Al電極41数、 C51(Nn+1−N′n)は直流
電圧を△■たけ増加しても回復できる耐圧不良欠陥によ
り白濁して見えるAl電極41数を示すこととなる。
Therefore, [1] No is the number of Al electrodes 41 that appear cloudy due to pinhole defects, [2] (Nn-No) is the number of Al electrodes 4 that appear cloudy due to defective breakdown voltage at DC voltage ■.
1 number, (3,:] (]N, +1-Nn is the number of 41 Al electrodes that appear cloudy due to a newly generated breakdown voltage defect due to the DC voltage increase △■, [4] (N'-N ) is the number of times that occurred when the DC voltage increased by △■ n The number of 41 Al electrodes that appeared cloudy due to an irreversible and permanent breakdown voltage failure defect, C51 (Nn + 1 - N'n) is the number of times that occurred when the DC voltage was increased by △■ The number of Al electrodes 41 that appear cloudy due to defective breakdown voltage defects that can be recovered is also shown.

ここでAl電極4の寸法サイズを、通常の8102膜の
欠陥密度値から算出して、1個のAl電極4の下に1個
以下の欠陥3が存在するような寸法サイズよりも小さい
値として抽けば、白濁して見えるkl’=ki、極41
数は欠陥3数を示すようになる。
Here, the size of the Al electrode 4 is calculated from the defect density value of the normal 8102 film, and is set as a value smaller than the size where one or less defects 3 exist under one Al electrode 4. If you draw it, it will look cloudy kl' = ki, pole 41
The number now indicates 3 defects.

通常の場合にはAl電極4の寸法サイズを1〜2朋角と
すれば充分である。
In normal cases, it is sufficient that the size of the Al electrode 4 is 1 to 2 squares.

なおAll電極4隔隔dできるだけ小さい方がよく、こ
の間隔dは現在の写真食刻技術で極めて小さくすること
が可能である。
It is preferable that the distance d between the four All electrodes be as small as possible, and this distance d can be made extremely small using current photolithography techniques.

したがって、前述の〔1〕〜〔5〕を求めることにより
、SiO2膜2中のピンホール欠陥や耐圧不良欠陥など
の欠陥3の数および5IO2膜2面内の欠陥3の分布の
みならず、直流電圧VをV。
Therefore, by determining the above-mentioned [1] to [5], it is possible to determine not only the number of defects 3 such as pinhole defects and defective withstand voltage defects in the SiO2 film 2 and the distribution of defects 3 within the plane of the 5IO2 film 2, but also the DC Voltage V to V.

より△■づつ段階的に増加させることによる耐圧不良欠
陥の耐圧分布特性を知ることができ、詳細な膜質評価を
行なえる。
By increasing the voltage stepwise by △■, it is possible to know the breakdown voltage distribution characteristics of defects with breakdown voltage defects, and to perform detailed film quality evaluation.

なお、これまでの説明では、Si基板上の8102膜に
A7電極を設けた膜質評価法を例示したが、Si基板以
外のゲルマニウム(Ge)、ひ化ガリウム(GaAs)
などの半導体基板、アルミニウム(Aの、金(Au)な
どの導電性基板と、5i02膜以外の窒化けい素(s
13N4 、)、アルミナ(A1203)などの絶縁膜
に、AA電極以外の多結晶状のけい素(Si)、モリブ
デン(Mo)などの電極を構成体とする被評価試料に対
しても適用できるものである。
In addition, in the explanation so far, a film quality evaluation method in which an A7 electrode was provided on an 8102 film on a Si substrate was exemplified, but germanium (Ge), gallium arsenide (GaAs)
semiconductor substrates such as aluminum (A), conductive substrates such as gold (Au), and silicon nitride (s) other than 5i02 films.
13N4, ), alumina (A1203), etc., and electrodes other than AA electrodes such as polycrystalline silicon (Si) and molybdenum (Mo). It is.

以上詳しく説明したように、本発明による絶縁膜の膜質
評価法は、欠陥の数およびその位置分布の変化を、絶縁
膜に加わる電界強度を変えて、探針を要せず、絶縁膜の
はゾ全面にわたり、直接視覚によって知ることができる
ものであり、評価装置も高価でなく作業も簡単なもので
ある。
As explained in detail above, the method for evaluating the film quality of an insulating film according to the present invention evaluates changes in the number of defects and their positional distribution by changing the electric field strength applied to the insulating film, without the need for a probe, and by It is possible to know directly visually over the whole area, and the evaluation equipment is not expensive and the work is simple.

この評価法によって欠陥のない絶縁膜の成膜技術の向上
、ひいては高い製造歩留と高信頼性の半導体装置の製造
を期待できるものである。
This evaluation method can be expected to improve the technology for forming defect-free insulating films and, ultimately, to produce semiconductor devices with high production yields and high reliability.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の絶縁膜の膜質評価法で欠陥を検出でき
る原理を説明するための断面図、第2図は本発明の評価
法で絶縁膜面上の欠陥分布が分かることを示す被評価試
料の上面図、第3図は本発明の絶縁膜の膜質評価法を詳
細に説明するための直流印加電圧と欠陥数の関連図であ
る。 1はSi基板、2は5IO2膜、3は欠陥、4はAl電
極、5はネマチック液晶膜、6は透明導電膜、9は直流
電源、41はネマチック液晶膜5の動的散乱現象により
白濁して見えるAl電極、42は白濁なしで見えるAl
電極である。 なお、図中同一符号はそれぞれ同一または相当部分を示
す。
FIG. 1 is a cross-sectional view for explaining the principle by which defects can be detected by the insulating film quality evaluation method of the present invention, and FIG. FIG. 3, a top view of the evaluation sample, is a diagram showing the relationship between DC applied voltage and the number of defects for explaining in detail the method for evaluating the film quality of an insulating film according to the present invention. 1 is a Si substrate, 2 is a 5IO2 film, 3 is a defect, 4 is an Al electrode, 5 is a nematic liquid crystal film, 6 is a transparent conductive film, 9 is a DC power supply, 41 is cloudy due to the dynamic scattering phenomenon of the nematic liquid crystal film 5 42 is Al electrode visible without cloudiness.
It is an electrode. Note that the same reference numerals in the figures indicate the same or corresponding parts.

Claims (1)

【特許請求の範囲】 1 半導体基板または導電性基板の上に形成された絶縁
膜の上に導電性電極群を形成し、少なくとも導電性電極
群の上にネマチック液晶膜を被覆し、液晶膜と接触させ
て透明導電膜を載置し、半導体基板または導電性基板が
正電位、透明導電膜が負電位の直流電圧を半導体基板ま
たは導電性基板と透明導電膜との間に印加しながら動的
散乱現象を生じている液晶膜下の導電性電極数を計数す
る場合に、直流電圧値に増分を加えたのち増分を減じ、
増分を加えるまえと増分を加えた後減じた動的散乱現象
を伴う上記導電性電極数をそれぞれ計数する操作を直流
電圧値を増加させながら行うことを特徴とする絶縁膜の
膜質評価法。 2 増分を加えるまえの直流電圧値を、ネマチック液晶
の動的散乱現象発生のしきい値より若干大きい直流電圧
値に設定することを特徴とする特許請求の範囲第1項記
載の絶縁膜の膜質評価法。
[Claims] 1. A conductive electrode group is formed on an insulating film formed on a semiconductor substrate or a conductive substrate, a nematic liquid crystal film is coated on at least the conductive electrode group, and the liquid crystal film and A transparent conductive film is placed in contact with the transparent conductive film, and a DC voltage is applied between the semiconductor substrate or conductive substrate and the transparent conductive film, with the semiconductor substrate or conductive substrate at a positive potential and the transparent conductive film at a negative potential. When counting the number of conductive electrodes under the liquid crystal film that is causing the scattering phenomenon, add an increment to the DC voltage value, then subtract the increment,
A method for evaluating film quality of an insulating film, characterized in that the operation of counting the number of conductive electrodes accompanied by a dynamic scattering phenomenon that decreases before adding an increment and after adding an increment is performed while increasing a DC voltage value. 2. The film quality of the insulating film according to claim 1, characterized in that the DC voltage value before adding the increment is set to a DC voltage value slightly larger than the threshold value for the occurrence of the dynamic scattering phenomenon of the nematic liquid crystal. Evaluation method.
JP13492977A 1977-11-09 1977-11-09 Insulating film quality evaluation method Expired JPS5827662B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13492977A JPS5827662B2 (en) 1977-11-09 1977-11-09 Insulating film quality evaluation method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13492977A JPS5827662B2 (en) 1977-11-09 1977-11-09 Insulating film quality evaluation method

Publications (2)

Publication Number Publication Date
JPS5467776A JPS5467776A (en) 1979-05-31
JPS5827662B2 true JPS5827662B2 (en) 1983-06-10

Family

ID=15139843

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13492977A Expired JPS5827662B2 (en) 1977-11-09 1977-11-09 Insulating film quality evaluation method

Country Status (1)

Country Link
JP (1) JPS5827662B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57132045A (en) * 1981-02-09 1982-08-16 Seiko Epson Corp Pin hole tester

Also Published As

Publication number Publication date
JPS5467776A (en) 1979-05-31

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