JP2870785B2 - Inspection method for thin film transistor matrix substrate - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Summary] The present invention relates to a method of inspecting a liquid crystal drive thin film transistor (TFT) matrix substrate, and to efficiently repair defects in a TFT matrix substrate state, to efficiently evaluate TFT characteristics on the substrate in order to enable defect repair. A plurality of pixel electrodes and thin film transistors are arranged on an insulating substrate in a matrix so as to be inspected without damaging the display area, and the source electrodes of each of the thin film transistors correspond to each other. When inspecting a thin film transistor substrate having a bus line connected to a pixel electrode to be connected and commonly connecting the drain electrodes of the plurality of thin film transistors for each row or column, a predetermined number of bus lines made of a striped conductive film are formed in parallel. While arranging,
An insulating substrate having an insulating film formed on one main surface thereof including the bus line is prepared as an opposite substrate for inspection, and the insulating film surface of the opposite substrate for inspection and the surface of the thin film transistor substrate on which the thin film transistor is formed are separated. Detecting the AC signal output on the bus line on the thin film transistor matrix substrate in a state where the respective bus lines are brought into close contact with each other so as to be orthogonal to each other and the AC signal is input to the bus line on the inspection opposite substrate. And measuring a phase shift (φ) of the detected AC signal with respect to the input AC signal, and evaluating a channel resistance of the thin film transistor based on the phase shift.

[Industrial applications]

The present invention relates to a method of inspecting a liquid crystal driving thin film transistor (TFT) matrix substrate.

Since liquid crystal display devices have features such as low power consumption, light weight, and easy color display, they are gaining a wide market as flat display devices such as pocket TVs and OA terminal devices.
In particular, a thin film transistor driven active matrix type liquid crystal display device capable of obtaining a large-capacity and clear gradation display has been partially put into practical use and is being actively developed and studied at present.

In particular, display devices for information terminal equipment such as OA
Since display defects at points are not allowed, hundreds of thousands to millions of transistors added to each pixel can be produced at a high yield.
Along with the development of manufacturing technology to make it at low cost,
It is becoming increasingly important to develop an inspection technique for inspecting the completed TFT matrix substrate efficiently, without damaging the substrate, and in some cases, making corrections.

[Conventional technology]

Conventionally, as a method of inspecting a TFT matrix substrate, a method of applying a DC voltage between bus lines or to the TFT, measuring a current, and inspecting a disconnection, a short circuit, and TFT characteristics has been adopted.

In this inspection method, a probe (measurement probe) is brought into contact with the measurement terminal on the substrate. In particular, in the measurement of TFT characteristics, a probe for current measurement is brought into contact with the pixel electrode (source electrode) in the display area. Was necessary. Therefore, in this method, there is a risk that the display area may be damaged by the probe, and it takes time to measure a large number of TFTs because the probe is moved mechanically. Was.

On the other hand, after liquid crystal is sealed between a pair of substrates and completed as a liquid crystal display panel, actual display is performed.
Inspect the TFT matrix substrate for defects, or
As proposed by the present inventors in Japanese Patent Application No. 63-198625, the TFT characteristics are evaluated by measuring the dielectric loss and the capacitance between the bus lines of the TFT substrate and the opposing substrate.
Nondestructive methods for inspecting liquid crystal display panels have also emerged.

However, the method of inspecting a liquid crystal display panel after it has been completed has a problem that even if a defect is detected, the panel cannot be reconstructed if the panel is disassembled, and the panel must be repaired. Was impossible or extremely difficult.

[Problems to be solved by the invention]

As described above, conventionally, there is no method for inspecting the completed TFT substrate efficiently and without damaging the panel, and the already proposed nondestructive inspection method is for the completed liquid crystal display panel. However, even if a defect is detected, it is almost impossible to repair it, and the emergence of a substrate inspection method that can be executed in the state of a TFT substrate has been strongly desired.

Therefore, the present invention uses TF to enable defect repair.
An object of the present invention is to make it possible to efficiently evaluate the characteristics of TFTs on a substrate in a T matrix substrate state and to inspect the TFTs without damaging the display area.

[Means for solving the problem]

The principle of the present invention will be described with reference to FIGS. FIG. 3C is a sectional view taken along the line AA in FIG.

A counter substrate P 'for inspection is formed separately from the TFT substrate P. A bus line connected to the drain D of the thin film transistor T, for example, a striped bus line CB orthogonal to the drain bus line DB (referred to as an opposite bus line) CB, )
A predetermined number is formed on 1 and an insulating film (dielectric film) I is further formed thereon. The TFT substrate P and the opposing substrate P 'are opposed to each other with the insulating film I inside, and the two substrates are tightly fixed.

Next, the capacitance between the bus line (for example, the drain bus line DB) to which the drain D of the TFT substrate P is connected and the bus line CB of the counter substrate P ′, and the gate voltage dependence of the dielectric loss tanδ are measured. The TFT characteristics are evaluated by calculating the channel resistance based on the relationship described later.

As described above, when the opposite bus line CB has a striped pattern orthogonal to the bus line DB connected to the drain D, an AC signal is applied to a specific bus line CB, so that an intersection of the two bus lines is formed. Specific one located
TFT characteristics can be measured.

[Action]

FIG. 2 shows an equivalent circuit of a measurement system in which the TFT substrate P and the counter substrate P 'are in close contact with each other.

Complex impedance Z of the _{circuit, Z = [R B {R} 2 + (Z I + Z B) 2} + Z B 2 R-i {R 2 Z B + Z B Z I (Z
The _{I + Z B)}] /} {R 2 + (Z I + Z B) 2} ....... here, It is.

Therefore, in this system, a phase shift φ occurs between the input AC signal and the output AC signal. Since there is a relationship of φ = (π / 2) + δ between the phase shift φ and δ of the dielectric loss tanδ, either φ or tanδ is measured.

This dielectric loss tanδ is Becomes That is, tan δ is related to the channel resistance R of the TFT,
As R gradually decreases, the dielectric loss increases,
After _reaching a maximum at a certain value R = _Rmax , the function becomes a convex function that monotonously decreases as R further decreases.

When the value of R _max is Z _B , Z _I ≫R _B , Where the dielectric loss tan δ is maximal, that is, the phase shift φ is also maximal.

The channel resistance R of the TFT changes according to the change of the gate bias. As shown in FIG. 3, tan δ has a maximum value at the gate bias value corresponding to the measurement frequency (frequency of the applied AC signal) f. Therefore, at a certain gate bias value, tanδ
When but a reaches the maximum, the channel resistance R _max at the gate bias value, the measurement frequency f and C _I, can be determined immediately using the above formulas C _B. In this case, the value of the connected bus line resistance R _B to the drain electrode need not be known.

By using this relationship, you can change the gate bias
By measuring the frequency dependence of the gate bias value at which tan δ takes an extreme value, it is possible to easily evaluate the TFT characteristics.

That is, by changing the gate bias, the frequency dependence of the gate bias value at which tan δ takes an extreme value is obtained in advance. This relationship indicates the frequency f of the applied AC signal at which tan δ takes an extreme value at a certain gate bias.
If C _I and C _B are known, the above equation determines the channel resistance R _max with respect to the frequency f. Therefore, the channel resistance with respect to the gate bias can be easily obtained from the correspondence between the frequency f and the gate bias, and the TFT characteristics can be evaluated.

As described above, in the present invention, an AC signal is input to the opposing bus line CB, and the bus line D connected to the drain electrode of the TFT is connected.
By measuring the phase shift φ of the output AC signal detected at B, the TFT characteristics can be evaluated, so that the TFT characteristics can be measured without breaking the panel.

After the TFT characteristics have been inspected as described above, the TFT substrate is separated from the counter substrate for inspection. After that, the TFT substrate is sent to a repair or next paneling process.

In the present invention, a bus line DB on the TFT substrate P and a bus line CB on the counter substrate P 'are selected in a matrix without mechanically contacting a probe for electrical connection with the display portion. Thus, it is possible to perform measurement while electrically scanning each TFT characteristic.

〔Example〕

An embodiment of the present invention will be described below with reference to FIGS.

As shown in FIG. 1C, ITO is deposited on the glass substrate 1 to a thickness of about 200 nm by an ion plating method, and then patterned to form a stripe-shaped opposing bus line CB.

Next, polyimide is applied to a thickness of about 2 μm by spin coating, and heat treatment is performed at about 300 ° C. to form an insulating film (dielectric film) I.
[See FIG. 1 (b)] is completed.

This is superimposed on the TFT substrate P (see FIG. 1A) which has completed the TFT forming step, and is tightly fixed.

For measurement of capacitance and dielectric loss of 100 Hz or more, an LCR meter 4274A manufactured by YHP was used as shown in FIG.
For frequencies above 00 Hz, the phase shift φ [φ = (π / 2 + δ)] equivalent to the dielectric loss was measured using a lock-in amplifier.

 Hereinafter, the measurement method will be described.

First, as described above, the measurement system shown in FIG. 1D is configured to measure the insulation film capacitance C _I of the pixel electrode portion and the insulation film capacitance C _B of the bus line portion. The channel resistance R is large when the gate bias is low, and small when the gate bias is high. Therefore, the capacitance C is measured by changing the gate bias.

When the gate bias is low, the capacitance C is substantially equal to the capacitance C _B of the bus line portion, and when the gate bias is high, the capacitance C is the sum of the capacitance C _B and the capacitance C _I of the pixel electrode portion. Thus C _B and C _I is obtained from both.

The resistance R of the bus line DB connected to the drain electrode D
_B1 and the resistance R _B2 of the opposing bus line CB are values determined by design, and are substantially constant for each panel. Therefore, it can be determined by measuring the same type of liquid crystal panel.

As described above, C _I , C _B ,
Since four of R _B1 , R _B2 and R are known, the first
Constitute a measurement system of FIG. (D), while varying the gate bias inputs the AC signal to the counter bus line CB, a tanδ on the drain bus line DB is measured, the obtained measurement value and above C _I , C _B , R _B1 and R _B2 , the channel resistance R can be obtained from the above equation.

Further, if the gate bias value at which tan δ becomes a maximum is measured by changing the frequency, the gate bias and the channel resistance R
Since FIG. 3 is obtained between the time and, the channel resistance R can be easily obtained from the equation.

Since the LCR meter cannot measure a frequency range of 100 Hz or less, a phase shift φ of a signal having the same frequency as the output signal of the signal generator is determined for such a low frequency range by the lock-in amplifier. As described above, since φ can be immediately converted to δ, tan δ is obtained while changing the gate bias, as in the case of using the measurement system in FIG.
Alternatively, the channel resistance R of the TFT can be obtained by determining the frequency dependence of the gate bias value at which tan δ takes an extreme value. If you use a lock-in amplifier,
Measurement in a frequency range of 100 Hz or more is also possible, and measurement can be made over the entire range from the measurement system (d). However, in this measurement system, it is impossible to determine the C _I and C _B above, was combined with measurement circuit using an LCR meter to determine these (d).

FIG. 3 shows an example of the dielectric loss tan δ with respect to the gate bias obtained in this manner. The relationship between the obtained gate bias and the channel conductance (reciprocal of the channel resistance R) of the TFT, that is, the current is shown in FIG. 4
Shown in the figure.

Thus, according to this embodiment, the TFT characteristics can be evaluated without breaking the liquid crystal panel.

As described in the above embodiment, in the present invention, the phase shift φ between the applied AC signal and the AC signal detected on the bus line DB connected to the drain electrode D, or the tan δ corresponding to this φ is measured. By doing so, the characteristics of the internal thin film transistor can be evaluated without breaking the liquid crystal display panel.

The method for evaluating the characteristics of a thin film transistor according to the present invention can be applied to an active matrix type liquid crystal display device having any structure. For example, a gate connection type liquid crystal display in which an independent drain bus line is omitted, a gate electrode G is connected to one of two adjacent scan bus lines (gate bus lines), and a drain electrode D is connected to the other. In the device (see Japanese Patent Application No. 61-212696), an AC signal may be detected on the scan bus line to which the drain electrode D is connected.

〔The invention's effect〕

As described above, according to the present invention, a bus line connected to a drain on a TFT substrate and a counter bus line on a counter substrate are selected in a matrix without mechanically contacting the probe in the display area. This enables individual TFT characteristics to be measured while electrically scanning, so that the TFT characteristics on the TFT substrate can be inspected without damaging the display area, improving not only the inspection efficiency but also the defect. Restoration is also possible.

[Brief description of the drawings]

1 (a) to 1 (d) are diagrams for explaining the configuration of the present invention, FIG. 2 is a diagram showing an equivalent circuit for one pixel of a measuring system of the present invention, and FIG. FIG. 4 is a diagram showing a relationship between dielectric losses, and FIG. 4 is a diagram showing an example of characteristic evaluation according to an embodiment of the present invention. In the figure, 1 is an insulating substrate (glass substrate), P is a TFT substrate, P 'is a counter substrate, E is a pixel electrode, CB is a counter bus line, T is a thin film transistor, G is a gate electrode, D is a drain electrode,
DB bus line connected to the drain electrode, phi is a phase shift, tan [delta dielectric loss, C _I is the insulating film capacitance between the pixel electrode and the opposing bus line, C _B is the bus line and the counter bus line connected to the drain R is the channel resistance,
R _B1 indicates the resistance of the bus line connected to the drain, and R _B2 indicates the resistance of the opposite bus line.

────────────────────────────────────────────────── ─── Continued on the front page (56) References Patent 2727578 (JP, B2) (58) Fields investigated (Int. Cl. ⁶ , DB name) G09G 3/36 G01R 31/00 G02F 1/133

Claims (2)

(57) [Claims] A plurality of pixel electrodes (E) and thin film transistors (T) are arranged in a matrix on an insulating substrate in correspondence with each other, and a source electrode (S) of each of the thin film transistors is assigned to a corresponding pixel electrode (S). E) and inspecting a thin film transistor substrate (P) having a bus line (DB) connecting the drain electrodes (D) of the plurality of thin film transistors in common for each row or column. A predetermined number of bus lines (CB) are arranged in parallel, and an insulating substrate (1) having an insulating film (I) formed on one main surface thereof including the bus lines is used as an opposing substrate (P ') for inspection. The insulating film (I) surface of the inspection opposite substrate (P ′) and the surface on which the thin film transistor (T) of the thin film transistor substrate (P) is formed are connected by respective bus lines (CB) (DB). straight In a state where an AC signal is input to the bus line (DB) on the inspection opposite substrate, an AC signal output on the bus line (DB) on the thin film transistor matrix substrate is detected. Measuring a phase shift (φ) of the detected AC signal with respect to the input AC signal, and evaluating a channel resistance (R) of the thin film transistor based on the phase shift. . And detecting a frequency of an input AC signal at which the phase shift (φ) becomes an extreme value in accordance with a gate bias value applied to a gate electrode (G) of the thin film transistor (T).
2. The method for inspecting a thin film transistor matrix substrate according to claim 1, wherein the channel resistance (R) of the thin film transistor is evaluated using the detected frequency.