JPS5824878A - Electric time piece - Google Patents

Abstract

PURPOSE:To achieve a smooth switching to an added function by providing an operation switcing circuit adapted to switch operation between the intrinsic time action and the added function for a pulse motor driven dial type quartz time piece while the switching operation thereof is performed with a clock signal as synchronous signal. CONSTITUTION:A drive circuit 5 drives a pulse motor 6 according to signals. An operation switching section 7 temporarily halts the driving of a dial type indication means by a clock signal phi1 and switches the operation to the chrono-mode. A correcting information preparation circuit 25 receives clock signals generated during the time counting operation and the driving signals of the pulse motor 6 used for the time counting operation to prepare a correcting information for time correction to be made in return to the time counting operation by these input signals. Thus, the operation switching section 7 is switched from the added function to the time piece action thereby quickly advancing the pulse motor 6 ac cording to the information of the correcting information preparation circuit 25.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an electronic timepiece with a pulse motor that also functions as a time display means and performs additional function operations.

Conventionally, it has been publicly prohibited to use a quartz crystal watch (hereinafter abbreviated as a clock) that uses a quartz crystal as a time standard and uses a pulse motor converter to function as an additional function that also functions as a hand movement display device, such as a chronograph. However, even if the watch is returned to clock operation after being used in the timekeeping operation of the additional function, the time display means loses track of the correct time due to the timekeeping operation, so the user of the watch must: Each time, I had to make a tedious time adjustment.

The object of the present invention is to, after using the watch for timekeeping operation,
By returning to clock operation, the time display means is automatically corrected to the correct time, thereby providing an electronic timepiece with an additional function that does not require a troublesome time adjustment operation by the user.

Furthermore, the gist of the present invention is that the hand movement type time display means driven by a pulse motor has a number of step pulses corresponding to the longest cycle set by the time display means (in the case of a two-hand watch driven by a one-minute pulse drive, the most By performing a step (the number of step pulses corresponding to a long period of the hour hand is 720 pulses),
Focusing on the possibility of returning the displayed time to its original state, the sum of the clock signal, zero return signal, and correction signal generated during the timekeeping operation corresponds to the longest cycle of the time display means. A correction signal is added to the time display means so as to be an integer multiple of the number of stepping pulses to return the time display means to the state before the start of the timekeeping operation, and the time display means is further increased by the number of pulses of the clock signal generated during the timekeeping operation. By advancing the
The correct time is corrected, and the time correction operation is performed in synchronization with a clock signal to ensure the accuracy of the operation.

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings, regarding an electronic timepiece having a chronograph function.

Figure 1 shows the 1-minute pulse sending clock operation of this embodiment and the 3-minute pulse feeding clock operation of this embodiment.
It is a block diagram showing the configuration of a chronograph that performs a timekeeping operation with a period of 0 seconds, and the configuration will be explained below.

Reference numeral 1 denotes a standard oscillator that uses a crystal oscillator as a time reference, and in this embodiment, oscillates at 32.768 KHz.

2 is a frequency divider, which divides the signal from the standard oscillator 1, and divides the signal from the standard oscillator 1 into 14 each of 1 divided period, 2Hz, 32H2, and 64Hzl.
W 'IIT % produce. 6 is a waveform shaping circuit;
The first waveform shaping section 6a is composed of a first waveform shaping section 6a, a second waveform shaping section 3b, and a third waveform shaping section 6C.
A clock signal ρ having a pulse of l/64 (seconds) with a minute period
Make I. The second waveform shaping section 3b has a frequency of 54Hz inverted by the inverter 4 and a frequency of 1764 (seconds) at a frequency of 2H2.
Create a timing signal shell 2 having a pulse 1 [] of . The third waveform shaping section 6C has 54 inverted by the inverter 4.
H2 and 32H2 signals at a frequency of 32 Hz.
Return and correction signal ρ8 with a pulse duration of /64 (seconds)
make.

Therefore, the clock signal ρ1 has a phase difference of 180° from the clock signal ρ2 and the zero return signal ρ8.

5 is a drive circuit, which drives the pulse motor according to each of the above signals.
Drive 6. The pulse motor 6 is not shown.
It drives a time display means having a minute hand and an hour hand, and has a zero detection switch 6a, and closes the zero detection switch 6a every hour on the hour of the time display means (when the minute hand passes the 12 o'clock position). I do.

Reference numeral 7 denotes an operation switching unit that temporarily stops the driving of the hand movement type display means by the clock signal ρl and switches to the chronograph mode, and an operation changeover switch 8 that is an external operation switch, the signal of the switch 8, and the A D-type flip-flop 9 that operates according to the clock signal and sets the operating conditions.
(hereinafter abbreviated as FF), Re flip-flop 11 (hereinafter abbreviated as FF) is set at the start of clock operation by a differentiating circuit 10 connected to the output terminals Q and l of the FF9, and sets the time adjustment operation. , is connected to the output terminal Q1 of the FF 9, and includes a differentiating circuit 12 that generates a reset pulse RP at the start of a timekeeping operation.

Reference numeral 16 designates a timekeeping circuit; a timekeeping switch 14 operated by an external operating member (not shown); a differentiation circuit 15 that converts the signal of the switch 14 into pulses; and an output of the differentiation circuit 15.
A T-type flip-flop 16 (hereinafter abbreviated as FF) that performs a torque operation based on the pulse and has a reset terminal R based on the reset pulse RP, and an AND connected to the output terminal Q8 of the FF 16 to open and close the counting signal ρ2b.
It is constituted by a gate 17.

Reference numeral 18 denotes a zero return circuit, which includes a zero return switch 19 operated by an external operating member (not shown), and a differentiation circuit 20 that pulses the signal of the switch 19. The output pulse of the differentiating circuit 20 and the reset pulse RP cause the OR gate 21
Re flip-flop 22 (hereinafter abbreviated as FF) set via the differential circuit 26 which pulses the signal of the zero detection switch 6a of the pulse motor 6 and resets the FF 22, and the output terminal Q4 of the FF 22. AND gate 2 that is connected and opens and closes the return signal 9
Consisting of 4.

Therefore, the zero return circuit 18 generates the zero return signal I258b by the reset pulse RP at the start of the timekeeping operation, and by operating the zero return switch 19 during the timekeeping operation, thereby starting the pulse motor 6. When the zero detection switch 6a is closed while the time display means is at the hourly position, the zero return signal ρ8b is stopped and the zero return operation is completed.

25 inputs the clock signal generated during the timekeeping operation and the drive signal of the pulse motor used in the timekeeping operation, and uses these input signals to adjust the time when the clock operation returns. In the correction information creation circuit that creates information,
In this embodiment, it is a reversible counter, and has an addition input terminal U1, a subtraction input terminal D1, a carrier terminal C1, and a reset terminal R, and has a 720-decimal step number.

The subtraction input terminal DK of the reversible counter 25 is open during timekeeping operation (a clock signal ρl is applied through an AND gate 26, and the addition input terminal U receives a timekeeping signal ρab through an OR gate 27 and an AND gate 28). , a return signal ρab, and a correction signal φ8C are added, and the other input terminal of the AND gate 28 is connected to the subtraction input terminal via an inverter 29, and the clock signal ρl and other signals are connected to each other with a circuit delay. Even if a crossover occurs due to
The configuration is such that the addition manpower U, the subtraction manpower U, and the subtraction manpower do not become logical 11m at the same time.

Furthermore, the carrier terminal C is connected to the reset terminal R of the FF 11, and the reset terminal R of the reversible counter 25 is connected to the reset terminal Rp.

60. 31 is an AND gate that passes the zero return signal ρ8a and the clock signal ρ2a during timekeeping operation, 62 is an AND gate that passes the time correction signal p8C during time adjustment, and 66 is an AN gate that passes the clock signal tpl during clock operation.
The clock signal ρ1 that has passed through the AND gate 33, the clock signal ρzb that has passed through the AND gates 17 and 24, the zero return signal ρ3b, and the time 1 positive signal ρ8C are input to the OR gate 34. Then, the pulse motor 6 is stepped according to various conditions described later.

Next, the operation of the chronograph with the above configuration will be explained. In normal watch operation, the operation selector switch 8, timing switch 14, and zero return switch 19 are all open Q,
The input terminal of FF9 and the input terminal of differential circuit 15.2o are both held at logic 11O1.

Therefore, the output terminal Ql of FF9 is held at logic WO1, and Q1 is held at logic "1", and the output terminal Qs of FF1i is held at logic 101. Therefore, AND gate 66 is open and AND gates 26, 60, 31, 62 are all closed. For this reason, only the clock signal example is applied to the forward drive circuit 5 via the AND gate 66 and the OR gate 34, and the pulse motor 6 causes the time display means to display one-minute movement.

Next, the timing operation will be explained.

When the operation selector switch 8 is in the closed ON state, F
F9 has its input terminal switched from logic 101 to "work" and then clock signal +211 applied to clock terminal ρ.
The state is reversed at the trailing edge of Ql, and its output terminal is
1", J is inverted to logic "0'. As a result, AND gate 66 is closed and AND gate 26.60.61 is opened.

Therefore, the return signal ρ8a and the clock signal a are generated at the outputs of the AND gates 60 and 31, respectively, and the clock signal p1 is not sent to the drive circuit 5, but is sent to the reversible counter 25 through the ND gate 26. Added to the input terminal.

Furthermore, the output Q1 of the FF9 generates a reset pulse Rp by the differentiating circuit 12, and sets the reset terminals of the FF16 and the reversible counter 25, and also sets the FF22.

Therefore, the output Q4 of FF22 is from logic "0#" to ff1
g, open the AND gate 24 and return the zero signal ρ8b.
is generated, the pulse motor 6 is advanced, and the minute hand of the time display means is returned to the zero position. Furthermore, this return signal g
ab is counted and stored in the reversible counter 25. This completes the preparation for the counting operation. Next, when the user presses the timer switch 14 once, the state of the FF'16 is reversed through the differentiating circuit 15, and the output terminal Q8 becomes logic 11". ,AND gate 1
7 is opened, a clock signal is generated, and the pulse motor 6 is activated.
advance.

Therefore, the minute hand of the time display means operates as a time hand that measures 30 seconds per rotation. Incidentally, this clock signal ρ2b is also
The count is stored in the reversible counter 25.

Furthermore, when the user presses the timing switch 14 again, the FF 16 inverts its state and the output Q8 becomes a logic l.
O", the AND gate 17 is closed, and the clock signal ρ2b
to stop. Therefore, the time display means also stops;
Indicates the time value.

Next, when the user presses the zero return switch 19, the FF 22 is set via the differentiating circuit 20 and the OR gate 21, and the AND gate 24 is opened to output the return signal ρ8b.
is generated, and the time display means is reset to zero.

As described above, by operating the timer switch 14 and the zero return switch 19, the user can perform a 30 second cycle timer operation.

Next, the time adjustment operation will be explained.

When the operation changeover switch 8 is opened and switched to the OFF state, the input terminal of the FF9 switches from the logic 111 to Iol, and then the clock signal ρl applied to the clock terminal φ.
The state is reversed at the trailing edge of , and the output terminal is Q and t is logic □l
, Possible l is inverted to logic "■". As a result, AND gate 26.30.61 is closed and AND gate 66 is opened.

Furthermore, the output Ql of FF9 is passed through a differentiating circuit 10 to the FF9.
11, its output Q2 is logic 111, and A
Open the ND gate 62. As a result, the time correction signal ρ8C is generated at the output of the AND gate 62. The time adjustment signal ρ8C is sent to the pulse motor 6 via the OR gate 64.
to start time adjustment, and at the same time OR gate 27,
The reversible counter 25 is incremented via the AND gate 28.

When the counted value reaches 720, which is the increment number of the iJ inverse counter 25, a carrier is generated from the carrier terminal C, and the FF 11 is reset. therefore,
AND gate 62 connected to output terminal Q2 of FF1i
is closed, the time adjustment signal ρ8C is stopped, and the time adjustment operation is completed.

As a result, the time display means has returned to the correct time and performs normal clock operation from the next clock signal ρ1.

11- That is, the number of pulses of the time adjustment signal φ8C generated during the time adjustment operation is determined by the following equation.

ρ8(' = (720(n+:r) -+-5z+1
t) −(ρ2 b+$ a b) − @) I25sc
: Number of pulses of the time adjustment signal ρlt: Number of clock signal pulses generated during clock operation 5212b: Number of pulses of the clock signal generated during timekeeping operation ρ8b: Number of pulses of the zero return signal generated during timekeeping operation n: Timekeeping operation The number of carrier pulses generated by the reversible counter 25 in the present embodiment has been explained in the case of a two-hand watch that feeds one-minute pulses, but even in a three-hand watch that feeds one-second pulses, the reversible counter By changing the step number of 25,
Similar results can be obtained.Additional functions that apply the technical idea of the present invention include:
In addition to the chronograph shown in the embodiment, an alarm function in which the hand movement type display device also serves as a reference hand, a world clock function in which the hand movement type display device is fast-forwarded by a certain amount to correct time differences, etc. can be considered.

12- As described above, according to the present invention, a pulse motor-driven hand movement type crystal watch is provided with an operation switching circuit that switches between the original clock operation and an additional function operation, and this operation switching circuit is synchronized with a clock signal. By performing the switching operation as a signal, it is possible to smoothly switch to the additional function, and at the same time, when returning to clock operation, it is possible to quickly adjust the automatic time adjustment appropriately based on the time information during the operation of the additional function. This has the effect of further increasing the product appeal of the hand-operated electronic timepiece as a full-fledged electronic timepiece with additional functions, which can be performed at any time.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of a chronograph in this embodiment.

Claims (1)

[Claims] In an electronic watch that has a standard oscillator, a frequency divider, and a pulse motor 1 hand movement type time display means, and which also uses the hand movement type time display means to perform additional function operations, there are two functions: normal clock operation and additional function operation. and a correction information creation circuit that inputs a clock signal generated during the operation of the additional function and a drive signal of a pulse motor used for the operation of the additional function and creates correction information, An electronic timepiece characterized in that, by switching the operation switching means from an additional function operation to a clock operation, the pulse motor is operated at half speed according to information from a correction information creation circuit.