JPS58221448A - Microcomputer - Google Patents

Abstract

PURPOSE:To prevent the generation of faults by writing a NO OPERATION instruction for one machine cycle in respective addresses of an idle area in an ROM and also writing a branch instruction to transfer to a runaway processing program in the final address area of the idle area. CONSTITUTION:The NO OPERATION instruction for one machine cycle is written in respective addresses of the idle area of the ROM in a memory part 10 and the branch instruction to transfer to the runaway processing program is written in the final address area of the idle area. Even if a CPU 20 runs away and the value of a program counter is made correspond to the address in the idle area of the ROM, the CPU 20 executes the NO OPERATION instruction successively and then executes the branch instruction to branch to the runaway processing program and execute the program because the NO OPERATION instruction for one machine cycle is written in all addresses of the idle area except the final address area.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a microcomputer equipped with a function for dealing with a runaway of a processing device.

[Technical background of the invention and its problems]

Recently, a wide variety of microcontrollers are used in home appliances and other electrical products, one of which is a processing unit (CPU), read-only memory (ROM), random - Some contain access memory (RAM) and an oscillator. In such a microcomputer, the capacity of the ROM is fixed, so that there is often a so-called empty area in which no program is written in the ROM.

By the way, when a processing device goes out of control due to external noise, instantaneous power outage, etc., the microcomputer often repeatedly executes the same program or jumps into the above domain. When jumping into this empty area, the processing unit attempts to execute the meaningless information written in this area as if it were an instruction, causing the microcomputer to perform unexpected operations and cause various problems. This was extremely undesirable.

[Purpose of the invention]

The present invention guarantees the operating state with high accuracy in the event that the processing device goes out of control and the value of the program counter jumps into an empty area of the read-on memory, thereby reducing the occurrence of failures. The purpose of the present invention is to provide a micro combinator that achieves the following.

[Summary of the invention]

In order to achieve the above object, the present invention writes a no-operation instruction of one machine cycle to the valley address of an empty area of a read-only memory (ROM), and writes a no-operation instruction of one machine cycle to the final address area of the empty area. It is designed to write an instruction to stop the program or branch to a program to deal with a runaway of the processing device.

[Embodiments of the invention]

FIG. 1 is a block diagram showing a schematic configuration of a microcomputer according to an embodiment of the present invention. This microcomputer includes a memory section 1o, and a processing device ( (CPU)
20, and an oscillator 30 that generates all the lock signals necessary for the operation of the CPU 20, and these are grouped together on one chip. The memory section 10 mainly includes C.
It consists of a read-only memory (ROM) that stores programs for controlling the operation of the PU2o, and a random access memory (RAM) that mainly stores input data and calculation results. The address designation is made by the program counter in the CPU Ro.

Now, in the empty area of the ROM, that is, the remaining area where no program is stored, as shown in FIG. A one-machine-cycle no-operation instruction rNOPJ is written in all areas except the area corresponding to each address.

In addition, in the final address area (3FFH and the area corresponding to each address of 3FFH), as shown in the figure, rJMP 5
A branch instruction TOPJ has been written. This branch instruction is the 5TOP written in the program area of the ROM.
This is to branch to a routine, that is, a program consisting of instructions that stop the execution of the CPU and issue a warning or the like.

With such a configuration, even if the CPU 20 goes out of control and the program counter value corresponds to an address in the empty area of the ROM, the last two addresses will be stored in each address in the empty area. All except for one machine cycle no-operation instruction are written, so CPU 2
o sequentially executes no-operation instructions, then executes a branch instruction (r JMP 5TOP J) to branch to a program for runaway processing, and executes this program.

Therefore, when the CPU jumps into an empty area other than the final address, the operation of the CPU is guaranteed, and as a result, the CPU 20
The occurrence of failures due to runaway can be prevented with high accuracy.

〔Effect of the invention〕

As detailed above, a no-operation instruction of one machine cycle is written to each address of the empty area of the ROM, and a branch instruction is written to the final address area of the empty area for transitioning to a program for runaway processing. According to the present invention, the operating state is guaranteed with high accuracy in the event that the processing unit goes out of control and the value of the program counter jumps into the empty area of the read-only memory, thereby preventing the occurrence of a failure. It is possible to provide a microcomputer that can reduce the

[Brief explanation of the drawing]

FIG. 1 shows a microcomputer in one embodiment of the present invention! FIG. 2 is a block diagram of a memory map. 10... Memory section, 20... Processing unit (CPU),
30...Oscillator

Claims (1)

[Claims] 1. In a microcomputer equipped with a processing unit and a read-only memory in the chip, the read-only memory
An instruction that writes a one-machine-cycle no-operation instruction into an empty area of the only memory and causes the final address area of the empty area to stop execution of the processing device or branch to a program for dealing with a runaway of the processing device. A microcomputer characterized by being written with.