JPS58220578A - Solid-state image pickup device - Google Patents

Solid-state image pickup device

Info

Publication number
JPS58220578A
JPS58220578A JP57104444A JP10444482A JPS58220578A JP S58220578 A JPS58220578 A JP S58220578A JP 57104444 A JP57104444 A JP 57104444A JP 10444482 A JP10444482 A JP 10444482A JP S58220578 A JPS58220578 A JP S58220578A
Authority
JP
Japan
Prior art keywords
area
solid
island
region
state imaging
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57104444A
Other languages
Japanese (ja)
Other versions
JPH0376071B2 (en
Inventor
Masayuki Matsunaga
誠之 松長
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP57104444A priority Critical patent/JPS58220578A/en
Publication of JPS58220578A publication Critical patent/JPS58220578A/en
Publication of JPH0376071B2 publication Critical patent/JPH0376071B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)

Abstract

PURPOSE:To improve the integration of an element, by providing an island area to a semiconductor area constituting a photodetection storing part, and by using it as a drain. CONSTITUTION:A photodetection storing part 41 consists of plural semiconductor areas 41a, 41b and so on arranged at intervals, and forms a p-n junction together with a substrate 40. Island areas 43a, 43b and so on of the same conductive type as that for the substrate 40 are provided in the semiconductor areas 41a, 41b and so on. If the island area 43 is used as a drain, a shift gate 45 is turned off before driving, and the voltage P3 is applied for the area 43 through a metallic layer 48. When light is irradiated through a window part 48', the potential P1 of the area 41 where a signal electric charge is stored lowers. If the potential P3 applied for the area 43 by the P1 lowers, the p-n junction between the area 41 and area 43 becomes the forward bias state, and an excess electric charge is discharged as an electric power source (i). The P1 never become smaller than the P3, and, therefore, the excess electric charge can be discharged through the area 43.

Description

【発明の詳細な説明】 〔発明の技術分野〕 この発明は固体撮像装置に係シ、特にインタライン転送
方式の固体撮像装置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a solid-state imaging device, and particularly to a solid-state imaging device using an interline transfer method.

〔発明の技術的背景〕[Technical background of the invention]

固体撮像装置のうち、インタライン転送方式と呼ばれる
ものの構造を示せば、第1図及び第2図に示す様である
Among solid-state imaging devices, the structure of a so-called interline transfer method is shown in FIGS. 1 and 2.

半導体基板10上には、複数の月つとびとびの半導体領
域11a 、llb 、llc 、・・・・・・から成
る受光蓄積部11が形成され、この蓄積部11は基板1
0と共にpn接合を形成し外部からの光照射によって得
られる信号電荷を蓄積する。この信号電荷はシフトゲー
ト15に印加されるゲートパルスによって電荷転送路1
2を形成する半導体領域に移送される、 電荷転送路12は蓄積部11の各領域11a 、Ilb
 、llc 。
A light receiving and accumulating section 11 is formed on the semiconductor substrate 10 and is composed of a plurality of discrete semiconductor regions 11a, llb, llc, . . .
It forms a pn junction with 0 and accumulates signal charges obtained by external light irradiation. This signal charge is transferred to the charge transfer path 1 by a gate pulse applied to the shift gate 15.
The charge transfer path 12 is transferred to the semiconductor region forming the storage section 11, and
, llc.

・・・・・・に対応してとびとびに設けた転送電極16
に所定のクロックツξルスを印加することにより、前記
信号電荷を出力部(図示せず)壕で転送し電気信号とし
て取出す。
Transfer electrodes 16 provided at intervals in response to...
By applying a predetermined clock pulse ξ to ξ, the signal charge is transferred to an output section (not shown) and extracted as an electrical signal.

また、Pレイン13は蓄積部11で生じた過剰電荷を排
除し、これらの電荷が信号に悪彰響を及ぼさない様にす
るためのものである。このため、蓄積部11とドレイン
130間の領域14の上にゲート】7を設け、例えば第
2図で示す導電型の各領域に対して第3図に示す様なポ
テンシャルの山P14及び谷P13を形成することによ
り、蓄積部の過剰電子18をドレイン13側に引込む様
にする。
Further, the P-rain 13 is provided to remove excess charges generated in the storage section 11 and to prevent these charges from adversely affecting the signal. For this purpose, a gate 7 is provided above the region 14 between the storage portion 11 and the drain 130, and, for example, potential peaks P14 and valleys P13 as shown in FIG. 3 are provided for each region of the conductivity type shown in FIG. By forming this, the excess electrons 18 in the storage portion are drawn toward the drain 13 side.

〔背景技術の問題点〕[Problems with background technology]

しヵ、し、以上。様な構成、よれは1、レイ713及び
領域13がかなりの面積を占めるため、半導体素子の集
積化の障害となっていた。
Shika, shika, that's it. In such a configuration, the skew 1, the ray 713 and the region 13 occupy a considerable area, which has been an obstacle to the integration of semiconductor devices.

〔発明の目的〕[Purpose of the invention]

この発明は、以上の様な従来技術の欠点を除去するため
に成されたものであり、素子の集積度を向上させ得る新
規な構成の固体撮像装置を提供することを目的とする。
The present invention was made in order to eliminate the drawbacks of the prior art as described above, and an object of the present invention is to provide a solid-state imaging device with a novel configuration that can improve the degree of integration of elements.

〔発明の概要〕[Summary of the invention]

この目的を達成するため、この発明によれば、半導体基
板上に形成しこの基板と共にpn接合を形成し外部から
のtS射によって得られる信号電荷を蓄積する複数の且
つとびとびの半導体領域から成る受光蓄積部と、この受
光蓄積部の付近の前記基板上に形成され前記信号電荷を
取出すだめの半導体旬壊である電荷転送路とを具えた固
体撮像装置において、前記受光蓄積部の一半導体領域中
に前記基板と同じ導電型で外部から電圧を印加し得る島
状領域を有す本機にする。
In order to achieve this object, according to the present invention, a light-receiving device is formed on a semiconductor substrate to form a pn junction with the substrate, and is composed of a plurality of discrete semiconductor regions that accumulate signal charges obtained by external tS radiation. In a solid-state imaging device comprising a storage section and a charge transfer path formed on the substrate near the light receiving and accumulating section and serving as a semiconductor layer for extracting the signal charge, one semiconductor region of the light receiving and accumulating section is provided. The device has an island-like region having the same conductivity type as the substrate and to which a voltage can be applied from the outside.

更に詳しくは、この島状領域に電圧を印加してドレイン
として活用するようにする。
More specifically, a voltage is applied to this island-like region to use it as a drain.

〔発明の実施例〕[Embodiments of the invention]

以下、添付図面に従ってこの発明の詳細な説明する。 Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

第4図及び第5図はこの発明の実施例に係るインタライ
ン転送方式の固体撮像装置を示し、それぞれ上断面図及
び横断面図である。同図によれば、半導体基板40上に
受光蓄竺部41及び電荷転送路42が形成され、また双
方の間にはシフトゲート45が設けられ、電荷転送路4
2には転送電極46が設けられてbる。
FIGS. 4 and 5 show an interline transfer type solid-state imaging device according to an embodiment of the present invention, and are a top sectional view and a horizontal sectional view, respectively. According to the figure, a light receiving and accumulating section 41 and a charge transfer path 42 are formed on a semiconductor substrate 40, a shift gate 45 is provided between the two, and a charge transfer path 42 is provided.
2 is provided with a transfer electrode 46.

以上の構成において、この発明によれば、受光蓄積部4
1の構成が著しく異なる。すなわち、受光蓄積部41は
複数の且つとびとびの半導体領域41a。
In the above configuration, according to the present invention, the light receiving and accumulating section 4
1 has a significantly different configuration. That is, the light receiving and accumulating section 41 includes a plurality of discrete semiconductor regions 41a.

41b、・・・・・・から成り、基板40と共にpn接
合を形成し外部上方からの光照射によって信号電荷を発
生蓄積させるようにするものである。
41b, . . . form a pn junction together with the substrate 40, and generate and accumulate signal charges by externally irradiating light from above.

しかも、この実施例によれは、この受光蓄積部41の各
半導体領域41a 、41b 、・・・・・・中に基板
40と同じ導電型の島状領域43a 、43b 、・・
・・・・を設けである。この島状領域43a 、43b
 、・・・・・・は後述するようにドレインとして用す
ることができる。
Moreover, according to this embodiment, in each of the semiconductor regions 41a, 41b, .
...is established. These island-like regions 43a and 43b
, . . . can be used as a drain as described later.

これらの各要素41 、42 、43’i有する半導体
基板40の表面は絶縁膜47で蔽われており、また絶縁
膜47中にはシフトゲート45及び転送電極46が埋設
されている。更に、この絶縁ps47の上には受光用の
窓部分48′を除いてしや光用のシールド金属層48で
蔽われている。この際、このシールド金属を利用して前
述の島状領域43a 、43b 、・・・・・・への接
続を行うべく、接続路48gを設けである。
The surface of the semiconductor substrate 40 having each of these elements 41, 42, 43'i is covered with an insulating film 47, and a shift gate 45 and a transfer electrode 46 are buried in the insulating film 47. Further, above this insulating PS47, a shield metal layer 48 for insulating light is covered except for a window portion 48' for receiving light. At this time, a connection path 48g is provided in order to connect to the above-described island regions 43a, 43b, . . . using this shield metal.

ここで、第5図に示す様な導電型の固体撮像装置の島状
領域43をドレインとして用いる場合には次の様に駆動
する。駆動に先立ってシフトゲート45はオフ状態とし
ておく。次に、シールド金属層48を介して第6図に示
す様に領域43に電圧P3を印加しておく。こうするこ
とにより、受光用窓部分48′を介して光照射された際
、領域41で光電変換された信号電荷が蓄積され領域4
1のポテンシャルP1が下がる。電荷の蓄積によって領
域41のポテンシャルP1が領域43に印加したポテン
シャルP3より小さくなると、領域41及び領域43の
間のpn接合が順・々イアス状態となり、過剰電荷が箪
源lとして流出する。ポテンシャルP1はポテンシャル
P3より小さくなることはなく、従って、怖い入射光に
より発生した過剰電荷を領域43を介して排出させるこ
とができる。
Here, when using the island region 43 of a conductivity type solid-state imaging device as shown in FIG. 5 as a drain, it is driven as follows. Prior to driving, the shift gate 45 is turned off. Next, a voltage P3 is applied to the region 43 via the shield metal layer 48 as shown in FIG. By doing this, when light is irradiated through the light receiving window portion 48', signal charges photoelectrically converted in the region 41 are accumulated and transferred to the region 4.
1's potential P1 decreases. When the potential P1 of the region 41 becomes smaller than the potential P3 applied to the region 43 due to accumulation of charge, the pn junction between the region 41 and the region 43 becomes in an negative state one after another, and the excess charge flows out as a source 1. The potential P1 never becomes smaller than the potential P3, so that excess charges generated by the dangerous incident light can be discharged through the region 43.

以上の実施例において、導電型が第5図の場合と逆であ
ってよりのはもちろX7のことであり、捷だ島状領域4
3を領域41内に形成する場合の場所も特に第4図の部
分に限定されることはなA。
In the above embodiment, the conductivity type is opposite to that shown in FIG.
3 in the area 41 is not particularly limited to the part shown in FIG.

〔発明の効果〕〔Effect of the invention〕

この発明は、以上の様に受光蓄積部を成す半導体飴域中
に島状領域を設け、これをドレインとして活用すること
により、素子の集積度を向上させることのできる新規な
構成の固体撮像装置を提供することができる。
As described above, this invention provides a solid-state imaging device with a novel configuration in which the degree of integration of elements can be improved by providing an island-like region in the semiconductor candy region forming the light receiving and accumulating section and utilizing this as a drain. can be provided.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のインタライン転送型固体撮1&′装置の
上断面図、第2図は第1図のxx’Hにおける横断面図
、第3図は第1図従って第2図の装置にポテンシャルを
印加した場合の動作説明図、第4図はこの発明の実施例
に係る装置の上断面図、第5図は第4図のYY’?f#
mおける横断面図、第6図は第4図従って第5図の装置
にポテンシャルを印加した場−合の動作説明図である。 40・・・半導体基板、41・・・受光蓄積部、42・
・・電荷転送路、43・・・島状領域、45・・・シフ
トゲート、46・・・転送量、極、47・・・絶縁膜、
48・・・シールド金属層、48′・・・受光用窓部分
。 出願人代理人   猪 股    清 第1図 旦 v=、2図 郁J図 1日 市4M 0 町 化5図 第6図
Fig. 1 is a top sectional view of a conventional interline transfer type solid-state imaging device 1&', Fig. 2 is a cross-sectional view at xx'H of Fig. An explanatory diagram of the operation when a potential is applied, FIG. 4 is a top sectional view of the device according to the embodiment of the present invention, and FIG. 5 is YY'? f#
FIG. 6 is a cross-sectional view of the device shown in FIG. 40... Semiconductor substrate, 41... Light receiving and accumulating unit, 42...
... Charge transfer path, 43... Island-like region, 45... Shift gate, 46... Transfer amount, pole, 47... Insulating film,
48... Shield metal layer, 48'... Light receiving window portion. Applicant's agent Kiyoshi Inomata Figure 1 Dan v=, Figure 2 Iku J Figure 1 Day Market 4M 0 Townization Figure 5 Figure 6

Claims (1)

【特許請求の範囲】 1、半導体基板上に形成しこの基板と共にpi接合を形
成し外部からの光照射によって得られる信号電荷を蓄積
する複数の且つとびとびの半導体領域から成る受光蓄積
部と、この受光蓄積部の付近の前記基板上に形成され前
記信号電荷を取出すための半導体領域である電荷転送路
とを具えた固体撮像装置において、前記受光蓄積部の各
半導体領域中に前記基板と同゛じ導電型で外部から電圧
を印加し得る島状領域を壱する様にして成る固体撮像装
置。 2、特許請求の範囲第1項記載の装置において、前記電
荷転送路を蔽う光シールド金属を前記島状領域に電気的
に結合し前記篭圧合印加する様にして成る固体撮像装置
。 3、特許請求の範囲第1項又は第2項記載の装置におい
て、前記島状領域は前記受光蓄積部で発生した過剰電荷
のrレインとして機能する様にして成る固体撮像装置。
[Scope of Claims] 1. A light receiving and accumulating section formed on a semiconductor substrate and consisting of a plurality of discrete semiconductor regions that form a pi junction together with the substrate and accumulate signal charges obtained by external light irradiation; In the solid-state imaging device, the solid-state imaging device includes a charge transfer path, which is a semiconductor region formed on the substrate near the light receiving and accumulating section and for taking out the signal charge, in each semiconductor region of the light receiving and accumulating section. A solid-state imaging device comprising one island-like region of the same conductivity type and to which a voltage can be applied from the outside. 2. A solid-state imaging device according to claim 1, wherein a light shield metal covering the charge transfer path is electrically coupled to the island region to apply pressure to the cage. 3. A solid-state imaging device according to claim 1 or 2, wherein the island-like region functions as an r-rain for excess charge generated in the light receiving and accumulating section.
JP57104444A 1982-06-17 1982-06-17 Solid-state image pickup device Granted JPS58220578A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57104444A JPS58220578A (en) 1982-06-17 1982-06-17 Solid-state image pickup device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57104444A JPS58220578A (en) 1982-06-17 1982-06-17 Solid-state image pickup device

Publications (2)

Publication Number Publication Date
JPS58220578A true JPS58220578A (en) 1983-12-22
JPH0376071B2 JPH0376071B2 (en) 1991-12-04

Family

ID=14380810

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57104444A Granted JPS58220578A (en) 1982-06-17 1982-06-17 Solid-state image pickup device

Country Status (1)

Country Link
JP (1) JPS58220578A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5775455A (en) * 1980-10-29 1982-05-12 Sony Corp Solid state pickup element

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5775455A (en) * 1980-10-29 1982-05-12 Sony Corp Solid state pickup element

Also Published As

Publication number Publication date
JPH0376071B2 (en) 1991-12-04

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