JPS5821309B2 - 直列シフト・レジスタ型メモリのメモリ管理システム - Google Patents

直列シフト・レジスタ型メモリのメモリ管理システム

Info

Publication number
JPS5821309B2
JPS5821309B2 JP52134832A JP13483277A JPS5821309B2 JP S5821309 B2 JPS5821309 B2 JP S5821309B2 JP 52134832 A JP52134832 A JP 52134832A JP 13483277 A JP13483277 A JP 13483277A JP S5821309 B2 JPS5821309 B2 JP S5821309B2
Authority
JP
Japan
Prior art keywords
register
page
line
search
shift
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP52134832A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5376633A (en
Inventor
ペーター・アンソニー・フラナツエク
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of JPS5376633A publication Critical patent/JPS5376633A/ja
Publication of JPS5821309B2 publication Critical patent/JPS5821309B2/ja
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/76—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data
    • G06F7/78—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data for changing the order of data flow, e.g. matrix transposition or LIFO buffers; Overflow or underflow handling therefor

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
  • Shift Register Type Memory (AREA)
  • Memory System (AREA)
JP52134832A 1976-12-20 1977-11-11 直列シフト・レジスタ型メモリのメモリ管理システム Expired JPS5821309B2 (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/752,752 US4052704A (en) 1976-12-20 1976-12-20 Apparatus for reordering the sequence of data stored in a serial memory

Publications (2)

Publication Number Publication Date
JPS5376633A JPS5376633A (en) 1978-07-07
JPS5821309B2 true JPS5821309B2 (ja) 1983-04-28

Family

ID=25027686

Family Applications (1)

Application Number Title Priority Date Filing Date
JP52134832A Expired JPS5821309B2 (ja) 1976-12-20 1977-11-11 直列シフト・レジスタ型メモリのメモリ管理システム

Country Status (5)

Country Link
US (1) US4052704A (https=)
JP (1) JPS5821309B2 (https=)
DE (1) DE2756765A1 (https=)
FR (1) FR2374686A1 (https=)
GB (1) GB1555927A (https=)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4481608A (en) * 1979-12-26 1984-11-06 Varian Associates, Inc. Reentrant asynchronous FIFO
US4467411A (en) * 1981-03-06 1984-08-21 International Business Machines Corporation Scheduling device operations in a buffered peripheral subsystem
US4464732A (en) * 1982-03-19 1984-08-07 Honeywell Inc. Prioritized sorting system
US5611068A (en) * 1994-12-27 1997-03-11 Motorola, Inc. Apparatus and method for controlling pipelined data transfer scheme between stages employing shift register and associated addressing mechanism
US5857101A (en) * 1997-04-15 1999-01-05 Acceleration Software International Corporation Program lunch acceleration
US5933630A (en) * 1997-06-13 1999-08-03 Acceleration Software International Corporation Program launch acceleration using ram cache
US20030235298A1 (en) * 2002-06-25 2003-12-25 Bedros Hanounik Shifting an encryption key in either a first or second direction via a uni-directional shifting unit
JP5439236B2 (ja) * 2010-03-12 2014-03-12 株式会社日立製作所 計算機システムおよびアプリケーションプログラムの実行方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1424706C3 (de) * 1960-08-22 1973-11-29 International Business Machines Corp., Armonk, N.Y. (V.St.A.) Suchvorrichtung zum Auffinden von Informationen aus ungeordnet zugefuhrten Informationsfolgen
US3310782A (en) * 1963-02-27 1967-03-21 Ultronic Systems Corp Data message system
US3704452A (en) * 1970-12-31 1972-11-28 Ibm Shift register storage unit
US3766534A (en) * 1972-11-15 1973-10-16 Ibm Shift register storage unit with multi-dimensional dynamic ordering
US3797002A (en) * 1972-11-16 1974-03-12 Ibm Dynamically double ordered shift register memory

Also Published As

Publication number Publication date
US4052704A (en) 1977-10-04
FR2374686A1 (fr) 1978-07-13
GB1555927A (en) 1979-11-14
DE2756765A1 (de) 1978-06-29
FR2374686B1 (https=) 1981-05-29
JPS5376633A (en) 1978-07-07

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