JPS58212152A - Manufacture of glass-sealed semiconductor device - Google Patents
Manufacture of glass-sealed semiconductor deviceInfo
- Publication number
- JPS58212152A JPS58212152A JP58090678A JP9067883A JPS58212152A JP S58212152 A JPS58212152 A JP S58212152A JP 58090678 A JP58090678 A JP 58090678A JP 9067883 A JP9067883 A JP 9067883A JP S58212152 A JPS58212152 A JP S58212152A
- Authority
- JP
- Japan
- Prior art keywords
- glass
- leads
- lead
- frame
- tab
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
- H01L23/49558—Insulating layers on lead frames, e.g. bridging members
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
- H01L2924/097—Glass-ceramics, e.g. devitrified glass
- H01L2924/09701—Low temperature co-fired ceramic [LTCC]
Abstract
Description
【発明の詳細な説明】 本発明はガラス封止半導体装置の製造方法に関する。[Detailed description of the invention] The present invention relates to a method for manufacturing a glass-sealed semiconductor device.
半導体装置、特に半導体集積回路装置は一般にデユアシ
イ／ライン構造をしており、半導体ペレットの封止方法
として安価な樹脂モールド封正方法と高信頼度のガラス
封正方法がある。Semiconductor devices, particularly semiconductor integrated circuit devices, generally have a dual/line structure, and there are two methods for encapsulating semiconductor pellets: an inexpensive resin mold encapsulation method and a highly reliable glass encapsulation method.
樹脂モールド封止型半導体装置は、複数のリードとこれ
らの外端部を接続する枠部とリードの中間部に設けられ
た連結部材とからなるリードフレームに半導体ペレット
を取付け、ペレット上の電極とリード間を金属細線によ
り接続した後、樹脂モールド封止を行なっている。そし
て上記連結部材は、金属細線によるワイヤボンディング
後リードが外力により変形されワイヤが切断されること
を防止する機械的な補強材として働くとともに、樹脂モ
ールドのとき流出するレジンの流れ止めとしても働いて
いる。In a resin mold-sealed semiconductor device, a semiconductor pellet is attached to a lead frame consisting of a plurality of leads, a frame part that connects the outer ends of these leads, and a connecting member provided in the middle of the leads. After connecting the leads with thin metal wires, resin mold sealing is performed. The connecting member acts as a mechanical reinforcing material that prevents the lead from being deformed by external force and being cut after wire bonding using thin metal wires, and also acts as a flow stopper for the resin that flows out during resin molding. There is.
さらに、リードの上下にセラミックキャップおよびセラ
ミックベースをガラス融着したデュアルインライン型ガ
ラス封止半導体装置においては、第１図に示すように、
あらかじめリード１部分が折り曲げられている曲折リー
ドフレーム２が用いられ、リードフレーム２にセラミッ
クペース４をガラスにて固定し、半導体ペレット５をセ
ラミックペース４にガラスにて溶着した後、半導体ペレ
ット上の電極とリード間をワイヤボンディングしてから
、セラミックキャップを取付け、半導体ペレットをガラ
ス封止している。Furthermore, in a dual in-line glass-sealed semiconductor device in which a ceramic cap and a ceramic base are glass-fused above and below the leads, as shown in FIG.
A bent lead frame 2 in which the lead 1 portion is bent in advance is used, and a ceramic paste 4 is fixed to the lead frame 2 with glass, and a semiconductor pellet 5 is welded to the ceramic paste 4 with glass. After wire bonding between the electrodes and leads, a ceramic cap is attached and the semiconductor pellet is sealed with glass.
このように、デュアルインライン型ガラス封止半導体装
置においては、ワイヤボンディングのとき、すでにリー
ドはセラミックペースに固定されており、ワイヤの断線
を防ぐために機械的に補強する必要はなく、またレジン
の流出の問題もなかったため、樹脂モールド封止型半導
体装置のように連結部材は設けられていなかった。In this way, in dual-in-line glass-sealed semiconductor devices, the leads are already fixed to the ceramic paste during wire bonding, and there is no need for mechanical reinforcement to prevent wire breakage, and there is no need for resin to leak out. Since there was no such problem, a connecting member was not provided unlike a resin mold-sealed semiconductor device.
しかし、デエアルインライン型ガラス封止半導体装置に
おいてもリードにセラミックペースをガラス付けした場
合リードが十分に接着されず、外力に、よりリードがは
がれる問題がしばしば発生した。かかる問題の原因につ
いての検討によれば、このような折り曲げフレームにお
いてはリードがその外端部でのみ保持された構造である
ため外力の影響を受けやすくなっていることがその一因
であることが萌らかとなった。このようにリードがはが
れるとリードが変形しやすくなり、組立、取扱いが困難
になる欠点がある。特に超音波振動にてワイヤボンディ
ングするｉ谷にはリードが固定されていないために超音
波振動がリードに吸収されてしまいボンディング不良が
発生する。However, even in the case of in-line type glass-sealed semiconductor devices, when ceramic paste is attached to the glass leads, the leads are not sufficiently bonded, and the problem often arises that the leads are peeled off due to external force. According to an investigation into the cause of this problem, one of the reasons is that in such a folding frame, the leads are held only at their outer ends, making them susceptible to external forces. became moeraka. If the lead comes off in this way, the lead becomes easily deformed, making assembly and handling difficult. In particular, since the lead is not fixed in the i-trough where wire bonding is performed using ultrasonic vibration, the ultrasonic vibration is absorbed by the lead, resulting in poor bonding.
したがって、本発明の目的は、リードはがれの生じない
ガラス封止型半導体装置の製造方法を提供することであ
る。Therefore, an object of the present invention is to provide a method for manufacturing a glass-sealed semiconductor device that does not cause lead peeling.
以下実施例により本発明の詳細な説明する。The present invention will be explained in detail below with reference to Examples.
第２図は本発明のガラス封止半導体装置の製造方法の一
実施例を示す。リードフレーム１０は、平行に延びる２
本の外枠１１と、この外枠１１に直交するとともに平行
に延び、かつそれぞれ外枠１１を繋ぐ横枠１２と、横枠
１２の中央にそれぞれ接続し、かつ外枠１１と横枠１２
とからなる枠の中央に位置する幅広のタブ１３を有する
タブリード１４と、それぞれの外枠１１から枠内力に向
かって横枠１２と平行に延び、かつその先端部は前記タ
ブ１３に向かって屈曲する複数のリード１５と、リード
のガラス封止を行なう領域の外側に位置し、かつそれぞ
れのリード１５および横枠１２を繋ぐ連結部１６とから
なっている。FIG. 2 shows an embodiment of the method for manufacturing a glass-sealed semiconductor device of the present invention. The lead frame 10 has two parts extending in parallel.
The outer frame 11 of the book, the horizontal frame 12 that extends perpendicularly and parallel to the outer frame 11 and connects the outer frame 11, and the outer frame 11 and the horizontal frame 12 that are connected to the center of the horizontal frame 12, respectively.
a tab lead 14 having a wide tab 13 located in the center of a frame consisting of a tab lead 14 extending parallel to the horizontal frame 12 from each outer frame 11 toward the internal force of the frame, and whose tip end is bent toward the tab 13; The connecting portion 16 is located outside the area where the leads are sealed with glass and connects the respective leads 15 and the horizontal frame 12.
□、 、ｌ、！１ｌｌｉ０１道・６ 。ヵ□、 オヶゎ
あ １．−ド１５または横枠１２との境界部は細く形成
されくびれ部（この場合はリードの幅が狭く形成されて
℃・るが、リードの上下面に溝等を設けてもよい。）１
７が形成されている。また、タブリード１４０両端、す
なわち、横枠１２との境界部も前記連結部１６と同様に
くびれ部１８が設けられている。□, ,l,! 1lli01 road/6. Ka□, Ogawaa 1. - The boundary with the lead 15 or the horizontal frame 12 is formed narrowly and constricted (in this case, the width of the lead is formed narrowly, but grooves etc. may be provided on the top and bottom surfaces of the lead)1
7 is formed. Also, constricted portions 18 are provided at both ends of the tab lead 140, that is, at the boundary with the horizontal frame 12, similar to the connecting portion 16.
′このような形状のリードフレーム１０を用意し、これ
を上面に溶解したガラス層を有するセラミックペース１
９に重ね、ガラス層の固化によってリードフレーム１０
のリード１５およびタブリード１４をセラミックペース
１９に固定する。'A lead frame 10 having such a shape is prepared, and a ceramic paste 1 having a melted glass layer on the top surface is prepared.
9 and solidify the glass layer to form a lead frame 10.
The leads 15 and tab leads 14 are fixed to the ceramic paste 19.
つぎに、タブ１３上に半導体ペレット２０を固定した後
、ペレット２０の外部接続用電極とセラミックペース１
９上に固定されたリード１５内端とをワイヤ（金属細線
）２１で接続する。Next, after fixing the semiconductor pellet 20 on the tab 13, the external connection electrode of the pellet 20 and the ceramic paste 1 are connected.
The inner end of the lead 15 fixed on the top of the lead 9 is connected to the inner end of the lead 15 by a wire (fine metal wire) 21.
その後、第３図で示すように、セラミックキャップ２２
をセラミックペース１９に重ねるとともに、熱を加えて
セラミックキャップ２２とセラミックペース１９との間
のガラス層を溶解させて両者を一体化し、封止外囲器２
３を形成する。Thereafter, as shown in FIG.
is placed on the ceramic paste 19, and heat is applied to melt the glass layer between the ceramic cap 22 and the ceramic paste 19 to integrate the two, thereby sealing the envelope 2.
form 3.
つぎに、連結部１６をくびれ部１７から切断するととも
に、タブリード１４をくびれ部１８から切断する。この
際、打抜型を連結部１６あるいはタブリード１４の付は
根部分である横枠１２上に降下させて行なう。この際、
くびれ部に応力集中が生じることから、切断は比較的小
さな力で生じる。このため、リードとガラス層との間に
はクラックが生じない。Next, the connecting portion 16 is cut from the constricted portion 17, and the tab lead 14 is cut from the constricted portion 18. At this time, the connecting portion 16 or the tab lead 14 is attached by lowering the punching die onto the horizontal frame 12, which is the root portion. On this occasion,
Due to the stress concentration at the constriction, cutting occurs with a relatively small force. Therefore, no cracks occur between the leads and the glass layer.
また、前記外枠１１を保持した状態で、第２図の鎖線で
示すような櫛歯状の工具２４で連結部１６を押して切断
してもよい。この場合、工具２４は外枠１１側から封止
外囲器２３側に向けて矢印２５の方向に移動させる。こ
の結果、封止外囲器２３内に臨むリード部分にはほとん
ど外力は加わらないので、リードとガラス層との剥離、
あるいはガラス層内のクラックの発生はない。Alternatively, while holding the outer frame 11, the connecting portion 16 may be pushed and cut using a comb-like tool 24 as shown by the chain line in FIG. In this case, the tool 24 is moved in the direction of arrow 25 from the outer frame 11 side toward the sealed envelope 23 side. As a result, almost no external force is applied to the lead portion facing into the sealing envelope 23, so that the lead and the glass layer may not separate.
Or no cracks occur within the glass layer.
つぎに、リード１５と外枠１１との境界部分で切断し、
不要リードフレーム部分を除去するとともに、封止外囲
器２３から突出するリード部分を折り曲げ、第３図で示
すようなガラス封止半導体装置２６を形成する。Next, cut at the boundary between the lead 15 and the outer frame 11,
The unnecessary lead frame portions are removed, and the lead portions protruding from the sealed envelope 23 are bent to form a glass-sealed semiconductor device 26 as shown in FIG. 3.
このように本発明によれば、各リードはガラス融着部近
傍に位置するリードフレーム部分に設けられた連結部で
支持されているので、リードの強度が強くなっており、
外力が加わってもリードがはがれる問題はなくなる。ま
た、このリードの外端部をリードフレームの枠部に一体
的に接続することにより、リードの強度はさらに向上し
リードハガレの問題はさらに減少する。またリードフレ
ームをフラット化しリードの周囲を枠で囲む構造とすれ
ば、折曲リードフレームに較べ外力を受けにくくなるた
め、リードはがれも少なくなる。As described above, according to the present invention, each lead is supported by the connecting part provided in the lead frame part located near the glass fusion part, so the strength of the lead is increased.
This eliminates the problem of the lead coming off even if external force is applied. Further, by integrally connecting the outer end of the lead to the frame of the lead frame, the strength of the lead is further improved and the problem of lead peeling is further reduced. Furthermore, if the lead frame is made flat and has a structure in which the leads are surrounded by a frame, it will be less susceptible to external forces than a bent lead frame, and the leads will be less likely to come off.
また、連結部およびタブリードの切断部分をくびれさせ
て、切断を容易としているので、封止ガラスのクラック
の発生もなく気密性の低下を来さない。Furthermore, since the cutting portions of the connecting portion and the tab lead are constricted to facilitate cutting, the sealing glass does not crack and the airtightness does not deteriorate.
なお、本発明は前記実施例に限定されない。例えば、リ
ードフレームはタブ部分を有さないものであってもよい
。Note that the present invention is not limited to the above embodiments. For example, the lead frame may not have a tab portion.
図面の簡単な説明 ・・ ：：第１図は従来
のガラス封止半導体装置の一製造工程を示す斜視図、第
２図は本発明のガラス封止半導体装置の一製造工程と、
それに用いるリードフレームを示す平面説明図、第３図
は本発明の製造方法により形成されたガラス封止半導体
装置の斜視図である。Brief description of the drawings: Figure 1 is a perspective view showing one manufacturing process of a conventional glass-sealed semiconductor device, and Figure 2 is a perspective view showing one manufacturing process of a glass-sealed semiconductor device of the present invention.
FIG. 3 is a plan view showing a lead frame used therein, and a perspective view of a glass-sealed semiconductor device formed by the manufacturing method of the present invention.
符号の説明
１・・・リード、２・・・リードフレーム、３・・・外
枠部、４・・・セラミックベース、５・・・半導体ベレ
ット、１０・・・リードフレーム、１１・・・外枠、１
２・・・横枠、１３・・・タブ、１４・・・タブリード
、１５・・・リード、１６・・・連結部、１７・・・く
びれ部、１８・・・くびれ部、１９・・・セラミックペ
ース、２０・・・半導体ベレット、２１・・・ワイヤ、
２２・・・セラミックキャップ、２３・・・封止外囲器
、２４・・・工具、２５・・・矢印、２６・・・ガラス
封止半導体装＃。Explanation of symbols 1...Lead, 2...Lead frame, 3...Outer frame, 4...Ceramic base, 5...Semiconductor pellet, 10...Lead frame, 11...Outside frame, 1
2...Horizontal frame, 13...Tab, 14...Tab lead, 15...Lead, 16...Connection part, 17...Neck part, 18...Narrow part, 19... Ceramic paste, 20... Semiconductor pellet, 21... Wire,
22... Ceramic cap, 23... Sealing envelope, 24... Tool, 25... Arrow, 26... Glass sealed semiconductor device #.
代理人 弁理士 高 橋 明 夫 ””り゛・′） １１ 第 １ 図 第 ２ 図 ４ Ｌ１２．ｆAgent: Patent Attorney Akio Takahashi “” Ri゛・′) 11 Figure 1 Figure 2 4 L12. f
Claims (1)
部と前記複数のリードの外端を接続する枠部とを有する
リードフレームをセラミックベースにガラス融着し、そ
の後前記ガラス融着部近傍においてリード間を連結する
連結部を切断することを特徴とするガラス封止半導体装
置の製造方法。1. A lead frame having a plurality of leads, a connecting portion connecting the plurality of leads, and a frame portion connecting the outer ends of the plurality of leads is glass-fused to a ceramic base, and then the vicinity of the glass-fused portion is 1. A method of manufacturing a glass-sealed semiconductor device, comprising: cutting a connecting portion connecting leads.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58090678A JPS58212152A (en) | 1983-05-25 | 1983-05-25 | Manufacture of glass-sealed semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58090678A JPS58212152A (en) | 1983-05-25 | 1983-05-25 | Manufacture of glass-sealed semiconductor device |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP50076565A Division JPS5841660B2 (en) | 1975-06-24 | 1975-06-24 | Glass frame |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58212152A true JPS58212152A (en) | 1983-12-09 |
| JPS624857B2 JPS624857B2 (en) | 1987-02-02 |
Family
ID=14005191
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58090678A Granted JPS58212152A (en) | 1983-05-25 | 1983-05-25 | Manufacture of glass-sealed semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58212152A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS613434A (en) * | 1984-06-15 | 1986-01-09 | Ricoh Co Ltd | Manufacture of semiconductor device |
-
1983
- 1983-05-25 JP JP58090678A patent/JPS58212152A/en active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS613434A (en) * | 1984-06-15 | 1986-01-09 | Ricoh Co Ltd | Manufacture of semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS624857B2 (en) | 1987-02-02 |
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