JPS58209185A - Magnetoelectricity converting element - Google Patents

Magnetoelectricity converting element

Info

Publication number
JPS58209185A
JPS58209185A JP57092711A JP9271182A JPS58209185A JP S58209185 A JPS58209185 A JP S58209185A JP 57092711 A JP57092711 A JP 57092711A JP 9271182 A JP9271182 A JP 9271182A JP S58209185 A JPS58209185 A JP S58209185A
Authority
JP
Japan
Prior art keywords
layer
electrode
type
working layer
end part
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57092711A
Other languages
Japanese (ja)
Inventor
Yoshito Koga
古賀 良人
Toshihiro Suzuki
敏弘 鈴木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP57092711A priority Critical patent/JPS58209185A/en
Publication of JPS58209185A publication Critical patent/JPS58209185A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N52/00Hall-effect devices
    • H10N52/101Semiconductor Hall-effect devices

Landscapes

  • Hall/Mr Elements (AREA)

Abstract

PURPOSE:To reduce the unbalanced voltage as well as to lessen the drift of this voltage for the titled converting element by a method wherein an N type or P type magnetoelectricity conversion working layer is formed on a GaAs substrate and, in the case where an element is constructed in such a manner that a metal electrode is connected to the end part of the working layer, a high density region consisting of the impurities same as those of the working layer is provided between the working layer and the electrode. CONSTITUTION:After a negative type photoresist has been rotary-painted on a Cr- doped GaAs insulated substrate 1, an aperture is provided, and an N type magnetoelectricity conversion working layer 2 is formed by performing an Si<+> ion implantation. Then, an aperture is provided again by renewing the photoresist, an Si<+> ion is implanted in the same manner, and an N<+> type layer 9 is formed in the substrate 1 including the end part 2' of the layer 2. Subsequently, an SoP2 film is covered on the whole surface, a window is provided at the part 7 where ohmic contact with the electrode metal will be formed, and an AuGe electrode 3 is adhered on the end part 2 through the layer 9. Thus the conductivity of the layer 9 located below the electrode 3 is increased and the influence of crystal effect is reduced by having a uniform ohmic contact on the interface between the layrs 9 and 2.

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明は磁電変換素子に関し、特に通電方向と磁界の方
向に曲角の方向に出力(ホール4圧)を生じるGaAs
  ホール素子に一関するものである。
Detailed Description of the Invention [Technical Field of the Invention] The present invention relates to a magnetoelectric transducer, and in particular to a GaAs transducer that produces an output (Hall 4 voltage) in the direction of a curve in the direction of current flow and the direction of a magnetic field.
This relates to Hall elements.

〔発明の技術的背景および背景技術の間1点〕第1図は
ホール素子の一般的な構成を示すものである。同図にお
いて、lはOrをドープしたGaム8結晶絶縁基板、コ
は絶縁基板lにN型の不純物例えば、81+を注入して
形成した略十字形の磁電変換動作層、J!L 、 Jb
 、 jc 、 3dは動作層λの1つの端部に配設さ
れた金属電極で1,7a 、 、、?bは電流電極、3
C、J(lは出力′電極である。
[One point regarding the technical background of the invention and background art] FIG. 1 shows the general configuration of a Hall element. In the figure, l is an Or-doped Ga 8 crystal insulating substrate, c is a substantially cross-shaped magnetoelectric conversion layer formed by implanting an N-type impurity, such as 81+, into the insulating substrate l, and J! L, Jb
, jc, 3d are metal electrodes arranged at one end of the active layer λ, and 1,7a, , ? b is a current electrode, 3
C, J (l is the output' electrode.

第一図は嵯輛部分の構成を示したものである。Figure 1 shows the structure of the trunk part.

電極3(第1図の電極3a〜Jd )は次のようにして
形成される。即ち、上記のようにして動作層コを形成し
た後、OVD (Chemical Vapor De
position)装置Wにより5102を全面に形成
し、PEP (写真食刻)法により、成極金属とオーム
性接合を持たせる部分の6102をエツチング除去し、
窓7をあける。
The electrodes 3 (electrodes 3a to Jd in FIG. 1) are formed as follows. That is, after forming the active layer as described above, OVD (Chemical Vapor De
position) 5102 is formed on the entire surface using the device W, and the portion 6102 that is to have an ohmic connection with the polarizing metal is etched away using the PEP (photo-etching) method.
Open window 7.

その上に、動作層2 (N4 GaAs )とオーム性
接合を形成し得る金属、例えばAuGe  な全面に蒸
着させ、しかる後2口法により11億ざを形成し、その
後AuGe の共晶温度以上に温度を上げ、オーム性接
合を得る。
On top of that, a metal capable of forming an ohmic junction with the active layer 2 (N4 GaAs), such as AuGe, is deposited on the entire surface, and then a 1.1 billion layer is formed by a two-hole method, and then the temperature is raised to a temperature higher than the eutectic temperature of AuGe. Raise the temperature and obtain ohmic junction.

ホール素子はホール効果を利用したもので、電極、7a
 、 、?b間に電流Icを流し、画論方向(紙面に対
して垂直な方向)に磁界Bをかげると、定電流動作の場
合次式で表わされるホール電圧VHを生じる。
The Hall element uses the Hall effect, and the electrode, 7a
, ,? When a current Ic is passed between B and a magnetic field B is applied in the theoretical direction (perpendicular to the plane of the paper), a Hall voltage VH expressed by the following equation is generated in the case of constant current operation.

VH−KH・工。・B ここで、KMは積感度と呼ばれる実用係数である。VH-KH・Eng.・B Here, KM is a practical coefficient called product sensitivity.

磁界B−oのとき、VHは理論的には0になるが、実際
には十字形の動作層二の非対称性、局部的な異常、およ
び電極近傍における電界集中のため、ある火ぎさを持つ
値となる。この電圧V)io Y不平衝電圧と呼んでい
る。そして、この不−PJii電圧VHOにはドリフト
が生じるという問題がある。
When the magnetic field B-o is present, VH theoretically becomes 0, but in reality it has a certain sharpness due to the asymmetry of the cross-shaped operating layer 2, local anomalies, and electric field concentration near the electrodes. value. This voltage V)io Y is called the unbalanced voltage. Then, there is a problem that a drift occurs in this non-PJii voltage VHO.

電極近傍における電界集中は、エツチングにより形成し
た電極用窓の周縁の凹凸、合金属(オーム性接合部分)
の局部的不均一、合金化により誘発される結晶欠陥によ
り生ずるものである。
Electric field concentration near the electrode is caused by unevenness around the edge of the electrode window formed by etching, alloy metal (ohmic joint)
Local inhomogeneity of the ferrite is caused by crystal defects induced by alloying.

〔発明の目的〕[Purpose of the invention]

本発明の目的は、vnoが小さく、かつVHOのドリフ
トが小さい磁′ゼ変換素子を提供1−ることにある。
An object of the present invention is to provide a magnetozeoconversion element with a small VNO and a small VHO drift.

〔発明の概要〕[Summary of the invention]

本発明の磁電変侯素子は、lq型またはP型の磁電変換
動作j−と金−電極との[田にN廖またはP“層を介在
させたものである。
The magnetoelectric conversion element of the present invention has an N layer or a P layer interposed between a lq-type or p-type magnetoelectric converter and a gold electrode.

〔発明の実施例〕[Embodiments of the invention]

本発明に係るホール素子は、その全体的構成は、第1図
のものと同様であるが、′、A3図および第q図に示す
ように、N型の磁゛1変換励咋)−一と金属電極3との
接続部分が異なる。即ち、金h4醒極3の下方K N+
層デが形成され、金属電極が8層りを介してN型の動作
J−,2に腰続されている。なH1第JiJで鎖線コ1
は一層のうち、最初に動作層λとともに形成された部分
を示す。
The Hall element according to the present invention has the same overall configuration as that in FIG. 1, but as shown in FIG. The connecting portion with the metal electrode 3 is different. That is, the lower K N+ of gold h4 awakening pole 3
A layer D is formed and a metal electrode is connected to the N-type actuator J-,2 through eight layers. Dotted line Ko1 in H1 No. JiJ
indicates a portion of one layer that is first formed together with the active layer λ.

このような構成のホール素子を形成する方法は、例えば
次の如くである。ます、OrをドープしたGaA3結晶
絶mll1.板lに、ネガタイプのホトレジストを2.
3μmの厚さに回転塗布したる後、PEP法でN層コと
なる部分な露出させ、イオン注入装置で十 Sl を加速電圧200 KeV、ドーズii y、O
x 10122 α 打込む。次に、上記ホトレジストを剥離し、再びネ
ガタイプホトレジストを2.5μmの厚さに回転塗布し
、Pπ法でNN?となる部分を露出させ、S1+を加速
室EE soo KeV、ドーズ% /、Ox 10 
cm打込む。次にホトレジストを剥離する。しかる後、
AsH4ガス雰囲気中で、ざ00℃、2分間のアニール
を行なし・、イオン注入したSl を活性化し、N型動
作層コおよびN+層デを形成する。
A method for forming a Hall element having such a configuration is, for example, as follows. 1. GaA3 crystal doped with Or. 2. Apply negative type photoresist to plate l.
After spin-coating to a thickness of 3 μm, the part that would become the N layer was exposed using a PEP method, and 10 Sl was applied using an ion implantation device at an acceleration voltage of 200 KeV and a dose of
x 10122 α Input. Next, the above photoresist was peeled off, and a negative type photoresist was spin-coated again to a thickness of 2.5 μm, and NN? Exposing the part where S1+ is
Enter cm. Next, the photoresist is peeled off. After that,
Annealing is performed at 00° C. for 2 minutes in an AsH4 gas atmosphere to activate the ion-implanted Sl and form an N-type active layer and an N+ layer.

シカル後、OV’D装置tKより、厚さJOOOAの5
102膜を全面に形成し、電極金属とオーム性接合を形
成する部分7のs1’o+膜をエツチングし、窓あけを
行なう。此の際、窓7の動作層2測の端部か、N層?内
に位置するように、好ましくは1作1場コとN+層りと
の界面よりもN層9側に約i0 Prn以上後退した位
置に来るようにする。次に、厄イビームガン蒸着装置社
を用い、′慮極金礪のAuGa(Gaの含有率12q6
)を5000 A蒸着し、PR)法により電極3を形成
する。そして、レジスト剥離後、Arガス雰囲気中で1
.1.0分間、l1tOθ℃で加熱して合金化し、超極
3と8層りどの間Vこオーム性接合を形成する。
After the physical, from the OV'D device tK, the thickness of JOOOA is 5.
102 film is formed on the entire surface, and the s1'o+ film in the portion 7 that forms an ohmic contact with the electrode metal is etched to form a window. In this case, is it the end of the second active layer of window 7, or the N layer? It is preferably set back to the N layer 9 side by about i0 Prn or more from the interface between the first layer and the N+ layer. Next, using Yakui Beam Gun Vapor Deposition Equipment Co., Ltd., we deposited AuGa (Ga content: 12q6) of
) was evaporated at 5000 A, and the electrode 3 was formed by the PR) method. After removing the resist, 1
.. Alloying is achieved by heating at l1tOθ°C for 1.0 minutes to form a V co-ohmic junction between the superpole 3 and the 8-layer electrode.

N+層りと金属電極3との間の接合部分には、N型の動
作層−と金属電極3との間の接合部分(第2図の場合)
と同様結晶欠陥が生じる。しかし、十 N層デは導電率が高く、導体として作用する一方、N+
層デと動作層コとの界面は均一で良好なオーム性接合を
形成しているので、結晶欠陥の影響が小さい。また、第
一図に示すように、N層デを動作層コよりも厚く形成す
る(例えば、約0.λμの動作層コに対し、NMt?を
約o、srμとする)ことにより、結晶欠陥の影響を一
層小さくすることができる。この結果、電界集中による
WHOおよびそのドリフトを著しく小さくすることがで
きる。
The joint between the N+ layer and the metal electrode 3 includes the joint between the N-type active layer and the metal electrode 3 (in the case of FIG. 2).
Similarly, crystal defects occur. However, while the 10N layer has high conductivity and acts as a conductor,
Since the interface between layer D and active layer C forms a uniform and good ohmic junction, the influence of crystal defects is small. In addition, as shown in Figure 1, by forming the N layer D thicker than the active layer (for example, for the active layer K of about 0.λμ, make NMt? about o, srμ), The influence of defects can be further reduced. As a result, WHO and its drift due to electric field concentration can be significantly reduced.

−例を挙げれば、素子抵抗(Rd) fθθ〜1ooo
Ωで、定電流動作において、Icw z−でVHo <
 !rmV、かつ工(! −10mAでVHOドリフト
(0,4<mVとすることが町冑ヒとなった。
-For example, element resistance (Rd) fθθ~1ooo
Ω, in constant current operation, VHo < at Icw z-
! rmV, and voltage (! -10mA, VHO drift (0.4 <mV) has become a town's policy.

尚、第3図の実施例では、N層デの一部に窓7をあける
こととしているが、1層9が動作層コと接する側以外の
部分では、窓7(従って電極3との接合部)が、一層り
からはみ出していてもよい。
In the embodiment shown in FIG. 3, the window 7 is formed in a part of the N layer D, but in the part other than the side where the first layer 9 contacts the active layer D, the window 7 (therefore, the connection with the electrode 3 part) may protrude from the layer.

第3図はその一例を示すものである。FIG. 3 shows an example.

また、N型の動作層コおよびN層9はイオン注入法によ
って形成したものに限らず、他の方法例えば拡散法によ
って形成したものであってもよい。さらに、半導体をN
型にする不純物を加えて動作層およびN層を形成したホ
ール素子について述べたが、P型にする不純物を加えて
P5の動作層およびP#を形成したホール素子とするこ
ともできる。
Further, the N-type active layer 9 and the N-type active layer 9 are not limited to those formed by the ion implantation method, but may be formed by other methods such as a diffusion method. Furthermore, the semiconductor
Although a Hall element has been described in which an active layer and an N layer are formed by adding a type impurity, a Hall element may be formed in which a P5 active layer and a P# are formed by adding a P type impurity.

〔発明の効果〕〔Effect of the invention〕

以上のように本発明の磁電変換素子は、缶型変換動作層
と金属電極との間に、動作層よりも不純物濃度が高い層
が介在しているので、半導体層と金属電極と1.の間の
合金層の不均一、結昌歪等の影普が小さく、不平均電圧
vHeおよびそのドリフトを著しく小さくすることがで
きる。
As described above, in the magnetoelectric conversion element of the present invention, a layer having a higher impurity concentration than the active layer is interposed between the can-shaped conversion active layer and the metal electrode, so that 1. The effects of non-uniformity of the alloy layer between the two layers, crystallization strain, etc. are small, and the non-average voltage vHe and its drift can be significantly reduced.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はホール素子の一例の全体的構成を示す概略図、
第2図は従来のホール素子の重積部分を示す平面図、第
3図は本発明のホール素子の一実施例の電極部分を示す
平面図、第ダ図は第3図のIV−、IV線「祈面図、第
S図+!本弗明のホール素子の他の爽施例の′4憧部分
ケ不す平面図でめる。 /・・・IjaAs結晶絶赫基板、コ・・・N僧仏龜変
換動作)−13,3a〜3d・・・金属d4s、 7・
・・怒、?・・・一層。
FIG. 1 is a schematic diagram showing the overall configuration of an example of a Hall element,
FIG. 2 is a plan view showing an overlapping portion of a conventional Hall element, FIG. 3 is a plan view showing an electrode portion of an embodiment of the Hall element of the present invention, and FIG. Line ``Prayer drawing, Fig. S+! A plan view of another example of the Hall element of the present work, with the ``4'' part removed./...IjaAs crystal high-glow substrate, co...・N monk Buddha translation movement) -13, 3a~3d...metal d4s, 7.
...Anger? ...even more.

Claims (1)

【特許請求の範囲】[Claims] GaA s結晶基板上に、該GIS−Aa結晶をN型ま
たはP型にする不純物を添加して磁電変換動作層を形成
し、該動作層の端部に金属電極を接続して成る磁電変換
素子において、帥記磁電変換動作層と前記金属電極との
間に、前記磁電変換動作層と同等な不純物を、より高い
濃度で添加して形成した層を介在させたことを特徴とす
る磁電変+Ii!累子。
A magnetoelectric conversion element comprising a GaAs crystal substrate, a magnetoelectric conversion active layer formed by adding an impurity that makes the GIS-Aa crystal N-type or P-type, and a metal electrode connected to the end of the active layer. In the magnetoelectric converter+Ii, a layer formed by adding an impurity equivalent to that of the magnetoelectric converter layer at a higher concentration is interposed between the magnetoelectric converter layer and the metal electrode. ! Yuko.
JP57092711A 1982-05-31 1982-05-31 Magnetoelectricity converting element Pending JPS58209185A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57092711A JPS58209185A (en) 1982-05-31 1982-05-31 Magnetoelectricity converting element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57092711A JPS58209185A (en) 1982-05-31 1982-05-31 Magnetoelectricity converting element

Publications (1)

Publication Number Publication Date
JPS58209185A true JPS58209185A (en) 1983-12-06

Family

ID=14062044

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57092711A Pending JPS58209185A (en) 1982-05-31 1982-05-31 Magnetoelectricity converting element

Country Status (1)

Country Link
JP (1) JPS58209185A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2018160629A (en) * 2017-03-23 2018-10-11 旭化成エレクトロニクス株式会社 Hall element and manufacturing method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2018160629A (en) * 2017-03-23 2018-10-11 旭化成エレクトロニクス株式会社 Hall element and manufacturing method thereof

Similar Documents

Publication Publication Date Title
JPH0575046A (en) Manufacture of integrated circuit
JPS58209185A (en) Magnetoelectricity converting element
JPH11162874A (en) Ohmic joint electrode and semiconductor device using the same
JPH06120258A (en) High electron mobility transistor
JP3006274B2 (en) GaAs Hall element and method of manufacturing the same
JPS59129483A (en) Hall element
JPH03240281A (en) Gaas hall element
JPS5935480A (en) Semiconductor device
JPS61206277A (en) Superconductive transistor
JPS59126676A (en) Field effect type transistor
JPH11224931A (en) Forming of resistance element
JPS59195823A (en) Electrode formation
JP2002217211A (en) Semiconductor device and its manufacturing method
JPS59228768A (en) Semiconductor integrated circuit
JPH0198268A (en) Semiconductor radioactive detector
JPH0810705B2 (en) Integrated circuit device
JPH06196771A (en) Hall element
JPS61204931A (en) Formation of resistance contact on iii-v semiconductor
JPH0478034B2 (en)
JP2003324224A (en) Magnetoresistance element and manufacturing method therefor
JPH06188477A (en) Magnetoelectric transducer
JPS60145612A (en) Manufacture of semiconductor device
JPH01102968A (en) Liquid crystal panel device
JPS6159725A (en) Formation of ohmic electrode
JPS6294981A (en) Formation of electrode for semiconductor device