JPS58204595A - Method of producing printed circuit board - Google Patents

Method of producing printed circuit board

Info

Publication number
JPS58204595A
JPS58204595A JP8660882A JP8660882A JPS58204595A JP S58204595 A JPS58204595 A JP S58204595A JP 8660882 A JP8660882 A JP 8660882A JP 8660882 A JP8660882 A JP 8660882A JP S58204595 A JPS58204595 A JP S58204595A
Authority
JP
Japan
Prior art keywords
plating
soldering
resist
board
planned
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8660882A
Other languages
Japanese (ja)
Inventor
明 松尾
勇 田中
廣 菊池
岡 「ひとし」
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP8660882A priority Critical patent/JPS58204595A/en
Publication of JPS58204595A publication Critical patent/JPS58204595A/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 本発明は、スルーホール印刷配線板に係り、特に導体間
の絶縁性が良く高密度化に好適な印刷配線板の製造方法
に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a through-hole printed wiring board, and particularly to a method for manufacturing a printed wiring board that has good insulation between conductors and is suitable for high density.

印刷配線板は、種々の方法で製造されている。Printed wiring boards are manufactured by various methods.

しかし、印刷配線板は高密度配線化にともない、導体回
路の高精度a線化、表面導通孔の小型化および導体間の
絶縁時性向上等が要求されている。
However, as printed wiring boards become more densely interconnected, there are demands for high-precision A-line conductor circuits, miniaturization of surface conductive holes, and improved insulation properties between conductors.

従来、高密度配線板は、両面鋼張り積層板上にフォトエ
ツチング法あるいはスクリーン印刷法により耐エツチン
グ・レジストを形成し、エツチングにより所望の導体回
路を形成し、ランド部(パッド)を通じて所定の位置に
孔あけを行ない、塩化第一錫、塩化パラジウム液等の無
電解銅めつさ用活性剤に浸漬、乾燥し、続いて所望のは
んだ付は予定部(ランド)以外ケスクリーン印刷により
耐めっきレジストを印刷し、無電解鋼めっきを行なって
スルーホールを形成して製造しでいた。
Conventionally, high-density wiring boards are produced by forming an etching-resistant resist on a double-sided steel-clad laminate by photoetching or screen printing, forming a desired conductor circuit by etching, and then attaching it to a predetermined position through a land (pad). Holes are drilled in the area, immersed in an activator for electroless copper mating such as stannous chloride or palladium chloride solution, and dried.Then, the desired soldering is done by screen printing on all but the planned areas (lands) to prevent plating. It was manufactured by printing a resist and performing electroless steel plating to form through holes.

しかし、上記の方法では、銅箔厚ぎが均一な鋼張り積層
板から導体回路を形成するため、配線パターンの細線化
、高精度化には非常に有利であるが、その反面導体パタ
ーン形成後の基板全面に化学鋼めっきの触媒となるパラ
ジウムが吸着されているため、高密度配線板、すなわち
電子機器用印刷配線板としては導体回路間の絶縁特性に
難点があった。
However, in the above method, the conductor circuit is formed from a steel-clad laminate with a uniform copper foil thickness, which is very advantageous in making the wiring pattern thinner and more precise. Because palladium, which serves as a catalyst for chemical steel plating, is adsorbed on the entire surface of the board, it is difficult to use as a high-density wiring board, that is, a printed wiring board for electronic equipment, in terms of insulation properties between conductor circuits.

また、導通孔に形成するめつき皮膜は、信頼性の観点か
ら厚さが通常3Qlffn 程変必要であった。このた
め配礫板は、高アルカリ(pH12〜16)の化学鋼め
っき液に10〜20時間浸漬することになり、耐めっき
レジスト膜のピンボール部または膜厚の薄い個所からめ
つき液が浸透して導体の変色、レジスト膜の剥離が発生
し、結果的にははんだ付は時の配線板不良の原因となっ
ていた。
Further, from the viewpoint of reliability, the thickness of the plating film formed on the conductive hole usually needs to vary by about 3Qlffn. For this reason, the gravel plate is immersed in a highly alkaline (pH 12 to 16) chemical steel plating solution for 10 to 20 hours, which prevents the plating solution from penetrating through the pinball portions of the plating resist film or areas where the film is thin. Discoloration of the conductor and peeling of the resist film occurred, and as a result, soldering caused defective wiring boards.

本発明の目的は、上記した従来技術の欠点をなくし、導
体回路間の絶縁性の優れた高密度印刷配線板の製造方法
を提供することである。
An object of the present invention is to eliminate the above-mentioned drawbacks of the prior art and to provide a method for manufacturing a high-density printed wiring board with excellent insulation between conductor circuits.

上記目的を達成Tるために、本発明による印刷配線板の
製造方法は、絶縁基板上に予め導体回路が形成された基
板を用い、1.基板の所定個所に孔あけ加工後、はんだ
付は予定部分を残し樹脂層を形成下る工程と、その全体
に化学鋼めっき前処理を施丁工程と、さらにはんだ付は
予定部分を残し、耐めっき液性ソルダ−1レジストを形
成する工程と、化学鋼めっき前処理剤が形成露出されて
いる孔内壁およびはんだ付は予定部の導体上に化学鋼め
っきを形成する工程とからなることを要旨とする。
In order to achieve the above object, a method for manufacturing a printed wiring board according to the present invention uses an insulating substrate on which a conductor circuit is previously formed, and 1. After drilling holes in the predetermined locations on the board, soldering involves a process of forming a resin layer, leaving the planned areas, and a process of applying chemical steel plating pre-treatment to the entire surface. The gist is that it consists of a process of forming a liquid solder 1 resist, and a process of forming a chemical steel plating on the exposed inner wall of the hole and the conductor in the area where soldering is planned. do.

本発明によれば、導体回路間の絶縁特性向上が両面張り
積層板上にエツチング拳し゛ノストを形成し、このエツ
チング・レジストをエツチングして所望の導体回路を形
成した後、基板表面子なわち不要鋼箔部のエツチング除
去面(絶縁材面)に化学鋼めっきの触媒となるパラジウ
ム等のめつき核が吸着、残留しない工法により解決でき
る。ざらに、はんだ付は予定部および導通用孔内壁のみ
を化学鋼めっきで形成するためのめつさレジスト(ソル
ダー−レジスト)は、ピンホールおよびレジスト膜厚が
小ざい場合には、導体回路の変色あるいは密着不良によ
る脹n等が生じる。これらレジストの耐めっき液性には
、種々検討した結果、膜厚を増加することが有効である
ことが見い出された。Tなわち、両面銅張り積層板上に
公知の方法によりエツチングOレノスト?形成し、エツ
チングにより所望の導体回路を形成した後、所定位置に
表裏導通用孔あけを行ない、つぎにはんだ付は予定部分
乞残し基板全面に樹脂層を形成し、化学鋼めっき用活性
化処理を行ない、つぎに上記の樹脂層上(はんだ付は部
以外)に耐めっきレジスト乞形成し、しかる後に化学鋼
めっきを行なう。
According to the present invention, the insulation properties between conductive circuits are improved by forming an etching resist on a double-sided laminate, and after etching this etching resist to form a desired conductive circuit, This problem can be solved by a method that does not allow plating nuclei such as palladium, which acts as a catalyst for chemical steel plating, to adsorb or remain on the etched surface (insulating material surface) of the unnecessary steel foil portion. Roughly speaking, soldering resist (solder resist) is used to form only the intended part and the inner wall of the conductive hole with chemical steel plating. Discoloration or swelling due to poor adhesion may occur. As a result of various studies, it has been found that increasing the film thickness is effective for improving the plating solution resistance of these resists. In other words, etching is performed on a double-sided copper-clad laminate using a known method. After forming the desired conductor circuit by etching, holes for front and back conductivity are drilled at predetermined positions. Next, a resin layer is formed on the entire surface of the board, leaving the planned areas for soldering, and an activation treatment for chemical steel plating is performed. Next, a plating-resistant resist is formed on the resin layer (other than the soldering part), and then chemical steel plating is performed.

この方法において化学銅めっきは活性化面が露出してい
る孔内壁およびはんだ付は予定部のみ選択的に析出する
。さらには導体間の絶縁性を低化させる活性化剤(パラ
ジウム)は樹脂層とツルグー・レジストの二重膜の中間
に固着される。またソルダー・レジスト膜は二重層のた
めピンホールレス、膜厚増大となり耐めっき液性に優n
ることにより、高密度かつ導体回路間の絶縁性に優れた
スルーホールを有Tる印刷配線板を安定に製造すること
ができる。
In this method, chemical copper plating is selectively deposited only on the inner wall of the hole where the activated surface is exposed and on the planned area for soldering. Furthermore, an activator (palladium) that lowers the insulation between conductors is fixed between the resin layer and the double film of Tsurugu resist. In addition, since the solder resist film is a double layer, there are no pinholes, and the film thickness is increased, making it highly resistant to plating solutions.
By doing so, it is possible to stably manufacture a printed wiring board having through holes with high density and excellent insulation between conductor circuits.

本発明に用いられる耐脂層および耐めっき液性ソルダー
・レジストとしてはエポキシ樹脂。
Epoxy resin is used as the grease-resistant layer and plating liquid-resistant solder resist used in the present invention.

フニノキシ樹脂、エポキシ樹脂用硬化剤とじてのイミグ
ゾール系硬化剤、芳香族アミン系硬化剤および充填剤、
揺変剤からなる耐脂組、蚊物またはエポキシ樹脂、フェ
ノキシ樹脂、エポキシ樹脂の硬化剤としてイミダゾール
系硬化剤、芳香族アミン系硬化剤および充填剤、種変剤
、有機溶剤およびトリアゾール、ベンゾトリアゾール、
アジミドトルエン、メルカプトベンゾチアゾールのうち
から選ばれた1種の化合物からなる樹脂組成物が好適で
ある。耐脂層および耐めっす液性ツルター・レジストは
同一の組1物であってもよい。
Funinoxy resin, imiguzole curing agent such as epoxy resin curing agent, aromatic amine curing agent and filler,
Grease-resistant assembly made of thixotropic agent, mosquito material or epoxy resin, phenoxy resin, imidazole curing agent as curing agent for epoxy resin, aromatic amine curing agent and filler, species modifier, organic solvent, triazole, benzotriazole ,
A resin composition comprising one type of compound selected from azimidotoluene and mercaptobenzothiazole is preferred. The grease-resistant layer and the liquid-resistant sulter resist may be the same set.

本発明に用いられる感度付与剤としては、例えば、塩化
第一錫の塩酸酸性溶液などが好適である。
As the sensitizing agent used in the present invention, for example, a solution of stannous chloride in hydrochloric acid is suitable.

本発明に用いられる活性化剤としては塩化ノ(ラジウム
の塩酸酸性溶液が好適である。さらに、この発明におい
て感度付与剤と活性化剤χ−液で行なうシラプレー社の
カタリスト9Fを利用することもできる。
As the activator used in the present invention, a hydrochloric acid acidic solution of radium chloride is suitable.Furthermore, in the present invention, it is also possible to use Catalyst 9F from Silaplay, which uses a sensitizer and an activator χ-liquid. can.

この発明に用いられる化学銅めっき液とじては二価銅塩
、二価鋼イオンの錯化剤、−価鋼イオンの錯化剤、界面
活性剤および二価イオンの還元剤からなるめっき液が好
適である。
The chemical copper plating solution used in this invention is a plating solution consisting of a divalent copper salt, a complexing agent for divalent steel ions, a complexing agent for -valent steel ions, a surfactant, and a reducing agent for divalent ions. suitable.

つぎに図面?用い本発明によるスルーホール印刷配薇板
の製造方法の具体的実施例を示す。
Drawings next? A specific example of the method for manufacturing a through-hole printed distribution board according to the present invention will be described.

図(a)のガラス・エポキシ樹脂積層板1に両面鋼箔(
35μm) 2を接着した絶縁板上(こスフ’J −ン
印刷法により、図(b)に示すように、アルカリ可溶型
エツチング自レジスト3を所望の導体回路パターンに印
刷形成する。つぎに塩化第二鋼溶液により回路予定部分
以外?エツチング除去する(図(C))。その後基板を
5%水酸化す) IJウム溶液に浸漬し、エツチング・
レジスト3を溶解除去した後(図(d))両面導通用の
スルーホール4馨プレスまたはドリルによつ所定の位置
に孔あけ加工する(図(e))。しかる後に基板のはん
だ付は予定部分乞残し、基板全面に耐めっき液性に優れ
たソルダー−レジストラスクリーン印刷法法により形成
し、150°C,so仕分間硬化条件にて加熱硬化する
。本実施例に用いた酎めっき液性ソルダ−9しジスト組
成物は以下に通りである。
Double-sided steel foil (
As shown in Figure (b), an alkali-soluble etching self-resist 3 is printed on the insulating plate (35 μm) 2 bonded to the desired conductive circuit pattern using the wafer printing method. Etch the area other than the circuit planned area using a chlorinated steel solution (Figure (C)).Then, hydrate the board at 5%).Immerse it in an IJium solution and perform etching.
After the resist 3 is dissolved and removed (Figure (d)), through-holes 4 for double-sided conduction are drilled at predetermined positions using a press or drill (Figure (e)). Thereafter, soldering of the board is carried out on the entire surface of the board by a solder-registrar screen printing method which is excellent in resistance to plating liquid, leaving the predetermined parts unsoldered, and the solder is heated and cured at 150 DEG C. under SO sorting curing conditions. The liquid solder composition for plating used in this example is as follows.

エゴキシ樹脂(エピコート152)・・・−・・・・・
・・100重量部フェノキシ樹i樹脂 PKHH)  
・・・・・・・・・・・・ 20〃タルクMS  ・・
・・・・・・・・・・・・・・・・・・・・・・・・・
・・・・・・・・・・・・・・・・・・・・・・・・1
1〃酸化珪素粉末(アエロジル380)・・・・・・・
・・・−・・・・・・・・−・ 4,7〃フタロシアニ
ングワーン ・・・・・・・・・・・・・・・・−・・
・・・・・ 5.2#シリコーンオイル(,8H551
10)・・・・・・・・ 1.2#ローブチルセロソル
ブ  1161109.1.1191.1011610
.60.。
Egoxy resin (Epicote 152)・・・・・・・・・
...100 parts by weight phenoxy resin PKHH)
・・・・・・・・・・・・ 20〃Talc MS・・
・・・・・・・・・・・・・・・・・・・・・・・・
・・・・・・・・・・・・・・・・・・・・・・・・1
1. Silicon oxide powder (Aerosil 380)...
・・・-・・・・・・・・・・−・ 4,7〃Phthalocyaning one ・・・・・・・・・・・・・・・・・・・・・
・・・・・・ 5.2# silicone oil (,8H551
10)・・・・・・・・・ 1.2# Robe Chil Cellosolve 1161109.1.1191.1011610
.. 60. .

2−エチル−4−メチルイミダゾール ・・・・・・・
・・・・・・・・  8 〃芳香族アミン(アデカハー
ドナーEH1013)・・・20#耐めっきソルダー・
レジスト(図げ))を形成した後、化学鋼めっきを施こ
丁ための前処理として市販されているシラプレー社前処
理剤である7#キレート(脱脂)、水洗、コンディショ
ナーi 160 、水洗、酸洗(2N−Hcl)、カメ
リスト。水洗、アクセレータ、水洗し、基板全面にめっ
き触媒を形成(図示せず)した。つぎに80℃、10分
Gこて乾燥した後、ざらにはんだ付は予定部(ランド部
)を残し、スクリーン印刷法により上記した耐めっき液
性ソルダー・レジ7ト6乞印刷形成し、基板表面(はん
だ付は予定部以外)のめつき触媒を被覆し、硬化条件1
50°C150分にて硬化させた(図(g))。その後
、化学鋼めっき液に15時間浸漬し、図中)のようには
んだ付は予定部および孔内壁に銅被膜7を約50μm析
出せしめた。化学鋼めっき処理において鋼の析出はめつ
き触媒が露出しているはんだ付は予定部(ランド)およ
びスルーホール内壁のみに選択的に形成される。本実施
例に用いた化学鋼めっき液組成および条件は下記に示T
とうりである。
2-ethyl-4-methylimidazole ・・・・・
・・・・・・・・・ 8 Aromatic amine (ADEKA Hardener EH1013)...20# plating resistant solder・
After forming a resist (resist), use Silapray's 7# chelate (degreasing), a commercially available pretreatment agent for chemical steel plating, water washing, conditioner i 160, water washing, and acid. Washing (2N-Hcl), Kamerist. Water washing, accelerator washing, and water washing were performed to form a plating catalyst (not shown) on the entire surface of the substrate. Next, after drying with a G trowel at 80°C for 10 minutes, the above-mentioned plating liquid-resistant solder resist was printed using the screen printing method, leaving the rough soldering areas (land areas). Cover the surface (other than the planned areas for soldering) with the plating catalyst and apply curing conditions 1.
It was cured at 50°C for 150 minutes (Figure (g)). Thereafter, it was immersed in a chemical steel plating solution for 15 hours, and a copper film 7 of about 50 μm was deposited on the planned soldering area and on the inner wall of the hole as shown in the figure. In the chemical steel plating process, solder joints in which steel deposits and plating catalysts are exposed are selectively formed only in planned areas (lands) and on the inner walls of through-holes. The chemical steel plating solution composition and conditions used in this example are shown below.
It's tori.

Cu So、 e 5H20==j 2 g/ IED
TA−2Na         =d2g/INa O
H=1t s g/i ポリエチレングリコールステアリルアミン= 11] 
Omg/’ 1 α、α′−ジピリジル        =50mg//
HCHO(57%)          =3mi/i
めっき温度= 7(1”c 、 I)H= 12.2 
、速度=2加4化学鋼めつ液上成分であるCu5O,、
HCHOおよびpHは自動管理装置により一定濃度とし
た。
Cu So, e 5H20==j 2 g/IED
TA-2Na = d2g/INaO
H = 1t s g/i polyethylene glycol stearylamine = 11]
Omg/' 1 α, α'-dipyridyl = 50mg//
HCHO (57%) = 3mi/i
Plating temperature = 7 (1”c, I)H = 12.2
, speed = 2 + 4 Cu5O, which is a component on the chemical steel solution,
HCHO and pH were kept at constant concentrations using an automatic control device.

本発明においては上記の方法によってスルーホール印刷
配線板が製造されるのでつぎに示す効果がある。
In the present invention, since a through-hole printed wiring board is manufactured by the above method, the following effects are achieved.

(1)  本方法においては、化学鋼めっきが不要な部
分下なわち、はんだ付は予定部および孔内壁以外は耐め
っきソルダー・レジストが形成されているため、化学鋼
めっきは孔内壁およびランド部のみにしか形成されない
。したがって、化学鋼めっきの損失が少なく経済的であ
る。
(1) In this method, a plating-resistant solder resist is formed under the parts where chemical steel plating is not required, that is, except for the planned areas and the hole inner walls, so chemical steel plating is applied to the hole inner walls and lands. It is formed only in Therefore, chemical steel plating has less loss and is economical.

(2)本方法においては、導体回路は厚さの均一な銅箔
を用いるため、エンチング特性に優れ、導体回路の細線
化に有利である。またスルーホールの形成には化学鋼め
っきのみが使用されているので、孔径が小さくても有利
で高密度な基板が製造できる。
(2) In this method, since a copper foil having a uniform thickness is used for the conductor circuit, it has excellent etching properties and is advantageous for thinning the conductor circuit. Also, since only chemical steel plating is used to form the through holes, advantageous and high density substrates can be produced even with small hole diameters.

(3)  本方法においては、導体回路間の絶縁抵抗は
、低下因子の一つである活性化剤Tなわちパラジウムが
耐めっきソルダー・レジスト層に固着され、導体回路層
と遮断されているため高絶縁化が可能である。
(3) In this method, the insulation resistance between the conductor circuits is reduced because the activator T, that is, palladium, which is one of the factors for reducing the insulation resistance, is fixed to the plating-resistant solder/resist layer and is isolated from the conductor circuit layer. High insulation is possible.

(4)  本方法においては、耐めっき液性ソルダー・
レジストは二重層を形成しているため、ピンホールレス
であるとともに、膜厚が太いため、高温、高アルカリ性
化学鋼めっき液に長時間浸漬してもめっき液浸透による
導体変色および導体との密着不良がない。
(4) In this method, plating liquid-resistant solder
Since the resist forms a double layer, there are no pinholes, and the film is thick, so even if it is immersed in high-temperature, highly alkaline chemical steel plating solution for a long time, it will not discolor the conductor due to penetration of the plating solution and will not adhere to the conductor. There are no defects.

(5)本方法においでは、耐めっきレジストはソルダー
・レジストの特性を有するものであるため工程簡略化が
可能である。
(5) In this method, the process can be simplified because the plating-resistant resist has the characteristics of a solder resist.

以上説明したように本発明のスルーホール印刷配線板の
製造方法によれば、2.541ピツチに5〜4本の導体
ライン(0,071w〜0.10μm)7育する5〜4
チャンネル高密度→刷配線板が製造でき、かつ導体間絶
縁抵抗を108Ω以上とすることができ、高密度基板を
低価格に製造することができるという効果が得られる。
As explained above, according to the method of manufacturing a through-hole printed wiring board of the present invention, 5 to 4 conductor lines (0.071w to 0.10 μm) are grown at 2.541 pitches.
It is possible to manufacture a printed wiring board with high channel density, and the insulation resistance between the conductors can be set to 108Ω or more, and it is possible to produce a high-density board at a low cost.

【図面の簡単な説明】[Brief explanation of drawings]

図は本発明によるスルーホール印刷配線板の製造方法の
工程を示T断面図である。 1・・・ガラス布エポキシ耐脂積層板、2・・鋼箔、 3・・・エツチング・レジスト、 4・・・スルーホール、 5.6・・・耐めっきソルダー・レジスト、7・・・化
学銅被膜。 1 代理人弁理士 薄 1)利 幸
The figure is a T cross-sectional view showing the steps of the method for manufacturing a through-hole printed wiring board according to the present invention. 1... Glass cloth epoxy grease-resistant laminate, 2... Steel foil, 3... Etching resist, 4... Through-hole, 5.6... Plating-resistant solder resist, 7... Chemical Copper coating. 1 Representative Patent Attorney Usui 1) Toshiyuki

Claims (1)

【特許請求の範囲】[Claims] 絶縁基板上に予め導体回路が形成された基板を用い、基
板の所定個所に孔あけ加工後、はんだ付は予定部分を残
し砺脂層を形成する工程と、その全体に化学鋼めっき前
処理を施す工程と、さらにはんだ付は予定部分を残し、
耐めっき液性ソルダー・レジストを形成する工程と、化
学鋼めっき前処理剤が形成露出されている孔内壁および
はんだ付は予定部の導体上に化学鋼めっきを形成する工
程とからなることを特徴とする印刷配線板の製造方法。
Using an insulating board with a conductor circuit formed in advance, after drilling holes in the predetermined locations on the board, the soldering process involves forming a resin layer, leaving the planned areas, and pre-treating the entire board with chemical steel plating. The process of applying and further soldering leave the planned part,
It is characterized by the process of forming a plating liquid-resistant solder resist, and the process of forming a chemical steel plating on the exposed inner wall of the hole where a chemical steel plating pretreatment agent is formed and on the conductor in the area where soldering is planned. A method for manufacturing a printed wiring board.
JP8660882A 1982-05-24 1982-05-24 Method of producing printed circuit board Pending JPS58204595A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8660882A JPS58204595A (en) 1982-05-24 1982-05-24 Method of producing printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8660882A JPS58204595A (en) 1982-05-24 1982-05-24 Method of producing printed circuit board

Publications (1)

Publication Number Publication Date
JPS58204595A true JPS58204595A (en) 1983-11-29

Family

ID=13891723

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8660882A Pending JPS58204595A (en) 1982-05-24 1982-05-24 Method of producing printed circuit board

Country Status (1)

Country Link
JP (1) JPS58204595A (en)

Similar Documents

Publication Publication Date Title
US4622097A (en) Process for producing copper through-hole printed circuit board
JP2002508453A (en) Printed circuit manufacturing process using tin-nickel plating
JPH06275950A (en) Manufacture of wiring board
JPS58204595A (en) Method of producing printed circuit board
EP0335565B1 (en) Process for producing printed wiring board
JP2919181B2 (en) Printed circuit board manufacturing method
JPH05259614A (en) Resin filling method for printed wiring board
JPH06152126A (en) Manufacture of wiring board
JPS60214594A (en) Method of producing printed circuit board
JPH08139435A (en) Manufacture of printed wiring board
JPH0783170B2 (en) Wiring board and manufacturing method thereof
JPS59155994A (en) Method of producing printed circuit board
JP3465016B2 (en) Method for improving adhesion of resin to copper surface and high adhesion electroless copper plating bath used for the method
JPH01295489A (en) Manufacture of printed wiring board and wiring board obtained by this manufacturing method
JPS59117196A (en) Method of producing printed circuit board
JP2004040138A (en) Build up multilayer printed circuit board
JPS59121994A (en) Method of producing printed circuit board
JPS58112392A (en) Method of producing printed circuit board
JPH06188562A (en) Manufacture of printed wiring board
JPS59232488A (en) Method of producing through hole plated circuit board
JPS58218193A (en) Method of producing printed circuit board
JPS6167289A (en) Method of producing printed circuit board
JPH07170078A (en) Manufacture of printed wiring board
JPS6396994A (en) Manufacture of printed wiring board
JPS5846698A (en) Method of producing printed circuit board