JPS58204560A - Semiconductor mounting parts - Google Patents
Semiconductor mounting partsInfo
- Publication number
- JPS58204560A JPS58204560A JP8750382A JP8750382A JPS58204560A JP S58204560 A JPS58204560 A JP S58204560A JP 8750382 A JP8750382 A JP 8750382A JP 8750382 A JP8750382 A JP 8750382A JP S58204560 A JPS58204560 A JP S58204560A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor
- lead
- printed circuit
- hole
- circuit board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/40—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs
- H01L23/4006—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs with bolts or screws
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Abstract
Description
【発明の詳細な説明】
（１１発明の技部分野
本発明は千４俸品品のプリント基板への実装法の改良に
関する。DETAILED DESCRIPTION OF THE INVENTION (11) Technical Field of the Invention The present invention relates to an improvement in a method of mounting a product on a printed circuit board.
（２）技術の背景
工程が率Ａな大型−１８−４体部品のプリント基板への
太装法が賢望されていた０
（，３） 従来技術と間４点
部品実民埃（牛２４体）半田付けすると、プリント基板
が７０−ンルダリングの熱（約２５０℃）で軟化し、ネ
ジ締め付けによるスジスト荷重でネジとの接触部に凹み
が生じ、ネジがゆるみ（約＆５時−１→Ｌ ＯＫｆ−ｃ
ｎｔ ）。(2) Technological background The thick mounting method of large-sized 18-4 parts with rate A on the printed circuit board was highly desired. body) When soldering, the printed circuit board softens due to the heat of 70-degree soldering (approximately 250 degrees Celsius), and the contact area with the screw is dented due to the strain load caused by tightening the screw, causing the screw to loosen (approximately &5 o'clock - 1 → L) OKf-c
nt).
そこでネジを再締め付けしなけれが接触不良が生じるお
それがある。Therefore, unless the screws are retightened, there is a risk of poor contact.
しかしながら、ここで再締め付けをすると、すでに半導
体のリード（エミッターベース）がスルーホールに半田
付けされているため、リード部に歪が発生し、半導体の
特性劣化となる。However, if it is retightened at this point, since the semiconductor lead (emitter base) has already been soldered to the through hole, strain will occur in the lead portion and the characteristics of the semiconductor will deteriorate.
以上のことから、従来の半導体部品のプリント基板の実
長法としてはド記の如き制約を受は作業［数が多くかか
ると云う欠点をイしていた。From the above, the conventional actual length method for printed circuit boards for semiconductor components has the following limitations and has the drawback of requiring a large number of operations.
■ 放熱片と半導体部品については後付は部品として他
の電子回路部品と実装工程を分離しなければならない。■ Heat sinks and semiconductor components must be retrofitted as components and the mounting process must be separated from other electronic circuit components.
［有］ ラグタンシあるいは圧４４子ａｔ−Ｖ用して、
線材（コレクター用）を介してプリント基板のスルーホ
ールに半田付けする心間がある。[Yes] For lug tanshi or pressure 44-piece at-V,
There is a center gap that is soldered to the through hole of the printed circuit board via a wire (for collector).
■ エミッター、ペース用リードとプリント基板のスル
ーホール間を線材で接続する必要がある。■ It is necessary to connect the emitter, pace lead and through-hole of the printed circuit board with a wire.
即ち、第１１．Ａは従来の実装法による断面図である。That is, No. 11. A is a cross-sectional view using a conventional mounting method.
大形の半導体１をボルトナツト３で固定した放熱片２を
間隔前４を介してボルトナツト５でグリメト基板６上に
ネジ化めする。A heat dissipating piece 2 to which a large semiconductor 1 is fixed with bolts and nuts 3 is screwed onto a grimet board 6 with bolts and nuts 5 through a gap 4.
しかる後エミッター、ベースリード７．７′ とプリン
ト基板１のスルーホール間を線材８，８′で接続する。Thereafter, the emitter and base leads 7, 7' and the through holes of the printed circuit board 1 are connected using wires 8, 8'.
またコレクターをラグ端子あるいは圧着端子９を便用し
て線材１０を介してプリント基板１のスルーホールに半
田付けしたものでおる。Further, the collector is soldered to a through hole of the printed circuit board 1 via a wire 10 using a lug terminal or a crimp terminal 9.
（４） 発明の目的
放熱片と千４体の組立波、プリント基板へ他の磁子回路
部品と同時に４献した仮、半田ぼけが一度でｏＪｉｒ巨
となる半導体部品の実装法（ｉ−提供するものである。(4) Purpose of the Invention A method for mounting semiconductor components in which a heat dissipation piece, 1,4 assembly waves, and 1,4 assembly waves are applied to a printed circuit board at the same time as other magnetic circuit components. It is something to do.
、・′１・□（５）発明の＋Ｐ４成
４１：発明はリード１子用スルーホールを有するグリ、
／ト仮と、閾陽管をイする放熱片と、？３縁用ジとから
成９、該半導体パッケージが該絶縁用スペーサを介して
該放熱片に固定され、該放熱片を介して該半導体パッケ
ージのリード端子を該プリント基板のリード端子用スル
ーホールに仲人固定した半導体装部品を提供するもので
ある。,・'1・□(5) +P4 formation of the invention 41: The invention is a grille having a through hole for one lead child,
/ Temporary, and a heat dissipation piece that connects the threshold tube? 9, the semiconductor package is fixed to the heat sink via the insulating spacer, and the lead terminal of the semiconductor package is connected to the lead terminal through hole of the printed circuit board via the heat sink. The company provides semiconductor components fixed by a matchmaker.
本′Ａ鋼は間隔前を設けた放熱片に固定したリード端子
金Ｍする半導体パッケージを、該リード端子用スルーホ
ールを設けたプリント基板上に該間隔前を介して載直し
、該半導体パッケージのリード端子をプリント基板のリ
ード端子用スルーホールに仲人位置決め後、半田付固定
することによりなされる。In this 'A steel, a semiconductor package with lead terminal metal M fixed to a heat dissipation piece provided with a gap is remounted on a printed circuit board with a through hole for the lead terminal via the gap. This is done by positioning the lead terminals in the lead terminal through-holes of the printed circuit board and then fixing them by soldering.
（６） 発明の実施例 以ド本発明を図面を参照して評細に説明する。(6) Examples of the invention The present invention will now be described in detail with reference to the drawings.
第２図は本発明の半導体部品のプリント基板への実装丁
＠を示す図でおり、第３図は゛実装後の析ｌｌＡを示す
。FIG. 2 is a diagram showing the process of mounting the semiconductor component of the present invention onto a printed circuit board, and FIG. 3 shows an analysis after mounting.
６はコレクター用スルーホール・パターン１１゜エミッ
タ用スルーホール・パターンｌに、ベース用スルーポー
ル・パターン１３を設けたプリント基板である。Reference numeral 6 designates a printed circuit board in which a through-hole pattern 13 for a base is provided on a through-hole pattern 11 for a collector, a through-hole pattern 1 for an emitter, and a through-hole pattern 13 for a base.
２はネジ穴を設けたスペーサー４′を有する放熱片であ
る。１４は絶縁用のスペーサーである。ネジ５／ 、
り′／ で半導体ｌをスペーサー１４を介して放熱片２
１にネジ化めする。半導体のコレクター用リード９はネ
ジｂ′ で半導体１の固定時に同時に固定される。2 is a heat sink having a spacer 4' provided with a screw hole. 14 is an insulating spacer. Screw 5/,
The semiconductor l is connected to the heat dissipating piece 2 through the spacer 14.
Screw into 1. The semiconductor collector lead 9 is fixed with a screw b' at the same time as the semiconductor 1 is fixed.
上記の如く半４１不１を固定した放熱片２をプリント基
板の所寓立−に位置決めし、第３図の如く。The heat dissipating piece 2 with the half 41 fixed thereon as described above is positioned in the desired position on the printed circuit board, as shown in FIG.
プリント基板のコレクター用スルーホール１１、エミッ
タ用スルーホール１２、ベース用スルーホール１３でコ
レクターリード９、エミッタ用り一ド７、ベース用リー
ドｌ′ を半田付は固定する。The collector lead 9, emitter lead 7, and base lead l' are fixed by soldering through the collector through hole 11, emitter through hole 12, and base through hole 13 of the printed circuit board.
（７） 発明の効果
不発明？こよりド記効米が得られる〇
■ 放熱片と半導体の組立波、プリント基板へ他の磁子
回路部品と同時に倚販した後、半田付けが一度で口Ｔｎ
じとなり、従来方法の欠点がｍ消でさる）
■ 従来方法でのプリン）４板に設ける放熱片固定用ネ
ジ穴が不要となり、パターンの収容区同上が針（する。(7) Effect of invention or non-invention? This way, you can get the most effective results. After assembling the heat dissipation piece and the semiconductor, soldering it to the printed circuit board at the same time as other magnetic circuit parts, soldering is done in one go.
(In the same way, the disadvantages of the conventional method are eliminated) ■ The screw holes for fixing the heat dissipation piece provided on the 4 plates in the conventional method are no longer required, and the pattern accommodation area is the same as the needle (as above).
■ 大杉半導体のストラップ作業は工数が大きく、これ
を鳴止する効果が大きい。■ Osugi Semiconductor's strap work requires a large amount of man-hours, and the effect of stopping this work is great.
［有］ ４鹸が良くなり、さらにパッケージ組立工法の
統一が口■能（ｄ材の長さ弄の調節が必ｌ慶なくなる）
とな＃）特性のバラツギがなくなる。[Yes] 4. Improved performance, and unified package assembly method (adjustment of length of d material is no longer necessary)
#) Variations in characteristics are eliminated.
＃１１図は従来の実装Ｗｒ面図、第２図は本発明の実装
−［程を説明する斜視図、第３図は本発明の実装＠（３
）図でるる。
１：半導体、２：放熱片、４．４’ ： １…隔管、６
：プリノト基板、フ：エミッタ用リード、７′：べ一ス
用リード、９：コレクタ用リード、１３．．３’、１０
：線材、１１：コレクタ用スルーホール・パターン、１
２：エミッタ用スルーホール・パターン。
１ｊ：ベース用スルーホール・パターン、１４、皐１い
第３閉#11 is a conventional mounting Wr side view, Fig. 2 is a perspective view explaining the mounting process of the present invention, and Fig. 3 is a mounting of the present invention @(3
) Diagram. 1: Semiconductor, 2: Heat dissipation piece, 4.4': 1... Separate tube, 6
: Print board, F: Emitter lead, 7': Base lead, 9: Collector lead, 13. ．． 3', 10
: Wire rod, 11: Through-hole pattern for collector, 1
2: Through-hole pattern for emitter. 1j: Through-hole pattern for base, 14, 3rd close
Claims (1)
５隔管を有する放熱片と、絶縁用スペーサと、リード端
子を有する半導体パッケージとから成り、該半導体パッ
ケージが該絶縁用スペーサを介して該放熱片に固定され
、該放熱片を介して該半導体パッケージのリード端子が
該プリント基板のり−ド熾子用スルーホールに挿入固定
されたことを特徴とする半導体装部品。A printed board with through holes for lead terminals, +i
It consists of a heat dissipation piece having a five-part tube, an insulating spacer, and a semiconductor package having lead terminals, the semiconductor package is fixed to the heat dissipation piece via the insulating spacer, and the semiconductor package is fixed to the heat dissipation piece via the insulating spacer, and the semiconductor A semiconductor component characterized in that a lead terminal of a package is inserted and fixed into a through-hole for the printed circuit board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8750382A JPS58204560A (en) | 1982-05-24 | 1982-05-24 | Semiconductor mounting parts |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8750382A JPS58204560A (en) | 1982-05-24 | 1982-05-24 | Semiconductor mounting parts |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS58204560A true JPS58204560A (en) | 1983-11-29 |
Family
ID=13916780
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8750382A Pending JPS58204560A (en) | 1982-05-24 | 1982-05-24 | Semiconductor mounting parts |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58204560A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2006015685A2 (en) * | 2004-08-03 | 2006-02-16 | Infineon Technologies Ag | Component arrangement with an optimized assembly capability |
-
1982
- 1982-05-24 JP JP8750382A patent/JPS58204560A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2006015685A2 (en) * | 2004-08-03 | 2006-02-16 | Infineon Technologies Ag | Component arrangement with an optimized assembly capability |
| WO2006015685A3 (en) * | 2004-08-03 | 2006-06-01 | Infineon Technologies Ag | Component arrangement with an optimized assembly capability |
| US8089768B2 (en) | 2004-08-03 | 2012-01-03 | Infineon Technologies Ag | Component arragement with an optimized assembly capability |
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