JPS58204540A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS58204540A JPS58204540A JP8715082A JP8715082A JPS58204540A JP S58204540 A JPS58204540 A JP S58204540A JP 8715082 A JP8715082 A JP 8715082A JP 8715082 A JP8715082 A JP 8715082A JP S58204540 A JPS58204540 A JP S58204540A
- Authority
- JP
- Japan
- Prior art keywords
- film
- etching
- bsg
- nitric acid
- oxide film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 10
- 238000004519 manufacturing process Methods 0.000 title claims description 5
- 238000005530 etching Methods 0.000 claims abstract description 38
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims abstract description 14
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 claims abstract description 12
- 229910017604 nitric acid Inorganic materials 0.000 claims abstract description 12
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims abstract description 5
- 229910052796 boron Inorganic materials 0.000 claims description 12
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 11
- 238000000034 method Methods 0.000 claims description 11
- 238000009792 diffusion process Methods 0.000 claims description 8
- 239000000758 substrate Substances 0.000 claims description 6
- BPQQTUXANYXVAA-UHFFFAOYSA-N Orthosilicate Chemical compound [O-][Si]([O-])([O-])[O-] BPQQTUXANYXVAA-UHFFFAOYSA-N 0.000 claims description 5
- 239000000203 mixture Substances 0.000 claims description 2
- 239000002253 acid Substances 0.000 claims 1
- -1 boron silicate Chemical class 0.000 claims 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 7
- 229910052681 coesite Inorganic materials 0.000 abstract 3
- 229910052906 cristobalite Inorganic materials 0.000 abstract 3
- 239000000377 silicon dioxide Substances 0.000 abstract 3
- 235000012239 silicon dioxide Nutrition 0.000 abstract 3
- 229910052682 stishovite Inorganic materials 0.000 abstract 3
- 229910052905 tridymite Inorganic materials 0.000 abstract 3
- 229960002050 hydrofluoric acid Drugs 0.000 abstract 2
- 238000002955 isolation Methods 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- QPJSUIGXIBEQAC-UHFFFAOYSA-N n-(2,4-dichloro-5-propan-2-yloxyphenyl)acetamide Chemical compound CC(C)OC1=CC(NC(C)=O)=C(Cl)C=C1Cl QPJSUIGXIBEQAC-UHFFFAOYSA-N 0.000 description 2
- 238000000059 patterning Methods 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 238000001947 vapour-phase growth Methods 0.000 description 2
- DDFHBQSCUXNBSA-UHFFFAOYSA-N 5-(5-carboxythiophen-2-yl)thiophene-2-carboxylic acid Chemical compound S1C(C(=O)O)=CC=C1C1=CC=C(C(O)=O)S1 DDFHBQSCUXNBSA-UHFFFAOYSA-N 0.000 description 1
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- LDDQLRUQCUTJBB-UHFFFAOYSA-N ammonium fluoride Chemical compound [NH4+].[F-] LDDQLRUQCUTJBB-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 235000014121 butter Nutrition 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- RNNBHZYEKNHLKT-UHFFFAOYSA-N isopropylmethylpyrazolyl dimethylcarbamate Chemical compound CC(C)N1N=C(C)C=C1OC(=O)N(C)C RNNBHZYEKNHLKT-UHFFFAOYSA-N 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 229910000077 silane Inorganic materials 0.000 description 1
- 239000005368 silicate glass Substances 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 239000012808 vapor phase Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Weting (AREA)
Abstract
Description
【発明の詳細な説明】 この発明は、半導体装置の製法に関するものである。[Detailed description of the invention] The present invention relates to a method for manufacturing a semiconductor device.
半導体装置、例えばバイポーラ集積回路は、っぎのよう
にして製造されている。すなわち、第１図に示すような
、内部にＮ形埋込層ｌを有し、表面にＮ形エピタキシャ
ル層２が形成されたＰ形シリコン基板３を酸化雰囲気中
にさらし、第２図に示すようにＮ形エピタキシャル層２
の上にシ＋）コン酸化膜４を成長させる。酸化膜４の厚
みは、約８０００人である。つぎに、フォトレジストカ
ロエを施し、第３図に示すように酸化膜４によるアイソ
レーションパターン５を形成する。ついで、上記パター
ン５の上にホウ素シリケートガラス（ＢＳＧ）を低温気
相成長させて第４図に示すようにＢＳＧ膜（約１０００
０人）７を形成し、アイソレーションパターン５の開孔
６からＢＳＧ膜７中のホウ素をＮ形エピタキシャル層２
内に熱拡散させ（プレデポジンコン）Ｐ膨拡散層８を形
成する。つぎに、エツチング液を用いてＢＳＧ膜７を除
去し、さらに第５図に示すようにエピタキシャル層２中
にボロン拡散を行い（ドライブイン）、Ｎ形エビタキン
ヤル層２をＰ膨拡散層８で分離しアイル−ジョン領域を
形成する。これ以降は、ベース・バターニンク（開孔）
→第２低温気相成長およびベース拡散→エミッタ・バタ
ーニング→第３低温気相成長およびエミッタ拡散→コン
タクト・パターニング→配線パターニング−シランコー
ト等の工程を経ることによ秒、バイポーラ集積回路が得
られる。Semiconductor devices, such as bipolar integrated circuits, are manufactured in the following manner. That is, a P-type silicon substrate 3 having an N-type buried layer l inside and an N-type epitaxial layer 2 formed on the surface as shown in FIG. 1 is exposed to an oxidizing atmosphere, N type epitaxial layer 2
A silicon oxide film 4 is grown thereon. The thickness of the oxide film 4 is about 8,000. Next, a photoresist coating is applied to form an isolation pattern 5 of an oxide film 4 as shown in FIG. Next, boron silicate glass (BSG) is grown in a low-temperature vapor phase on the pattern 5 to form a BSG film (approximately 1,000
0) 7, and transfer boron in the BSG film 7 from the opening 6 of the isolation pattern 5 to the N-type epitaxial layer 2.
The P expansion diffusion layer 8 is formed by thermally diffusing (pre-depositing) into the P. Next, the BSG film 7 is removed using an etching solution, and boron is further diffused into the epitaxial layer 2 (drive-in) as shown in FIG. and form an illusion area. From this point on, base butter ninja (open hole)
→ Second low temperature vapor phase growth and base diffusion → Emitter butterning → Third low temperature vapor phase growth and emitter diffusion → Contact patterning → Wiring patterning - A bipolar integrated circuit can be obtained in seconds by going through processes such as silane coating. It will be done.
ところで、このようにする場合、ＢＳＧＳｒＯ２去は上
記のようにエツチング液（ＢＨＦ （（バッファエッチ
））液、ＮＩ（４Ｆ ： ＨＦ＝５ ： １ ）を用い
て行われているが、このＢＨＦ液の、ＢＳＧＳｒＯ２よ
びＢＳＧＳｒＯ２の酸化膜４に対するエツチングレート
は、それぞれ５００人／分、 ｔｏｏｏ入／分（ＢＳＧ
膜１１００°Ｃで熱処理したとき）であり、ＢＳＧ＠７
のエツチングレートよりも酸化膜４のエツチングレート
の方が犬である。他方、気相成長（ＣＶＤ ）法により
形成されたＢＳＧＳｒＯ２ウェハ内において膜厚１００
００人に対してｔｏｏｏ人程度のばらつきが生じる。し
たがって、ＢＳＧＳｒＯ２みが、薄かった部分では、他
の部分でＢＳＧＳｒＯ２ま走残っている状態のときに、
すでに酸化膜４が現われているため、この酸化膜４のエ
ツチングが始まる。そして、この酸化膜４のエツチング
レートがＢＳＧＳｒＯ２ツチングレートよりもかなり高
いため、他の部分のＢＳＧＳｒＯ２全に除去される前に
酸化膜４が侵されパターンが壊される。そのため、次工
程のマスク合わせができなくなっていた。このように、
これまでは、ＢＳＧＳｒＯ２ツチング除去を満足しつる
ように行うことが困難であり、エツチング除去の制御に
非常に神経をつかっていた。By the way, when doing this, BSGSrO2 is removed using an etching solution (BHF ((buffer etch)) solution, NI (4F:HF=5:1) as described above, but this BHF solution The etching rates for the oxide film 4 of BSGSrO2 and BSGSrO2 are 500 people/min and too much etching/min (BSG
), and BSG@7
The etching rate of the oxide film 4 is higher than the etching rate of the oxide film 4. On the other hand, in a BSGSrO2 wafer formed by a chemical vapor deposition (CVD) method, the film thickness is 100 mm.
There is a variation of about too many people compared to 00 people. Therefore, when BSGSrO2 is thin in some areas and BSGSrO2 remains in other areas,
Since the oxide film 4 has already appeared, etching of this oxide film 4 begins. Since the etching rate of this oxide film 4 is much higher than the BSGSrO2 etching rate, the oxide film 4 is attacked and the pattern is destroyed before the BSGSrO2 in other parts is completely removed. This made it impossible to match the masks in the next process. in this way,
Until now, it has been difficult to perform BSGSrO2 etching removal satisfactorily, and much attention has been paid to controlling the etching removal.
この発明者は、なんとかこのような問題を解決しえない
かと研究に研究を重ねた結果、Ｂ Ｓ Ｇ 、Ｉ［のエ
ツチング液として、フッ酸を含むとともに、硝酸を含む
ものを用いると所期の目的を達成しつることを見いだし
この発明を完成した。As a result of repeated research to find a way to solve this problem, the inventor found that using an etching solution containing both hydrofluoric acid and nitric acid as an etching solution for BSG, I [. He discovered that this purpose could be achieved and completed this invention.
すなわち、この発明は、酸化膜パターンの上にホウ素シ
リケート膜が形成されている半導体基板を準備する工程
と、このホウ素シリケート膜のホウ素を半導体基板内に
熱拡散する工程と、熱拡散□１
後ホウ素シリケート膜をエツチング液で除去する工程を
含む半導体装置の製法であって、エツチング液として、
フン６東を含むとともに、硝酸を含むものを用いること
をその特徴とするものである。That is, the present invention includes a step of preparing a semiconductor substrate on which a boron silicate film is formed on an oxide film pattern, a step of thermally diffusing boron in the boron silicate film into the semiconductor substrate, and a step of thermally diffusing boron after thermal diffusion □1. A method for manufacturing a semiconductor device including a step of removing a boron silicate film with an etching solution, the method comprising:
It is characterized by containing Hun 6 East and using a substance containing nitric acid.
つきに、この発明を実施例にもとづいて詳しく説明する
。The present invention will now be described in detail based on examples.
〔実施例１〕
Ｂ５Ｇｄのエツチング液として、水（Ｂ２０ ）と硝酸
（ＨＮＯ８）とフッ酸（ｆ（Ｆ ）とを、水；硝酸；フ
ッ酸＝４ ： ｔ ： ｔの割合で混合したものを準備
した。このエツチング液は、室温２２°Ｃ１湿度４５壬
におけるＢＳＧ 嘆のエツチングレートが２２０（１％
で、酸化膜のエツチングレートが７５０人／分であり、
これまでのものとは異なり、ＢＳＧ嘆に対するエツチン
グレートの方が酸化膜に対するそれよりもはるかに高い
ものであった。このエツチング液を用い、第４図のよう
に形成されたＢＳＧ＠７をエツチング除去した。この場
合、エツチング液のエツチングレートが、酸化膜４に対
するよりもＢＳＧＳｒＯ２する方がはるかに高いため、
ＢＳＧ模７の選択エツチングが可能になり、酸化膜４の
パターンを殆ど損傷させることな（、ＢＳＧＳｒＯ２去
でさた。[Example 1] As an etching solution for B5Gd, a mixture of water (B20), nitric acid (HNO8), and hydrofluoric acid (f(F)) in a ratio of water: nitric acid; hydrofluoric acid = 4:t:t was used. This etching solution had an etching rate of 220 (1%) at a room temperature of 22°C and a humidity of 45°C.
The etching rate of the oxide film is 750 people/min.
Unlike the previous ones, the etching rate for BSG film was much higher than that for oxide film. Using this etching solution, BSG@7 formed as shown in FIG. 4 was removed by etching. In this case, since the etching rate of the etching solution is much higher for BSGSrO2 than for the oxide film 4,
Selective etching of the BSG pattern 7 is now possible, with almost no damage to the pattern of the oxide film 4 (by removing the BSGSrO2).
なお、これ以降の工程は、冒頭の従来例と同様の工程で
行った。Note that the subsequent steps were performed in the same manner as in the prior art example mentioned above.
〔実施例２〕
エツチングレトシて、フッ化アンモニウム（ＮＨ４Ｆ
）と硝酸（ＨＮＯ３）とフッ酸（ＨＦ）とを、重量基準
で、３：２：１の割合で混合したものを用いた。このよ
うに、エツチング液中の硝酸の使用割合が多くなる程、
Ｂ５Ｇｄに対するエツチングレートが高くなる。このエ
ツチング液のＢＳＧ［に対するエツチングレートは、９
０００人／分であった。[Example 2] Ammonium fluoride (NH4F
), nitric acid (HNO3), and hydrofluoric acid (HF) in a ratio of 3:2:1 on a weight basis. In this way, the higher the proportion of nitric acid used in the etching solution, the more
The etching rate for B5Gd increases. The etching rate of this etching solution for BSG is 9
000 people/minute.
それ以外は実施例１と同様にして優れた効果を得だ。Other than that, excellent effects were obtained in the same manner as in Example 1.
この発明は、上記のようなエツチング液を用いるため、
選択エツチング（ＢＳＧ模のみをエツチングする）が可
能となる。その結果、ＢＳＧ膜形成時のウニ・・内ばら
つきに影響されずにＢＳＧ膜のみをエツチングし、酸化
膜のパターンをそのまま残すことができるのである。ま
た、このエツチング液を、ベース拡散（バイポーラＩＣ
）、ソース−ドレイン拡散におけるＢ Ｓ Ｇ 膜の除
去に応用することにより、多くの効果が得られるように
なる。Since this invention uses the etching solution as described above,
Selective etching (etching only the BSG pattern) becomes possible. As a result, it is possible to etch only the BSG film and leave the oxide film pattern intact without being affected by internal variations during the formation of the BSG film. In addition, this etching solution was applied to base diffusion (bipolar IC
), many effects can be obtained by applying it to the removal of the BSG film in source-drain diffusion.
第１図ないし第５図は、ＢＳＧ模を用いたアイソレーシ
ョン領域形成工程説明図である。
■・・・Ｎｔ２埋込鳴 ２・・・Ｎ形エピタキシャル層
３・・・Ｐ形ンリコン基板 ４・・・酸化膜 ５・−・
アイソレーンコンパターン ６・・・アイル−ジョンパ
ターンの開孔 ７・・・ＢＳＧ膜 ８・・・Ｐ＋形拡散
層特許出願人 松十畢工株式会社
代理人 弁理士 松 本 武 彦第２１＜
第５Ｆ！！ＪFIGS. 1 to 5 are explanatory diagrams of isolation region forming steps using a BSG model. ■...Nt2 embedded sound 2...N type epitaxial layer 3...P type silicon substrate 4...Oxide film 5...
Isolane con pattern 6...Aisle John pattern opening 7...BSG film 8...P+ type diffusion layer Patent applicant Matsujubiko Co., Ltd. Agent Patent attorney Takehiko Matsumoto 21st < 5F! ! J
Claims (2)
されている半導体基板を準備する工程と、このホウ素シ
リケート膜のホウ素を半導体基板内に熱拡散する工程と
、熱拡散後ホウ素シリケート膜をエツチング液で除去す
る工程を含む半導体装置の製法であって、エツチング液
として、フンＩｆＬを含むとともに、硝酸を含むものを
用いることを特徴とする半導体装置の製法。(1) A process of preparing a semiconductor substrate on which boron silicate g is formed on an oxide film pattern, a process of thermally diffusing boron in this boron silicate film into the semiconductor substrate, and etching the boron silicate film after thermal diffusion. 1. A method for manufacturing a semiconductor device including a step of removing with an etching solution, the method comprising using an etching solution that contains Hung IfL and nitric acid.
基準で、水：硝酸二フッ酸＝４＋ｌ：１の割合で混合し
たものである特許請求の範囲第１項記載の半導体装置の
製法。(2) The method for manufacturing a semiconductor device according to claim 1, wherein the etching solution is a mixture of water, nitric acid, and hydrofluoric acid in a ratio of water: nitric acid difluoric acid = 4 + l: 1 on a weight basis. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8715082A JPS58204540A (en) | 1982-05-22 | 1982-05-22 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8715082A JPS58204540A (en) | 1982-05-22 | 1982-05-22 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS58204540A true JPS58204540A (en) | 1983-11-29 |
Family
ID=13906945
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8715082A Pending JPS58204540A (en) | 1982-05-22 | 1982-05-22 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58204540A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0740339A2 (en) * | 1995-04-27 | 1996-10-30 | Nec Corporation | Method of forming a capacitor electrode of a semiconductor memory device |
| US6066267A (en) * | 1997-09-18 | 2000-05-23 | International Business Machines Corporation | Etching of silicon nitride |
| WO2000031786A1 (en) * | 1998-11-24 | 2000-06-02 | Daikin Industries, Ltd. | Etching solution, etched article and method for etched article |
| WO2000031785A1 (en) * | 1998-11-24 | 2000-06-02 | Daikin Industries, Ltd. | Etching solution, etched article and method for etched article |
| US6150282A (en) * | 1997-11-13 | 2000-11-21 | International Business Machines Corporation | Selective removal of etching residues |
| US6254796B1 (en) * | 1997-06-25 | 2001-07-03 | International Business Machines Corporation | Selective etching of silicate |
-
1982
- 1982-05-22 JP JP8715082A patent/JPS58204540A/en active Pending
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0740339A2 (en) * | 1995-04-27 | 1996-10-30 | Nec Corporation | Method of forming a capacitor electrode of a semiconductor memory device |
| EP0740339A3 (en) * | 1995-04-27 | 1998-07-29 | Nec Corporation | Method of forming a capacitor electrode of a semiconductor memory device |
| US6300186B1 (en) | 1995-04-27 | 2001-10-09 | Nec Corporation | Method of measuring semiconductor device |
| US6254796B1 (en) * | 1997-06-25 | 2001-07-03 | International Business Machines Corporation | Selective etching of silicate |
| US6066267A (en) * | 1997-09-18 | 2000-05-23 | International Business Machines Corporation | Etching of silicon nitride |
| US6150282A (en) * | 1997-11-13 | 2000-11-21 | International Business Machines Corporation | Selective removal of etching residues |
| WO2000031786A1 (en) * | 1998-11-24 | 2000-06-02 | Daikin Industries, Ltd. | Etching solution, etched article and method for etched article |
| WO2000031785A1 (en) * | 1998-11-24 | 2000-06-02 | Daikin Industries, Ltd. | Etching solution, etched article and method for etched article |
| KR100467741B1 (en) * | 1998-11-24 | 2005-01-24 | 다이킨 고교 가부시키가이샤 | Etching solution, etched article and method for etched article |
| US7052627B1 (en) | 1998-11-24 | 2006-05-30 | Daikin Industries, Ltd. | Etching solution, etched article and method for etched article |
| US7404910B1 (en) | 1998-11-24 | 2008-07-29 | Daikin Industries, Ltd. | Etching solution, etched article and method for etched article |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS58204540A (en) | Manufacture of semiconductor device | |
| US3751314A (en) | Silicon semiconductor device processing | |
| US3537921A (en) | Selective hydrofluoric acid etching and subsequent processing | |
| US4125427A (en) | Method of processing a semiconductor | |
| US4752505A (en) | Pre-metal deposition cleaning for bipolar semiconductors | |
| JPS59232437A (en) | Manufacture of semiconductor device | |
| JPS5823931B2 (en) | How to use a hand hacking tool | |
| JPS621232A (en) | Flattening method for insulating film | |
| US5747357A (en) | Modified poly-buffered isolation | |
| JPS5912020B2 (en) | Manufacturing method of semiconductor device | |
| JPS60175417A (en) | Manufacture of semiconductor device | |
| JPH0122731B2 (en) | ||
| JPH09148301A (en) | Manufacture of semiconductor device, and etchant | |
| JPS61166127A (en) | Manufacture of semiconductor device | |
| JPS63228732A (en) | Manufacture of semiconductor device | |
| JPS5963741A (en) | Manufacture of semiconductor device | |
| JPS5931215B2 (en) | How to form an insulating layer | |
| JPH07235591A (en) | Manufacture of semiconductor device | |
| JPS5939042A (en) | Manufacture of semiconductor device | |
| JPH0482222A (en) | Semiconductor device and manufacture thereof | |
| JPS5994842A (en) | Manufacture of semiconductor device | |
| JPS61112331A (en) | Manufacture of semiconductor device | |
| JPH01232737A (en) | Manufacture of semiconductor element | |
| JPH01297822A (en) | Manufacture of semiconductor device | |
| JPS6367736A (en) | Manufacture of semiconductor substrate |