JPS58200525A - Preparation of substrate for semiconductor device - Google Patents
Preparation of substrate for semiconductor deviceInfo
- Publication number
- JPS58200525A JPS58200525A JP8347882A JP8347882A JPS58200525A JP S58200525 A JPS58200525 A JP S58200525A JP 8347882 A JP8347882 A JP 8347882A JP 8347882 A JP8347882 A JP 8347882A JP S58200525 A JPS58200525 A JP S58200525A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- film
- single crystal
- silicon
- insulating
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 124
- 239000004065 semiconductor Substances 0.000 title claims abstract description 31
- 238000002360 preparation method Methods 0.000 title description 2
- 239000013078 crystal Substances 0.000 claims abstract description 63
- 239000010410 layer Substances 0.000 claims abstract description 34
- 239000012790 adhesive layer Substances 0.000 claims abstract description 16
- 238000004519 manufacturing process Methods 0.000 claims 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 53
- 229910052710 silicon Inorganic materials 0.000 abstract description 47
- 239000010703 silicon Substances 0.000 abstract description 47
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 46
- 229910021421 monocrystalline silicon Inorganic materials 0.000 abstract description 33
- 238000000034 method Methods 0.000 abstract description 30
- 239000012535 impurity Substances 0.000 abstract description 18
- 235000012239 silicon dioxide Nutrition 0.000 abstract description 14
- 239000000377 silicon dioxide Substances 0.000 abstract description 14
- 238000005229 chemical vapour deposition Methods 0.000 abstract description 12
- 239000012212 insulator Substances 0.000 abstract description 10
- 239000002952 polymeric resin Substances 0.000 abstract description 6
- 229920003002 synthetic resin Polymers 0.000 abstract description 6
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 abstract description 4
- 229910052796 boron Inorganic materials 0.000 abstract description 3
- 239000011347 resin Substances 0.000 abstract description 2
- 229920005989 resin Polymers 0.000 abstract description 2
- 229910052732 germanium Inorganic materials 0.000 description 34
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 34
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 19
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 18
- 238000005530 etching Methods 0.000 description 13
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 9
- 229920001721 polyimide Polymers 0.000 description 6
- 238000000137 annealing Methods 0.000 description 5
- 230000007547 defect Effects 0.000 description 5
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 4
- 239000004642 Polyimide Substances 0.000 description 4
- 229910021417 amorphous silicon Inorganic materials 0.000 description 4
- 229910021419 crystalline silicon Inorganic materials 0.000 description 4
- 238000000151 deposition Methods 0.000 description 4
- 239000011521 glass Substances 0.000 description 4
- 238000005498 polishing Methods 0.000 description 4
- QTBSBXVTEAMEQO-UHFFFAOYSA-N Acetic acid Chemical compound CC(O)=O QTBSBXVTEAMEQO-UHFFFAOYSA-N 0.000 description 3
- 241001092070 Eriobotrya Species 0.000 description 3
- 235000009008 Eriobotrya japonica Nutrition 0.000 description 3
- KWYUFKZDYYNOTN-UHFFFAOYSA-M Potassium hydroxide Chemical compound [OH-].[K+] KWYUFKZDYYNOTN-UHFFFAOYSA-M 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 239000011651 chromium Substances 0.000 description 3
- 238000009792 diffusion process Methods 0.000 description 3
- 239000005355 lead glass Substances 0.000 description 3
- 229920000642 polymer Polymers 0.000 description 3
- 239000000243 solution Substances 0.000 description 3
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 2
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 229910052799 carbon Inorganic materials 0.000 description 2
- 239000000919 ceramic Substances 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 238000009826 distribution Methods 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000011259 mixed solution Substances 0.000 description 2
- 229910017604 nitric acid Inorganic materials 0.000 description 2
- 239000009719 polyimide resin Substances 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 238000005979 thermal decomposition reaction Methods 0.000 description 2
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- 229910000673 Indium arsenide Inorganic materials 0.000 description 1
- 239000007864 aqueous solution Substances 0.000 description 1
- RBFQJDQYXXHULB-UHFFFAOYSA-N arsane Chemical compound [AsH3] RBFQJDQYXXHULB-UHFFFAOYSA-N 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- AJNVQOSZGJRYEI-UHFFFAOYSA-N digallium;oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[Ga+3].[Ga+3] AJNVQOSZGJRYEI-UHFFFAOYSA-N 0.000 description 1
- 238000000407 epitaxy Methods 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 229910001195 gallium oxide Inorganic materials 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 235000012907 honey Nutrition 0.000 description 1
- RPQDHPTXJYYUPQ-UHFFFAOYSA-N indium arsenide Chemical compound [In]#[As] RPQDHPTXJYYUPQ-UHFFFAOYSA-N 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 235000012149 noodles Nutrition 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 229920001296 polysiloxane Polymers 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- XCZXGTMEAKBVPV-UHFFFAOYSA-N trimethylgallium Chemical compound C[Ga](C)C XCZXGTMEAKBVPV-UHFFFAOYSA-N 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
- 238000001947 vapour-phase growth Methods 0.000 description 1
- 239000000052 vinegar Substances 0.000 description 1
- 235000021419 vinegar Nutrition 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
- H01L21/2003—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
- H01L21/2007—Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Recrystallisation Techniques (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は少くとも表面に非晶買杷縁体が形成された基板
上に単結晶半導体膜を形成する方法に関するものである
。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for forming a single-crystal semiconductor film on a substrate having at least an amorphous substrate formed on the surface thereof.
絶縁体止に単結晶半導体膜を形成する仮術は、LSIの
高速化、三次元化等の威点から注目されておシ、種々の
形成法が試みられている。例えばプリッヂングエピタキ
シーのように単結晶シリコン基板上に二酸化シリコン等
のfP3縁膜を形成し、その一部を開口してシリコンの
単結晶面を露出しておき、このような基板上に非晶質又
は多釉晶シリコン膜を堆積し、レーザ等のビームアニー
ルあるいは棒状のヒーターによるアニールを施して、該
シリコン膜を浴融し、絶線膜のない禎域でエピタキシャ
ル成長させて単結晶シリコン膜となった部分を株子にし
て杷縁農上に単結晶シリコン膜を成長させることかでき
る。The tentative technique of forming a single crystal semiconductor film on an insulator is attracting attention because of its advantages in increasing the speed of LSI and making it three-dimensional, and various forming methods have been attempted. For example, an fP3 film such as silicon dioxide is formed on a single-crystal silicon substrate using pridging epitaxy, and a part of the fP3 film is opened to expose the silicon single-crystal surface. A single-crystalline silicon film is formed by depositing a crystalline or polyglazed crystalline silicon film, performing beam annealing such as a laser, or annealing using a rod-shaped heater, bath-melting the silicon film, and growing it epitaxially in an unconducted area where there is no continuous film. The resulting part can be used as a stock to grow a single crystal silicon film on the loquat.
又、グラフオエピタキシーと呼はれるような形成法も用
いられる。この方法は、し1」えは石英ガラス基板表面
に1μm程度の大きさの微細な溝加工を施しておき、こ
の上に非晶質シリコン膜を堆積シ、レーザビームアニー
ル又はカーボンヒーター゛によシ非晶質シリコン膜を単
結晶シリコン膜に変換する方法である。この方法では、
石英ガラス基板表曲に形成した溝により結晶方位を制御
するもので、極子がなくても結晶方位をそろえることが
可能となる。これらの形成法はビームアニールあるいは
カーボンヒーター等によるアニールにより非晶質又は多
結晶シリコン膜を単結晶シリコン膜に変換するという方
法をとるものである。この方法では数μm〜数十μmの
大きさの単結晶シリコンを得るのは容易であるか、数n
あるいは数十Mmlのオーダーの大面積の単結晶シリコ
ンを得るのは容易でない。A formation method called graphoepitaxy is also used. In this method, first, a fine groove of about 1 μm in size is formed on the surface of a quartz glass substrate, an amorphous silicon film is deposited on this, and then an amorphous silicon film is deposited using laser beam annealing or a carbon heater. This is a method of converting an amorphous silicon film into a single crystal silicon film. in this way,
The crystal orientation is controlled by grooves formed on the curved surface of the quartz glass substrate, making it possible to align the crystal orientation even without poles. These formation methods involve converting an amorphous or polycrystalline silicon film into a single crystal silicon film by beam annealing or annealing using a carbon heater or the like. With this method, it is easy to obtain single crystal silicon with a size of several μm to several tens of μm, or several nanometers.
Alternatively, it is not easy to obtain single crystal silicon with a large area on the order of several tens of Mml.
大面積の単結晶シリコン膜を絶縁体上に形成する試みと
しては、P+層を有する単結晶シリコン基板上にP−あ
るいはN−のシリコン膜をエピタキシャル成長させた後
、そのシリコン膜上に絶縁膜を形成し、さらにその上に
支持基板用の厚さ数百Amの多結晶シリコンを堆積し、
そして単結晶シリコン基板を除去することにより多結晶
シリコン基板上に絶縁1漠を介して単結晶シリコン膜を
形成する方法が知られているC Greg L、 Ku
hn andC,John Rhee+ J□urna
l of Electroehemical 5oci
etyUol 120(1973)PP、1563〜1
566− 〕。しかしながらこの方法では、数百μmの
厚さのpoly −8i を堆積する際、単結晶シリ
コン基板が長時間高温にさらされる。このためP 層か
らエピタキシャル膜へのボロン(Blの拡散が生じ、エ
ピタキシ岑ル膜と単結晶シリコン基板界面の不純物分布
の急峻性が損われ、単結晶シリコン基板を除去する工程
でエピタキシャルシリコン膜を均一に残すことがむずか
しいという欠点がある。又、多結晶シリコン膜上時に、
エピタキシャルシリコン膜側への多結晶シリコンのまわ
りこみゃ、多結晶シリコン膜の厚さむらが生じ、このだ
め単結晶ノリコン基板を均一に除去することがむずかし
く、従って残スべきエピタキシャルシリコン膜厚の均一
・註も劣化するという欠点もめる。In an attempt to form a large-area single-crystal silicon film on an insulator, a P- or N- silicon film is epitaxially grown on a single-crystal silicon substrate having a P+ layer, and then an insulating film is formed on the silicon film. and then depositing polycrystalline silicon with a thickness of several hundred am for a support substrate on top of it.
A known method is to form a single crystal silicon film on a polycrystalline silicon substrate through an insulating layer by removing the single crystal silicon substrate.
hn and C, John Rhee+ J□urna
l of Electrochemical 5oci
etyUol 120 (1973) PP, 1563-1
566-]. However, in this method, a single crystal silicon substrate is exposed to high temperature for a long time when poly-8i is deposited to a thickness of several hundred μm. As a result, diffusion of boron (Bl) from the P layer to the epitaxial film occurs, which impairs the steepness of the impurity distribution at the interface between the epitaxial film and the single crystal silicon substrate. It has the disadvantage that it is difficult to leave it uniformly.Also, when it is on a polycrystalline silicon film,
If the polycrystalline silicon is wrapped around the epitaxial silicon film side, the thickness of the polycrystalline silicon film becomes uneven, and it is difficult to uniformly remove the single-crystalline silicon substrate. The drawback is that the notes also deteriorate.
またゲルマニウムについては、表面に単結晶ゲルマニウ
ム膜が形成された非晶質基板は、格子定数のマツチング
の良さからガリウム砒素(GaAs)等の電−V化合物
半導体層を形成するだめの基板として、あるいは非晶質
基板として絶縁体基板を選ぶことによシ単結晶ゲルマニ
ウムの電子移動度がシリコンの場合に比べて大きいこと
から高速のMOSFET などへの応用が可能とな9有
用である。Regarding germanium, an amorphous substrate with a single-crystal germanium film formed on the surface is used as a substrate for forming an electric-V compound semiconductor layer such as gallium arsenide (GaAs) because of its good lattice constant matching, or By selecting an insulating substrate as the amorphous substrate, single-crystal germanium has a higher electron mobility than silicon, which is useful because it can be applied to high-speed MOSFETs, etc.9.
このような非晶質基板上に単結晶ゲルマニウム膜を形成
する方法として例えば石英ガラス上に非晶質ゲルマニウ
ム膜を堆積しておき、レーザビームでアニールすること
によりグレインサイズの大きな単結晶粒の集合体を得る
方法がある〔ジミン・シー・シー・ファン等アプライド
フィジックスレターズ、1980年、36巻、158
ペ一ジ丁。As a method for forming a single crystal germanium film on such an amorphous substrate, for example, an amorphous germanium film is deposited on quartz glass and then annealed with a laser beam to aggregate single crystal grains with a large grain size. There is a way to get a body [Jimin Shih Shi Huang et al. Applied Physics Letters, 1980, vol. 36, 158
One page.
しかしながら、このような方法で得られたゲルマニウム
膜は、通常の引上法等で得られた単結晶ゲルマニウムに
比べると、結晶粒の大きさ、方位配列等の結晶性の点で
劣る。又、このようなゲルマニウム膜の上に成長させた
ガリウム砒素膜は、やはり結晶性が悪く、例えば太陽電
池等への応用を考えた場合、効率は単結晶ガリウム砒素
に比べて劣る。However, the germanium film obtained by such a method is inferior to single crystal germanium obtained by a normal pulling method in terms of crystallinity such as crystal grain size and orientation arrangement. Further, the gallium arsenide film grown on such a germanium film also has poor crystallinity, and when considering application to, for example, solar cells, the efficiency is inferior to that of single crystal gallium arsenide.
寸だガリウム砒素はシリコンに比べて結晶中における電
子移動度が太きいため、高速動作が可1ヒな電界効果ト
ランジスタ(FET)等への利用がなされている。この
場合、活性層としてガリウム砒素エピタキシャル膜が用
いられるが、その基板としては、高抵抗ガリウム砒素単
結晶基板が一般に用いられる。この高抵抗ガリウム砒素
単結晶基板は、成長時に′クロム(Cr)をドープする
ことによシ得られる。しかしながら、Crの不純物量の
制御あるいはその分布の均−化等の面で結晶育成が容易
でなく、良質かつ大口径の高抵抗ガリウム砒素単結晶を
安価に得るのは難しい。Since gallium arsenide has higher electron mobility in crystals than silicon, it is used in field effect transistors (FETs) that can operate at high speeds. In this case, a gallium arsenide epitaxial film is used as the active layer, and a high resistance gallium arsenide single crystal substrate is generally used as the substrate. This high-resistance gallium arsenide single crystal substrate is obtained by doping with chromium (Cr) during growth. However, crystal growth is not easy in terms of controlling the amount of Cr impurities or making the distribution uniform, and it is difficult to obtain high-quality, large-diameter, high-resistance gallium arsenide single crystals at low cost.
不発明は以上述べた従来の形成方法とは全く異なる、数
十鰭以上の寸法の、大面積でかつ均一な膜厚を有し、し
かも結晶欠陥が少ない高晶質の単結晶半導体膜を非晶質
絶縁体層上に形成する方法を提供するものである。The invention is completely different from the conventional formation method described above.It is a non-invention method to create a highly crystalline single crystal semiconductor film with a size of several tens of fins or more, a large area, a uniform film thickness, and few crystal defects. A method for forming a crystalline insulator layer on a crystalline insulator layer is provided.
本発明によれば表面に、少なくとも半導体単結晶エピタ
キシャル膜及び該エピタキシャル膜上に絶縁膜を備えた
単結晶半導体基板と、少くとも片側に非晶質絶縁体層を
備えた基板とを、該基板の非晶質絶縁体層と前記単結晶
半導体基板の前記エピタキシャル膜上の絶縁線との間に
接着層を設けて固着した後、前記単結晶半導体基板を研
摩及びエツチングによジ除去する仁とにより、前記少く
とも表面に非晶質絶縁体層を儂えた基板上に前記半導体
単結晶エピタキシャル膜を形成することを特徴とする半
導体装置用基板の襄遣方法が得られる。According to the present invention, a single crystal semiconductor substrate having at least a semiconductor single crystal epitaxial film and an insulating film on the epitaxial film on its surface, and a substrate having an amorphous insulating layer on at least one side of the substrate are provided. After providing an adhesive layer between the amorphous insulating layer and the insulating wire on the epitaxial film of the single crystal semiconductor substrate and fixing it, removing the scratches by polishing and etching the single crystal semiconductor substrate. Accordingly, there is obtained a method for handling a substrate for a semiconductor device, characterized in that the semiconductor single crystal epitaxial film is formed on the substrate having an amorphous insulating layer formed on at least the surface thereof.
不発明の特徴は、要するに、半導体単結晶基板上に半導
体エピタキシャル族を形成し、この膜を接着層を介して
、少くとも表面に非晶質絶縁体層を有する基板上に移し
かえる点である。The feature of the invention is, in short, that a semiconductor epitaxial group is formed on a semiconductor single crystal substrate, and this film is transferred via an adhesive layer onto a substrate having an amorphous insulating layer on at least the surface. .
この方法は、エピタキシャル法によプ成長させた単結晶
半導体膜を用いているため、結晶欠陥が少なく、高品質
であり、しかも大面積の単結晶半導体膜を+Ie縁体上
に形成できる。又、この方法は種子を用いていないため
、r=q、)xの三次元化を行なう際に、ブリッジング
エピタキシーの場合のように常に柚子を残しておくとい
う制限がなく、全面が非晶質絶縁体であってもその上に
容易に大面積でかつ高品質の単結晶半導体膜を積層する
ことができるという利点を有する。Since this method uses a single crystal semiconductor film grown by epitaxial method, it is possible to form a high quality single crystal semiconductor film with few crystal defects and a large area on the +Ie edge body. In addition, since this method does not use seeds, when converting r = q, It has the advantage that even if it is a quality insulator, a large-area, high-quality single-crystal semiconductor film can be easily laminated thereon.
以下実施例を用いて本発明の詳細な説明する。The present invention will be described in detail below using Examples.
第1の実施例はシリコンエピタキンヤル膜を接着層を介
して絶縁性基板上に形成するものである。In the first embodiment, a silicon epitaxial film is formed on an insulating substrate via an adhesive layer.
第1図はそのだめの準備として、高濃度不純′#I層上
にシリコン膜をエビ成長させ、更にその上にSin、膜
を形成したシリコン単結晶基板の断面略図である。まず
数Ω1以上の抵抗率を有する厚さ300μppsg度の
単結晶シリコン!lilの表面に102o1固/−程度
のボロンの)を有する高濃度不純物層2を例えば熱拡散
処理によシ形成する。次に減圧下で、低不純物濃度を有
する農厚3μm程度の単結晶シリコン膜3をエピタキシ
ャル成長させる。FIG. 1 is a schematic cross-sectional view of a silicon single crystal substrate on which a silicon film was grown on a high concentration impurity #I layer as a preliminary preparation, and a Si film was further formed thereon. First of all, single crystal silicon with a thickness of 300μppsg and has a resistivity of several Ω1 or more! A high-concentration impurity layer 2 having boron (of the order of 102 o1 hard/-) is formed on the surface of the lil by, for example, thermal diffusion treatment. Next, a single crystal silicon film 3 having a thickness of about 3 μm and having a low impurity concentration is epitaxially grown under reduced pressure.
次に単結晶シリコン膜3上に絶縁膜として例えは二酸化
シリコン膜4を化学気相堆積(CVD)法によシ5μm
程度形成する(第1図)。Next, as an insulating film, for example, a silicon dioxide film 4 is deposited to a thickness of 5 μm on the single crystal silicon film 3 by chemical vapor deposition (CVD).
(Figure 1).
一方、このような71ノ、ン基板とは別に、絶縁体基板
例えば石英ガラスを用意し、該絶縁f4−基板上に絶縁
性を有する接着1−金級憶する。杷綜住を有する接着物
質として例えばポリイミド系あるいはラダー形シリコン
系の高耐熱性高分子樹脂が用いられる。これらの高分子
樹脂は絶縁体基板上に回転塗布することにより1〜10
μm 程度の均一な!麺を形成することができる。この
様子を示したのが第2図でめる。第2図は基&V?面略
図で、5は石英ガラス基板、6は回転塗布された高分子
樹月旨膜である。On the other hand, an insulating substrate such as quartz glass is prepared separately from such a substrate, and an insulating adhesive is applied on the insulating substrate. For example, a polyimide-based or ladder-type silicone-based highly heat-resistant polymer resin is used as the adhesive material having loquats. These polymer resins can be applied by spin coating onto an insulating substrate.
Uniform on the order of μm! Noodles can be formed. Figure 2 shows this situation. Figure 2 is base & V? In the schematic plan view, 5 is a quartz glass substrate, and 6 is a spin-coated polymer resin film.
次に、第1図に示した二酸化シリコン膜4の表面と、第
2図に示した高分子側脂膜6の表面を蜜漬させて200
〜400℃で熱処理することにより、@1図、第2図に
示した2つの基板を接着する(第3図)。Next, the surface of the silicon dioxide film 4 shown in FIG. 1 and the surface of the polymer side fat film 6 shown in FIG. 2 were soaked in honey for 200 minutes.
The two substrates shown in Figures 1 and 2 are bonded together by heat treatment at ~400°C (Figure 3).
次に第3図に示したウェーハのシリコン基板1および高
濃度不純物層2を研摩、エッチ;/グにより除去する。Next, the silicon substrate 1 and high concentration impurity layer 2 of the wafer shown in FIG. 3 are removed by polishing and etching.
まず通常のラッピングおよびポリシング加工によシ、3
00μm程度の厚さのシリコン基板1を30μm程度に
薄くする。次に低濃度不純物のシリコン基板1と高漠度
不4廿吻層2とでエツチング速度が大きくことなるよう
なエツチング液、例えば水酸化カリウム(KOf()を
主体としたアルカリ水溶液によシリコン基板1をエツチ
ングすると、シリコン基板1と高濃度不純物層2の界面
でエツチングは停止する(第4図)。First, apply normal lapping and polishing.
A silicon substrate 1 having a thickness of approximately 00 μm is thinned to approximately 30 μm. Next, the silicon substrate is etched using an etching solution such as an alkaline aqueous solution mainly containing potassium hydroxide (KOf()), which has a large etching rate between the silicon substrate 1 containing low concentration impurities and the high density non-concentration layer 2. When etching 1, the etching stops at the interface between silicon substrate 1 and high concentration impurity layer 2 (FIG. 4).
次に高濃度不純物層2と低濃度不純物の単結晶シリコン
膜3とでエツチング速度が大きくことなるようなエツチ
ング液、例えば硝酸、弗酸、酢酸からなる混合液により
、高一度不純w層2と単結晶シリコン膜3とのエツチン
グ速度を50:1程度にでき、単結晶シリコン膜3をほ
とんどエツチングせずに高濃度不純物層2をエツチング
除去できる(第5図)。Next, the high concentration impurity layer 2 and the low concentration impurity single crystal silicon film 3 are etched using an etching solution such as a mixed solution of nitric acid, hydrofluoric acid, and acetic acid that has a greatly different etching rate. The etching rate with respect to the single crystal silicon film 3 can be set to about 50:1, and the high concentration impurity layer 2 can be removed by etching without substantially etching the single crystal silicon film 3 (FIG. 5).
このようにして、絶縁体上に2.6±0.3μm程度の
均一な厚さの単結晶シリコン膜を形成することができた
。さらにこのような単結晶シリコン膜に対してメカノケ
ミカルボリジング加工を施すことによ、!Ill 、
0.7±0,1μmの厚さの単結晶シリコン膜も形成で
きた。In this way, a single crystal silicon film having a uniform thickness of about 2.6±0.3 μm could be formed on the insulator. Furthermore, by applying mechanochemical boriding processing to such a single crystal silicon film! Ill,
A single crystal silicon film with a thickness of 0.7±0.1 μm was also formed.
絶縁体基板として石英ガラスを例にと9説明したか、伺
もこれに限る必要はなく例えば第6図に示すようにシリ
コン基板7を熱酸化して、表面に二酸化シリコン膜8,
81を形成したものを用いてもよい。Although the explanation has been made using quartz glass as an example of an insulating substrate, the invention is not limited to this. For example, as shown in FIG. 6, a silicon substrate 7 is thermally oxidized to form a silicon dioxide film 8 on the surface.
81 may be used.
またシリコンをエピタキシャルする基板としては高濃度
に不純物を含んたシリコン基板を用いてもよい。Furthermore, a silicon substrate containing a high concentration of impurities may be used as the substrate on which silicon is epitaxially formed.
又、接着層は、高分子樹脂膜に限定されたものではなく
、例えばガラス層を用いることができる。Further, the adhesive layer is not limited to a polymer resin film, and for example, a glass layer can be used.
例えば第7図に示すように絶縁体基板例えば石英ガラス
5の表面に金属膜例えば鉛(Pb)蒸看膜9を形成する
。そして前述したように、第3図に示したのと向様な方
法で、単結晶シリコン膜と二酸化シリコン膜を含んだシ
リコン基板と、給蒸着膜を含んだ石英ガラス基板を否着
しだ状態で熱処理する。例えば0.3μm 程度の厚さ
の給蒸N膜を堆積し、約600℃で熱処理することによ
り鉛が石英ガラス、二酸化シリコン膜と反応し、1μm
程度、、::
の厚さの鉛ガラス層が形成され、2つの基板が接着され
る。そして第4図、第5図で述べたのと同様な研摩、エ
ツチング工程により第8図に示すように、石英ガラス基
板5、鉛ガラス層10、二酸化シリコン基板ン膜なる絶
縁体上に単結晶シリコン膜3を形成することができる。For example, as shown in FIG. 7, a metal film, such as a lead (Pb) evaporation film 9, is formed on the surface of an insulating substrate, such as quartz glass 5. As mentioned above, a silicon substrate containing a single crystal silicon film and a silicon dioxide film, and a quartz glass substrate containing a vapor-deposited film were deposited using a method similar to that shown in Fig. 3. Heat treated with For example, by depositing a vapor-supplied N film with a thickness of about 0.3 μm and heat-treating it at about 600°C, lead reacts with the quartz glass and silicon dioxide film, resulting in a thickness of 1 μm.
A layer of lead glass with a thickness of about , :: is formed and the two substrates are bonded together. Then, by polishing and etching processes similar to those described in FIGS. 4 and 5, as shown in FIG. A silicon film 3 can be formed.
不実施例では、単結晶シリコン膜を支喬するための絶縁
体基板の形成に多結晶シリコン膜堆積を行わないため、
単結晶シリコン族が長時間、高温にさらされることがな
く、高?#度不純物層から単結晶シリコン膜への不純物
拡散が著しく低減される。又、多結晶シリコン堆積時で
の単晴晶7リコン嗅への多結晶シリコンのまわシこみと
いうやっかいな問題からも解放される。In the non-example, a polycrystalline silicon film is not deposited to form an insulating substrate for supporting a single-crystalline silicon film.
Single-crystal silicon family is not exposed to high temperatures for long periods of time. Impurity diffusion from the impurity layer to the single crystal silicon film is significantly reduced. In addition, the troublesome problem of the polycrystalline silicon getting mixed into the monocrystalline silicon layer during polycrystalline silicon deposition can be avoided.
このような方法で得られた単結晶シリコン膜は、もとも
とホモエピタキシャル成長させLmであるため、結晶欠
陥が少なく、高品質であり、かつ基板面と同じ面積のも
のが得られる。又、本発明の方法を用いることにより、
単結晶シリコン膜にデバイス素子を形成したのち、その
上に再び単結晶シリコン喚を形成することができ、LS
Iの三次元化も可能である。Since the single crystal silicon film obtained by such a method is originally grown by homoepitaxial growth Lm, it has few crystal defects, is of high quality, and has the same area as the substrate surface. Furthermore, by using the method of the present invention,
After forming a device element on a single-crystal silicon film, a single-crystal silicon film can be formed again on top of the device element.
It is also possible to make I three-dimensional.
次にゲルマニウム単結晶膜を絶縁性基板上に形成する第
2の実施例について述べる。まず数Ω・1のオーダーの
抵抗率を有するシリコン基板上に厚さ約2μmのゲルマ
ニウムiをエピタキシャル成長させた。エピタキシャル
成長は、化学気相成長(CVD)法を用い、ゲルマン(
GeHa )の熱分解によシ、約600℃でおこなった
。次に、エピタキシャル成長させた単結晶ゲルマニウム
膜上に二酸化シリコン膜をCVD法によシ3μm堆積し
た。Next, a second example in which a germanium single crystal film is formed on an insulating substrate will be described. First, germanium i with a thickness of about 2 μm was epitaxially grown on a silicon substrate having a resistivity on the order of several Ω·1. For epitaxial growth, chemical vapor deposition (CVD) is used to grow germanium (
The thermal decomposition of GeHa) was carried out at approximately 600°C. Next, a 3 μm thick silicon dioxide film was deposited on the epitaxially grown single crystal germanium film by CVD.
このようにして得られたシリコン基板の断面略図を第9
図に示す。A schematic cross-sectional view of the silicon substrate obtained in this way is shown in Figure 9.
As shown in the figure.
一方、このようなシリコン基板とは別に、非晶質基板と
して石英ガラス基板を用意し、この石英ガラス基板上に
接着層を被積した。以下は第1の実施例とほとんど同じ
工程を行なうので説明を省略するが、このようにして第
10図に示したような石英ガラス基板14の上に接着層
であるポリイミド樹脂膜15、二酸化シリコン膜13が
積層された上にゲルマニウム単結晶膜12を形成するこ
とができた。On the other hand, apart from such a silicon substrate, a quartz glass substrate was prepared as an amorphous substrate, and an adhesive layer was deposited on this quartz glass substrate. The following steps are almost the same as those in the first embodiment, so the explanation will be omitted. In this way, a polyimide resin film 15, which is an adhesive layer, and a silicon dioxide film are formed on a quartz glass substrate 14 as shown in FIG. A germanium single crystal film 12 could be formed on the laminated film 13.
まだこの実施例においてゲルマニウムをエビする基板と
してシリコン基板を用いたが、ゲルマニウム基゛板でも
よいことは明白である。In this embodiment, a silicon substrate was used as the substrate for germanium, but it is clear that a germanium substrate may also be used.
また接着層はポリイミドに限られるものではなく、第1
の実施例で説明したシリコン系8fhぽ膜や鉛ガラスを
同様の方法で用いてもよい。またゲルマニウムエピタキ
シャル膜を移しかえる基板も石英ガラス基板に限られる
ものではなく、他のS@のガラスや、シリコン基板の表
面に熱酸化法やCVD法等で二酸化シリコン膜を形成し
たもの、あるいはセラミック等でもよい。Furthermore, the adhesive layer is not limited to polyimide, and the adhesive layer is not limited to polyimide.
The silicon-based 8fh film and lead glass described in the embodiment may also be used in a similar manner. Furthermore, the substrate to which the germanium epitaxial film is transferred is not limited to the quartz glass substrate, but may also be other S@ glasses, silicon substrates with a silicon dioxide film formed on the surface by thermal oxidation or CVD, or ceramics. etc.
このようにして得られた単結晶ゲルマニウム膜はもとも
とエピタキシャル成長させた膜であるため、結晶欠陥が
少なく高品質であり、かつ基板の大きさと同種間の大面
積のものが得られる。又、本発明の方ef用いることに
より半結晶ゲルマニウム膜にデバイスを形成したのち、
その上に再びゲルマニウムやシリコン等の半導体単結晶
膜全形成することができ、デバイスの慎漕化も可n目と
なる。Since the single-crystal germanium film thus obtained is originally an epitaxially grown film, it has few crystal defects and is of high quality, and can have a large area similar to the size of the substrate. Also, after forming a device on a semi-crystalline germanium film by using the method of the present invention,
On top of that, a semiconductor single crystal film of germanium, silicon, etc. can be entirely formed again, and the device can be made more conservative.
仄に第3の実施例としてガリウム砒素をエビタキシャル
成長させる場合の半導体単結晶基板としてゲルマニウム
単、債晶を用いた場合を例にとシ説明する。As a third embodiment, a case will be explained in which a germanium monocrystalline crystal is used as a semiconductor single crystal substrate in the case of epitaxially growing gallium arsenide.
数Ω・1程度の抵坑率を有する直径2インチで面方位(
100)を有するゲルマニウム単結晶基板上に、化学気
相成長(CVD)法によシ、ガリウム砒素単結晶膜をエ
ピタキシャル成長させた。原料ガスとしては、トリメチ
ルガリウムC(CHs ) S Ga)。It has a resistivity of several Ω・1, has a diameter of 2 inches, and has a surface orientation (
A gallium arsenide single crystal film was epitaxially grown on a germanium single crystal substrate having a chemical vapor deposition (CVD) of 100% by chemical vapor deposition (CVD). The raw material gas is trimethyl gallium C (CHs ) S Ga).
およびアルシン、As1(、’J ガスを用い、これら
のガスの熱分解によシ気相成長させた。2μm程厩O4
さのガリウム砒素単結晶膜を成長させた・麦、その上に
、CVJ)法にょシ杷祿膜を4績した。絶縁膜として例
えば窒化シリコン(SisN4)gを0.3μm程度堆
積した。このようなゲルマニウム単結晶基板の断面略図
を第11図に示す。and arsine, As1(,'J) were used for vapor phase growth by thermal decomposition of these gases.
A gallium arsenide single-crystal film was grown, and on top of that, four loquat films were applied using the CVJ method. For example, silicon nitride (SisN4) g was deposited to a thickness of about 0.3 μm as an insulating film. A schematic cross-sectional view of such a germanium single crystal substrate is shown in FIG.
一方ゲルマニウム単結晶基板とは別に、非晶質絶縁体基
板として石英ガラス基板を用意し、該石英ガラス基板上
にポリイミド拘招暎を接層ノーとして被墳した。以下は
第1の笑ゐ例とほぼ同じ工程であるので詳しい説明は省
略する。On the other hand, apart from the germanium single crystal substrate, a quartz glass substrate was prepared as an amorphous insulator substrate, and a polyimide resin was deposited on the quartz glass substrate as a contact layer. The following steps are almost the same as in the first example, so detailed explanation will be omitted.
このようにして、第12図にその断面略図を示すように
、石英ガラス基板24上に接着層でめるポリイミド樹脂
膜25、シリコン窒化膜23が積層されたものの上に厚
さ2μmの単結晶ガリウム砒素膜22を形成できた。な
おゲルマニウムのエツチング液として弗酸、硝酸、氷酢
哨の混合液を用いた。In this way, as shown in a schematic cross-sectional view in FIG. A gallium arsenide film 22 was successfully formed. A mixed solution of hydrofluoric acid, nitric acid, and ice vinegar was used as the etching solution for germanium.
また仁の実施例ではガリウム砒素をエピタキシャルする
基板としてゲルマニウム基板を用いたが、表面ニゲルマ
ニウムエピタキシャル膜を有するゲルマニウム基板、シ
リコン基板、H’(I K ’/ IJ コンエピタキ
シャル膜を有するシリコン基板、表面にゲルマニウム膜
をエピタキシャルしたシリコン基板等を用いてもよい。Furthermore, in Hitoshi's example, a germanium substrate was used as the substrate on which gallium arsenide was epitaxially deposited, but a germanium substrate with a nigermanium epitaxial film on the surface, a silicon substrate, a silicon substrate with a H'(I K'/IJ con-epitaxial film, a silicon substrate with a surface A silicon substrate or the like on which a germanium film is epitaxially formed may also be used.
また接着層はポリイミドに限らずシリコン系の樹脂を用
いてもよい。また上記シリコン窒化膜23の上に二酸化
シリコン膜を設ければ、前記第1゜実1例−c4、えと
□・i1機。1,3□□よして用いることもできる。Furthermore, the adhesive layer is not limited to polyimide, and silicon-based resin may also be used. Further, if a silicon dioxide film is provided on the silicon nitride film 23, the first example-c4, er, □-i1 machine. 1, 3□□ can also be used.
また絶縁性の基板としては石英ガラス基板に限る必要は
なく、他の種類のカラス、セラミック。Insulating substrates are not limited to quartz glass substrates; other types of glass and ceramics can also be used.
シリコン基板表面に二酸化シリコン膜を形成したもの等
を用いてもよい。A silicon substrate with a silicon dioxide film formed on its surface may also be used.
このような方法で得らnたガリウム砒素単結晶膜は、も
ともとエピタキシャル成長させた膜であるため、結晶欠
陥が少なく、高品質でメジ、がっ、基板と同じ大きさの
ものが得られる。又、基板としてガラスのような安価な
非晶質杷祿体を用いるため、大口径化が容易にでき、か
つ絶縁性にすぐれているため、例えばFETのようンよ
デバイスを形成した場合、浮遊存置が小さく、ガリウム
砒素の大きな利点である高速性が大いに発達される。Since the gallium arsenide single crystal film obtained by such a method is originally a film grown epitaxially, it has few crystal defects, has high quality, and has the same size as the substrate. In addition, since an inexpensive amorphous material such as glass is used as the substrate, it is easy to increase the diameter and has excellent insulation properties, so when forming a device such as an FET, for example, floating The storage space is small, and the high speed, which is a major advantage of gallium arsenide, is greatly developed.
さ少に又、シリコン単結晶基板表面にデバイスを形成し
たのち、その上にガリウム砒素単結晶膜を形成すること
もでき、デバイスの積層化、多慎能化も可mlとなる。Alternatively, after a device is formed on the surface of a silicon single crystal substrate, a gallium arsenide single crystal film can be formed thereon, making it possible to stack the device and make it more flexible.
以上第1−i3の実施例でシリコン、ゲルマニウム、ガ
リウム砒素の単結晶膜を非晶質絶縁体上形成することも
述べたが、本、A明は何もこれに限られるものではなく
、InP 、 InAs 、 AJt−xGaxAsI
n Ga As P等の一般のI−■族化合物半導体
に対しても適用することができる。Although it has been described above that a single crystal film of silicon, germanium, or gallium arsenide is formed on an amorphous insulator in Example 1-i3, this invention is not limited to this, and InP , InAs, AJt-xGaxAsI
It can also be applied to general I-■ group compound semiconductors such as nGaAsP.
以上述べたように、本発明は従来の方法とは全く異なシ
、半導体基板上にエピタキシャル成長させた単結晶半導
体膜を絶縁性接着層を介して少くとも表面に絶縁体層を
有する基板上に移しかえることを%徴とするもので、本
発明によシ、従来の方法に比べて高品質かつ大面積で均
一な厚さの単結晶半導体族を絶縁体上に形成することが
できる。As described above, the present invention is completely different from conventional methods in that a single crystal semiconductor film epitaxially grown on a semiconductor substrate is transferred via an insulating adhesive layer onto a substrate having an insulating layer on at least the surface. According to the present invention, a monocrystalline semiconductor family of high quality, large area, and uniform thickness can be formed on an insulator compared to conventional methods.
第1図は、高濃度不純物層上にエピタキシャル成長させ
た単結晶シリコン膜およびその上に二酸化シリコン膜を
含むシリコン基板の断面略図を示す。
第2図は、表面に高分子@脂が塗布された石英ガラス基
板の断面略図である。
第3図は、シリコン基板と石英ガラス基板を接着した状
態を示す断面略図である。
第4図は、シリコン基板のみが除去された状態を示す断
面略図である。
第5図は、シリコン基似と尚一度不純’f/In−が除
去された状態を示す断面略図である。
第6図は、表面が熱酸化されたシリコン基板上に高分子
樹脂が塗布された状態を示すl#r面略図である。
第7図は、表面に給蒸着膜が形成された石英ガラス基板
の断面略図である。
第8図は、絶縁性接着層として姶ガラス層を用いた場合
の基板断面略図でるる。
第9図は表面に単結晶ゲルマニウム膜をエピタキシャル
成長させたシリコン基板の断面略図。
第10図は石英ガラス基板に接着層を介してシリコン基
板を接着し、そのあとシリコン基板を除去して、ゲルマ
ニウム膜を残した状態を示す断面略図。
第11図は、ガリウム哄素単結晶膜及び4化シリコン膜
をこのil@に積層したゲルマニウム単結晶基板の断面
略図を示す。
第12図は、石英ガラス基板に接着層を介してゲルマニ
ウム基板を接着し、そのあとゲルマニウム基板を除去し
て、ガリウム砒素膜を残した状態を示す断面略図。
図中の番号はそれぞれ以下のものを示す。
1.7.11・・・シリコン基板、2・・・高ik度不
純物層、3・・・単結晶シリコン膜、4,8.8’、1
3・・・ニー化シリコン膜、訃・・石英ガラス基板、6
,15゜25・・・高分子@脂膜、9・・・給蒸着膜、
10・・・鉛ガラス層、12・・・ケルマニウム単結晶
膜、14.24・・・石英ガラス丞板、21・・・ゲル
マニウム単結晶基板、22・・・ガリウム砒素単結晶族
、23・・・室[ヒシリコン膜。
代’r 人−1”□ )、’y−tj )′:5
晋第5図 第7図
第6図 第8図
第 9 図
第11図FIG. 1 shows a schematic cross-sectional view of a silicon substrate including a single crystal silicon film epitaxially grown on a heavily doped layer and a silicon dioxide film thereon. FIG. 2 is a schematic cross-sectional view of a quartz glass substrate whose surface is coated with polymer @ fat. FIG. 3 is a schematic cross-sectional view showing a state in which a silicon substrate and a quartz glass substrate are bonded together. FIG. 4 is a schematic cross-sectional view showing a state in which only the silicon substrate has been removed. FIG. 5 is a schematic cross-sectional view showing a silicon-based structure and a state in which the impurity 'f/In- has been removed once again. FIG. 6 is a schematic view of the l#r plane showing a state in which a polymer resin is coated on a silicon substrate whose surface has been thermally oxidized. FIG. 7 is a schematic cross-sectional view of a quartz glass substrate on which a vapor deposition film is formed. FIG. 8 is a schematic cross-sectional view of a substrate when a glass layer is used as an insulating adhesive layer. FIG. 9 is a schematic cross-sectional view of a silicon substrate on which a single crystal germanium film is epitaxially grown. FIG. 10 is a schematic cross-sectional view showing a state in which a silicon substrate is bonded to a quartz glass substrate via an adhesive layer, and then the silicon substrate is removed, leaving a germanium film. FIG. 11 shows a schematic cross-sectional view of a germanium single crystal substrate in which a gallium oxide single crystal film and a silicon quaternide film are laminated on this il@. FIG. 12 is a schematic cross-sectional view showing a state in which a germanium substrate is bonded to a quartz glass substrate via an adhesive layer, and then the germanium substrate is removed, leaving a gallium arsenide film. The numbers in the figure indicate the following. 1.7.11...Silicon substrate, 2...High ik impurity layer, 3...Single crystal silicon film, 4, 8.8', 1
3...Needed silicon film, quartz glass substrate, 6
, 15°25...Polymer @ fat film, 9...Vapour-deposited film,
DESCRIPTION OF SYMBOLS 10... Lead glass layer, 12... Kermanium single crystal film, 14.24... Quartz glass plate, 21... Germanium single crystal substrate, 22... Gallium arsenide single crystal group, 23...・Chamber [Hisilicon film. 'r person-1"□), 'y-tj)': 5
Jin Figure 5 Figure 7 Figure 6 Figure 8 Figure 9 Figure 11
Claims (1)
エピタキシャル膜上に絶縁膜を備えた単結晶半導体基板
と、少くとも片側に非晶質絶縁体層を備えた基板とを、
該基板の非晶質絶縁体層と、前記単結晶半導体基板の前
記エピタキシャル膜上の絶縁膜との間に接着層を設けて
固層した後、前記単結晶半導体基板を研摩及びエツチン
グによシ除去することによシ前記少くとも片側に非晶質
絶縁体層を備えた基板上に前記半導体単結晶エピタキシ
ャル膜を形成することを特徴とした半導体装置用基板の
製造方法。A single crystal semiconductor substrate having on its surface at least a semiconductor single crystal epitaxial film and an insulating film on the epitaxial film, and a substrate having an amorphous insulating layer on at least one side,
After providing and solidifying an adhesive layer between the amorphous insulating layer of the substrate and the insulating film on the epitaxial film of the single crystal semiconductor substrate, the single crystal semiconductor substrate is polished and etched. A method of manufacturing a substrate for a semiconductor device, comprising forming the semiconductor single crystal epitaxial film on the substrate having an amorphous insulating layer on at least one side by removing the amorphous insulating layer.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8347882A JPS58200525A (en) | 1982-05-18 | 1982-05-18 | Preparation of substrate for semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8347882A JPS58200525A (en) | 1982-05-18 | 1982-05-18 | Preparation of substrate for semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS58200525A true JPS58200525A (en) | 1983-11-22 |
Family
ID=13803569
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8347882A Pending JPS58200525A (en) | 1982-05-18 | 1982-05-18 | Preparation of substrate for semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58200525A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6114745A (en) * | 1984-06-28 | 1986-01-22 | インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション | Method of producing semiconductor strudture |
JPS61296709A (en) * | 1985-06-24 | 1986-12-27 | インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション | Manufacture of semiconductor |
JPH04506587A (en) * | 1989-09-29 | 1992-11-12 | アメリカ合衆国. | Method for manufacturing thin silicon-on-insulator layers |
WO2002039506A1 (en) * | 2000-11-10 | 2002-05-16 | Hamamatsu Photonics K.K. | Method for fabricating semiconductor photodetector |
-
1982
- 1982-05-18 JP JP8347882A patent/JPS58200525A/en active Pending
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6114745A (en) * | 1984-06-28 | 1986-01-22 | インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション | Method of producing semiconductor strudture |
JPH039631B2 (en) * | 1984-06-28 | 1991-02-08 | Intaanashonaru Bijinesu Mashiinzu Corp | |
JPS61296709A (en) * | 1985-06-24 | 1986-12-27 | インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション | Manufacture of semiconductor |
JPH04506587A (en) * | 1989-09-29 | 1992-11-12 | アメリカ合衆国. | Method for manufacturing thin silicon-on-insulator layers |
WO2002039506A1 (en) * | 2000-11-10 | 2002-05-16 | Hamamatsu Photonics K.K. | Method for fabricating semiconductor photodetector |
JP2002151732A (en) * | 2000-11-10 | 2002-05-24 | Hamamatsu Photonics Kk | Method of manufacturing semiconductor photodetector |
US7094664B2 (en) | 2000-11-10 | 2006-08-22 | Hamamatsu Photonics K.K. | Method for fabricating semiconductor photodetector |
JP4574833B2 (en) * | 2000-11-10 | 2010-11-04 | 浜松ホトニクス株式会社 | Manufacturing method of semiconductor photodetector |
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