JPS58196620A - Skew compensating circuit of data - Google Patents
Skew compensating circuit of dataInfo
- Publication number
- JPS58196620A JPS58196620A JP7673382A JP7673382A JPS58196620A JP S58196620 A JPS58196620 A JP S58196620A JP 7673382 A JP7673382 A JP 7673382A JP 7673382 A JP7673382 A JP 7673382A JP S58196620 A JPS58196620 A JP S58196620A
- Authority
- JP
- Japan
- Prior art keywords
- data
- skew
- circuit
- skinny
- frequency
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/20—Signal processing not specific to the method of recording or reproducing; Circuits therefor for correction of skew for multitrack recording
Abstract
Description
【発明の詳細な説明】
発明の対象
本発明はスキューを持っている並列データを補正するス
キニー補正回路に関する。DETAILED DESCRIPTION OF THE INVENTION Object of the Invention The present invention relates to a skinny correction circuit for correcting parallel data having skew.
従来技術
従来、第１図のようなスキニーを持っている並列データ
のスキニーを補正する場合は、第２図の様なｍ段のスｄ
ｆニー補正用バッファ２を設けて、その入出力を制御す
る回路４．５と比較器６により、スキニーを補正してい
た。しかし、この方式ではｍ段のバッファの中の、１段
は新しいデータと古いデータの境界を示すために使用す
る必要があるので、スキニー補正用バッファとしてはｍ
−１段しか利用できない欠点があった。Prior Art Conventionally, when correcting the skinny of parallel data that has skinny as shown in Figure 1, it is necessary to correct the skinny of parallel data as shown in Figure 2.
An f-knee correction buffer 2 is provided, and a circuit 4.5 and a comparator 6 for controlling the input/output of the f-knee correction buffer 2 are used to correct skinny. However, in this method, one stage of the m-stage buffer needs to be used to indicate the boundary between new data and old data, so it is necessary to use m as a skinny correction buffer.
-There was a drawback that only one stage could be used.
発明の目的
本発明の目的は、従来の欠点を解決して、バッファ段数
を変更しないで、ｍ段のバッファを全て有効に利用する
データのスキニー補正回路を提供することにある。OBJECTS OF THE INVENTION It is an object of the present invention to provide a data skinny correction circuit that solves the conventional drawbacks and effectively utilizes all m stages of buffers without changing the number of buffer stages.
本発明の特徴は、ｍ段のバッファを全て有効に利用する
ために、入出力制御回路の比較器の後に、データ間隔の
変化に追従して動作する時間測定回路を設けたことにあ
る。A feature of the present invention is that in order to effectively utilize all m stages of buffers, a time measuring circuit that operates in accordance with changes in data intervals is provided after the comparator of the input/output control circuit.
発明の実施例
以下、本発明の一実施例を第、３図により説明する。第
３図において、スキューを持っているΔピットのデータ
１がスキュー補正用バッファ２と、入力制御回路４とビ
ット選択回路９に入力される。入力データは各くット毎
にある入力制御回路４の指定したバッファに記録され、
各ビットがそろえば、出力制御回路５の指定したバッフ
ァより、データを出力する。比較器６には、入出力制御
回路４．５の指定するバッファ・アドレス情報が入力さ
れ、そのアドレスを比較することにより、ｍ−１段ス４
．−８が出力される。また、各ビット毎のデータレディ
情報−も４より６に入力されるので、全ビットのレディ
情報がそろった時にデータレディ７を出力する。Embodiment of the Invention An embodiment of the present invention will be described below with reference to FIGS. In FIG. 3, data 1 of a Δ pit having a skew is input to a skew correction buffer 2, an input control circuit 4, and a bit selection circuit 9. Input data is recorded in a designated buffer of the input control circuit 4 for each set,
When each bit is aligned, data is output from the buffer designated by the output control circuit 5. The buffer address information specified by the input/output control circuit 4.5 is inputted to the comparator 6, and by comparing the addresses, the m-1 stage step 4.
．． -8 is output. Further, data ready information for each bit is also input from 4 to 6, so data ready 7 is output when all bits of ready information are available.
ビット選択回路９により、ヘビットから１ビツトを選択
して、その１ビツトの入力周期を測定することにより、
データの速度変動を横用する。By selecting one bit from the bit selection circuit 9 and measuring the input period of that one bit,
Exploit data speed fluctuations.
データの速度変動を検出したら、それをデータ周波数の
に倍で発振している可変周波数発振器の発振周波数にフ
ィードバックする。この可変周波数発振器の発振周波数
を利用すれば、データの速度変動に追従した、時間を測
定することができる。そこで、時間測定回路１２でｍ−
１段スキニーが発生してから、可変周波数発振器の発振
周波数を利用して、１デ一タ間隔の時間を測定すれば、
ｍ段スキニー信号１３を作ることができる。従来は入出
力制御回路の比較のみでスキューの検出をしていたため
ｍ−１段までしかバッファを利用できなかったが、この
実施例のように、１デ一タ間隔の時間測定回路を追加し
てｍ段ス′ｊＦ、−を作ることにより、バッファをすべ
て利用できる。Once data speed fluctuations are detected, they are fed back to the oscillation frequency of the variable frequency oscillator, which oscillates at twice the data frequency. By using the oscillation frequency of this variable frequency oscillator, it is possible to measure time that follows data speed fluctuations. Therefore, the time measuring circuit 12
After the first stage skinny occurs, if you measure the time of one data interval using the oscillation frequency of the variable frequency oscillator,
An m-stage skinny signal 13 can be generated. In the past, skew was detected only by comparing input/output control circuits, so buffers could only be used up to m-1 stages, but as in this example, a time measurement circuit for one data interval was added. By creating m stages 'jF, -, all the buffers can be used.
発明の効果
以上、本発明によって、ｍ段のスキニー補正用バッファ
の全てを利用することが可能となる。As described above, the present invention makes it possible to utilize all of the m stages of skinny correction buffers.
第１図は、スキューを持ったヘビットのデータを示す説
明図、第２図は従来のスキニー補正回路図、第３図は、
本発明の一実施例のデータのスキニー補正回路図である
。
１・・・入力データ
、１２・・・スキニー補正用バッファ（ｍ段）３・
・・出力データ ４・・・入力制御回路（Ｎｌｉ）
。
５・・・出力制御回路 ６・・・比較器７・・・デ
ータレディ信号
８・・・ｍ−１段スキニー信号
９・・・ビット選択回路（Ｎ→１）
１０・・・データ間隔検出回路
１１・・・可変周波数発振回路
１２・・・時間測定回路
１５−ｍ段スキニー信号
、 〜νFigure 1 is an explanatory diagram showing Hebit data with skew, Figure 2 is a conventional skinny correction circuit diagram, and Figure 3 is
FIG. 3 is a data skinny correction circuit diagram according to an embodiment of the present invention. 1...Input data
, 12... Skinny correction buffer (m stages) 3.
...Output data 4...Input control circuit (Nli)
. 5... Output control circuit 6... Comparator 7... Data ready signal 8... m-1 stage skinny signal 9... Bit selection circuit (N→1) 10... Data interval detection circuit 11...Variable frequency oscillation circuit 12...Time measurement circuit 15-m stage skinny signal, ~ν
Claims (1)
ある場合に、それを補正するためのバッファとその入出
力を制御する制御回路より成るスキニー補正回路におい
て、入力データのデータ間隔の変化で周波数が変化する
発振回路と、その発振周波数で時間を測定する回路とを
設けたこと１に％徴とするデータのスキニー補正回路。When there is a skew in data, such as read data from a magnetic tape, a skinny correction circuit consisting of a buffer to correct the skew and a control circuit that controls the input/output of the data causes the frequency to change due to a change in the data interval of the input data. A data skinny correction circuit is provided with a changing oscillation circuit and a circuit that measures time using the oscillation frequency.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7673382A JPS58196620A (en) | 1982-05-10 | 1982-05-10 | Skew compensating circuit of data |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7673382A JPS58196620A (en) | 1982-05-10 | 1982-05-10 | Skew compensating circuit of data |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS58196620A true JPS58196620A (en) | 1983-11-16 |
Family
ID=13613777
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7673382A Pending JPS58196620A (en) | 1982-05-10 | 1982-05-10 | Skew compensating circuit of data |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58196620A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4679670A (en) * | 1985-02-27 | 1987-07-14 | American Tourister, Inc. | Wheeled suitcase and handle |
-
1982
- 1982-05-10 JP JP7673382A patent/JPS58196620A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4679670A (en) * | 1985-02-27 | 1987-07-14 | American Tourister, Inc. | Wheeled suitcase and handle |
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