JPS58195384A - Digital video signal recording system - Google Patents

Abstract

PURPOSE:To reduce the deterioration in the vertical resolution of a field picture, by mixing the digital video signal on the 1st field and that of the 2nd field obtained from analog video signals for one frame's share through digital pulse modulation, forming the 3rd and the 4th fields and recording the digital video signal on any one of the fields or the both on a recording medium. CONSTITUTION:To suppress the reduction in the vertical resolution of the field picture taking the reproduction at a digital signal reproducer having a field memory only and the field picture reproduction with the fast feed reproduction into consideration, the digital video signal of one field is attenuated and mixed to the digital video signal of one field as shown in Equations for the recording, where L2n (n is a natural number) in Equation is a picture element data of the 2n-th scanning line from the upper part of the screen, and the scanning lines of an odd number order represent the scanning lines of the 1st field and the scanning lines of an even order number represent the scanning lines of the 2nd field. The mixing processing of Equations I , II is done in memories 9, 10 and 11, the picture element data from the main memory of the scanning lines to be mixed in the auxiliary memory is stored, the data is read out sequentially, operated and stored again in the main memory, allowing to attain the mixing processing.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a digital video signal recording system, in which a digital video signal obtained by digital pulse modulation of an analog video signal for one frame is recorded as a first field digital video signal and a first field digital video signal. In an apparatus that reproduces a recording medium by mixing two fields of digital video signals at a predetermined ratio to generate third and fourth field digital video signals and recording them on a recording medium. Even an inexpensive playback device that has only field memory as a memory circuit for storing playback digital video signals can perform high-quality image playback, and even a high-end playback device that has a frame memory can suitably play back images without flickering. The purpose of the present invention is to provide a digital video signal recording method that obtains the desired results.

In recent years, pulse code modulation (
Digital video signals and digital audio signals obtained by digital pulse modulation such as PCM) are recorded on a disc-shaped recording medium (hereinafter referred to as a "disc") as intermittent changes in bit strings, and the disc records changes in the intensity of light or static signals. A method of detecting a change in capacitance, reading and reproducing a recorded signal is being actively developed. Among these, a recording method for a digital audio disc is known in which a digital audio signal related to color still image information is added as additional information to the digital audio signal and recorded on the same track on the disc. Usually, a plurality of music programs are recorded on the same side of such a digital audio disc, and a digital video signal related to color still image information is recorded corresponding to each music program. In this case, the music program can be played using a universal playback system.

On the other hand, since the television format for video signal playback is not universally accepted, video signals must be played back in regions or countries where the television format differs from that of the recorded video signal. As for the signal, it is necessary to convert it into a signal format that complies with the television system of the region or country in which it is to be reproduced and displayed. In particular, since the above-mentioned digital video signal concerns color still images that play an auxiliary role to aid the imagination of the listener who listens to the playback of the digital audio signal, the above-mentioned disc is compatible with the differences in television systems around the world. It is desirable to use a universal system regardless of the TV system and reproduce the signal format in accordance with each television system.

Among the world's television systems mentioned above, the current color signal transmission formats are NTSC, PAL, and S
There are three ECAM systems, and each of these systems composes a color image signal from a luminance signal and two types of color difference signals, so the brightness signal and two types of color difference signals are digitally pulse modulated separately. Adopting a component encoding method that transmits data as a component will facilitate compatibility between the three methods mentioned above, and when using a display monitor with RGB three primary color signal input terminals that may appear in the future. It is desirable because it has advantages such as good image quality, and especially the possibility of partial moving images in the case of digital audio discs.

Among such component-encoded digital video signals, digital video signals particularly applicable to television studios are currently being classified by the International Radiocommunications Advisory Committee (
CCIR) is currently considering unifying standards, and it states that the number of scanning lines/images per second will be the least common multiple of the world's main horizontal scanning frequencies of 525 lines/30 frames and 625 lines/25 frames, which is 2. 1, which is 6 times the frequency of .25MHz
A component code in which the sampling frequency of the luminance signal is 3.5 MHz, the two types of color difference signals (RY) and (B-Y) are each sampled at 8.75 MHz, and each is quantized at 8 bits/pel. Proposals have been made to change the In this case, the number of sampling points per one scanning line (hereinafter also referred to as "line") of the luminance signal is obtained by dividing the sampling frequency of 13.5 MHz by the horizontal scanning frequency of 15.625 kHz, which is 864.
Become an individual. Further, as a signal format, a format has been proposed that does not cause signal deterioration even when subjected to chromakey processing or other image processing.

In the case of transmitting digital video signals for consumer use, it is preferable to transmit according to the standards proposed above, but when there is a large amount of data, the problem is that the image memory element becomes large and the image transmission time becomes long. Become. For example, 1
The number of effective sample points on the line is 720 for the luminance signal and 360 for each of the two types of color difference signals (RY) and (B-Y).
If the number of transmission lines is 575, the number of transmission sample points is (720+2x360)x575=828,000. If one sample point is composed of 8 bits, then 828,000×8=6,624,000 (bits). This is 64k of 216 (=65,536) bits
This is the amount of information that can be stored using 102 RAMs (random access memories). This amount of information is 44.1kHz
If the transmission is performed using a transmission board capable of transmitting 16 bits at z, the transmission time is required. Furthermore, assuming that the memory circuit has two types, one for writing and one for display, the 64kRA
A total of 204 M is required. However, this makes the configuration of the memory circuit of the playback device complicated and expensive for consumer-use digital video signal transmission on the digital audio disc, and especially for consumer-use digital video signals that require lower prices. Undesirable for signal regenerators.

Therefore, the present invention enables high-quality image reproduction even in a consumer-use digital signal reproducing device that only has a field memory that satisfies the above-mentioned demand for lower costs, and also allows high-quality digital signal reproducing devices that have a frame memory to have problems. A digital video signal that has been converted in advance into a signal format that can be reproduced without any problem is recorded on a recording medium such as the digital audio disc, and one embodiment thereof will be described below with reference to the drawings.

The frequency band of the brightness signal in the television broadcast signal is 4.2MHz for the NTSC system, and 4.2MHz for the PAL system and S
In the ECAM system, the frequency band is 5MHz or 6MHz, but in the NTSC system, the frequency band of the brightness signal actually transmitted is up to about 3MHz, and in the PA
The L system and the SECAM system only utilize frequencies up to about 3MHz to 4MH2. Therefore, the sampling frequency is 8M
Although it is possible to lower it to about Hz, it is better to have some margin. Therefore, the sampling frequency of the luminance signal is 9MHz, which has a 3:2 relationship with the above-mentioned 13.5MHz.
be selected. In addition, the sampling frequency of the color difference signals (R-Y) and (B-Y) is 2, which is 1/4 of the frequency of 9 MHz.
．． 25MHz respectively.

Note that the number of bits in a memory circuit that stores digital video signals increases in proportion to the signal band frequency.
In addition to the standard mode digital video signals mentioned above,
Future number of scanning lines: 1125, luminance signal frequency band: 20
Considering the case where a digital video signal in MHz high-definition mode is also recorded, a code for identifying whether the mode is standard mode or high-definition mode is provided in a part of the header to be described later.

The number of luminance signal sampling points per scanning line of the standard mode digital video signal is 576, which is obtained by dividing the sampling frequency of 8 MHz by the horizontal scanning frequency of 15.625 kHz. However, in addition to the image information, this includes horizontal blanking periods such as the horizontal synchronization signal section and the color burst signal section, and if we exclude the sample points during this period, it is possible to reduce the number to about 456. can.

On the other hand, the number of bits of a general commercially available 64kRAM is 216 (=
65,535) bits 1 If you use 4 of these, 4X
A number of bits of 216=218=262,144 (bits) is obtained. Dividing this number of bits by the number of luminance signal effective sample points of one horizontal scanning line, 456, yields approximately 574.87. Therefore, out of the 625 scanning lines in one frame, by selecting the effective number of scanning lines to be transmitted as an image as 572, which is extremely close to the above 574.87 and smaller than this, it is possible to Each pixel data of the effective sample points of the luminance signal can be efficiently stored in four 64k RAMs per bit.

Furthermore, the amount of information of the two types of digital color difference signals obtained by digital pulse modulating the two types of color difference signals (R-Y) and (B-Y) at a sampling frequency of 2.25 MHz on each side is as follows.
Since it is 1/4 of that of the digital luminance signal, the pixel take of the effective sample point of each digital color difference signal can be efficiently stored in one 64k RAM per bit. Therefore, assuming that the pixel data of one sampling point is 6 bits, the digital video signal obtained by chronologically synthesizing the digital luminance signal and the two types of digital color difference signals is 6X ( As shown by 4+1+1)=36 (numbers), data can be stored in 36 64kRAMs. Additionally, these 36 64k RAMs can store two 1-field digital video signals, which is equivalent to the 64k RAM required for the aforementioned TV studio memory circuit.
The number is much smaller than the number of kRAMs 204, and the cost can be reduced.

In the case of component encoding, even when the pixel take of one sample point is quantized to 6 bits as described above, there is almost no problem with detection of quantization noise using standard consumer playback equipment. This was confirmed experimentally. Furthermore, according to this embodiment, since the number of chips per bit can be an integer, the address signal generation circuit for actually controlling the storage of digital video signals in the memory circuit can be shared, and memory control can be easily performed. This also eliminates the need for an extra buffer memory element added to facilitate memory control.

Next, the signal recording system of the present invention will be explained.

FIG. 1 shows a block system diagram of an embodiment of the main part of the system of the present invention. In the figure, reference numeral 1 denotes a video signal source such as a color television camera, flying spot scanner, VTR, etc., to which a TV synchronization signal from a TV synchronization signal generator 2 is supplied as necessary, and three signals related to the color image to be recorded are supplied.
The primary color signals are extracted and supplied to the matrix circuit 3.

The matrix circuit 3 has 625 scanning lines and a horizontal scanning frequency of 15.625 kHz, which is a luminance signal Y and two types of color difference signals (B
-Y) and (RY), respectively, and supply these to AD converters 4, 5, and 6 separately. On the other hand, the output TV synchronization signal of the TV synchronization signal generator 2 is output from the clock generators 7, 8,
12 and 13, respectively.

The AD converter 4 converts the luminance signal Y into the clock generator 7.
The luminance signal is sampled at a sampling frequency selected to be 9 MHz for the reason described above using the same clock, and then quantized using an 8-bit quantization number, converted into a digital luminance signal, and supplied to the memory 9. As described above, this digital luminance signal has 456 sample points (pixels) per scanning line, and has 572 effective scanning lines for one frame. The memory 9 writes one frame or one field of the digital luminance signal according to the output write control signal of the memory write controller 12, and writes the digital luminance signal at a sampling frequency of 44.1kHz (or 47kHz) according to the output readout control signal of the memory read controller 14.
．． 25 kHz) and is read out as a digital luminance signal with a quantization number of 8 bits.

Further, the AD converters 5 and 6 output color difference signals (B-Y) and (R
-Y) are supplied separately, and their input color difference signals are clocked by the clock generator 8 as described above.
．． After sampling at a sampling frequency selected to be 25 MHz, the signal is quantized using an 8-bit quantization number and converted into a digital color difference signal having 114 (=456/4) sampling points per scanning line. The memories 10 and 11 write the digital color difference signals taken out from the AD converters 5 and 6 for one frame (572 effective scanning lines) or one field according to the write control signal from the memory write controller 13. The sampling frequency is set to 44.1kHz (or 47kHz) by the output readout control signal of the memory read controller 14.
25 kHz) and read out as first and second digital color difference signals with a quantization number of 8 bits.

Here, the luminance signal, color difference signal (B-Y) and (R-
Y) is transmitted for one frame or one field, but
When playing back with a low-cost consumer digital signal playback device that only has frame memory, or when performing fast-forward playback even with a digital signal playback device that has frame memory, the first field (odd field) and the second field (
Since only the signal component of one of the fields (even fields) is stored in the memory and played back, it is natural that one frame is transmitted and compared to the played back image (frame image), the vertical Resolution decreases. For this reason, the diagonal lines displayed in the frame image as shown in FIG. As shown in FIG. 3B, the diagonal lines become step-like. In addition, the thickness of the horizontal line of the image becomes non-uniform in the field image. For example, when the frame image has horizontal lines with different thicknesses and positions as shown in Figure 3 (A), the field image is ), differences in thickness and position tend to be displayed as emphasized horizontal lines, which is a problem especially when displaying kanji on the screen.

Therefore, in the present invention, in order to suppress the decrease in the vertical resolution of the field image, taking into account playback by a digital signal playback device having only the above-mentioned field memory and field image playback by fast-forward playback, the following formula is used to The digital video signal of one field is attenuated and mixed with the digital video signal of the other field and recorded.

L2n+1'=L2n/4+L2n+1/2+L2n+
2/4L2n'=L2n-1/4+L2n/2+L2n
+1/4 However, in formulas (1) and (2), L2n (n is a natural number) is the pixel data of the 2nth scanning line from the top on the screen, and the odd-numbered scanning line is the first field. Assuming that the even-numbered scanning lines indicate the scanning lines of the second field, L2n indicates the pixel data of the scanning lines of the second field. Further, L2n+1 indicates the pixel data of the scanning line of the first field displayed next to the pixel data L2n of the scanning line of the second field on the screen. Therefore, (
1) As is clear from the formula, the pixel data L2n+1 of the first field of the 2n+1st scanning line is multiplied by 1/2, and the 2nth and 2nd pixel data displayed above and below it on the screen are
Pixel data L of the second field of each n+2 scanning line
By adding the pixel data obtained by multiplying 2n and L2n+2 by 1/4, respectively, the pixel data L2n+1 of the third field to be displayed on the 2n+1st scanning line on the screen is obtained.
' is generated. Similarly, equation (2) is calculated using pixel data that is 1/2 times the pixel data L2n of the second field, and pixels of the first field of each of the 2n-1st and 2n+1st scanning lines displayed above and below it on the screen. Data L2n-1・L2n
This indicates that pixel data L2n' of the fourth field to be displayed on the 2nth scanning line on the screen is generated by adding the pixel data obtained by multiplying +1 by 1/4.

Here, the damping ratio (mixing ratio) in equations (1) and (2) is 1/
2 can be obtained by shifting the pixel data by 1 bit in the LSB direction, and an attenuation ratio of 1/4 can be obtained by shifting the pixel data by 2 bits in the LSB direction (
Therefore, for example, 1/4L2n converts pixel data L2n into LS
It is obtained by shifting 2 bits in the B direction. ).

In this way, the third
, If the pixel data of the fourth field is displayed on the screen instead of the pixel data of the first and second fields, the outline of the boundary part will be replaced with the intermediate value, resulting in jagged edges (so-called " jaggies”) can be reduced. Furthermore, when a field image of only one of the third and fourth fields is viewed, it is actually viewed with an impression that is quite similar to a frame image, and the effect is extremely large.

Note that it is essentially up to you whether to perform matrix processing as shown in equation (1) or equation (2), that is, high-frequency component removal by image filtering in the vertical direction, on the playback device side or on the recording system. When the recording system is used as in the present invention, it is convenient for a low-cost digital signal reproducing apparatus that has only a field memory. However, in a high-end digital signal reproducing device that has a frame memory, the third field signal (or fourth field signal) from which the vertical high-frequency components have been removed and the normal second field signal (or When the signal of the first field is reproduced, the picture between the two fields is different and it appears as flicker, which is not desirable. However, when the recording medium on which the signal of the third and/or fourth field is recorded as in the present invention is reproduced. does not cause flicker even if played back as is, and the vertical resolution is slightly worse than when playing back the signals of the first and second fields, but if the signals of the third and fourth fields are played back, The above formula (1) and (
2) The mixing process shown in the formula is performed by the memories 9 and 10 shown in FIG.
and 11.

Memories 9, 10, and 11 each consist of a main memory, an auxiliary memory, and an arithmetic circuit, and store pixel data from the main memory of scanning lines to be mixed in the auxiliary memory, read out the data sequentially, and perform arithmetic operations on the arithmetic circuit. The above mixing process is performed by storing the data in the main memory again.

On the other hand, a signal enters the input terminal 16 every time the color image information to be recorded changes, and is supplied to the header signal generator 17. The header signal generator 17 generates a 16-bit header signal, which is a set of signals and codes forming part of the header, and supplies this to the memory 18. memory 1
8 transmits the header signal, for example, with a period of 684 word transmission periods and a sampling frequency of 44.1 kHz (or 47.25 kHz).
Hz), and the quantization number is 16 bits.

The switching circuit 15 switches the digital luminance signal from the memory 9, the first and second digital color difference signals from the memories 10 and 11, and the header signal from the memory 18 in a predetermined order, respectively. A digital video signal having a signal format as shown in FIG. 5 is generated and supplied to the digital recorder 19 where it is recorded. Note that a read control signal is output from the memory read controller 14 in synchronization with a clock signal from the digital recorder 19.

Next, the signal format of the above digital video signal will be explained in more detail. The digital video signal taken out from the switching circuit 15 is composed of a 12-word header portion and a 684-word component encoded video signal portion of 2H (H is a horizontal scanning period) that are alternately synthesized in time series. 1, and a signal transmission end signal (hereinafter also referred to as "EOD" signal) in the last word.
is added to the signal, and when image information for one frame is transmitted, H1 to H286 are added as shown in Figure 4.
(However, H3 to H286 are not shown) and some of the 286 headers of V1 to V286 (however, V3 to V285 are not shown).
(not shown) and EOD
A total of 199,05 consisting of one word of EOD signal shown in
A 7-word digital video signal is recorded.

Therefore, the digital video signal for one frame is
In addition to the above-mentioned digital audio disk, the eighth
If it is assumed that one word is recorded in one channel of 16-bit transmission line in one block of the signal shown in the figure, the signal period of this one block and the reciprocal value of the sampling frequency of the header signal are as follows. If they are selected equally, when the sampling frequency is 44.1 kHz, it will be transmitted in about 4.51 seconds, and when it is 47.25 kHz, it will be transmitted in about 4.21 seconds.

In each of the above header parts H1 to H286, a fixed pattern synchronization signal is arranged in the first word (one word consists of 16 bits), and the next word is arranged with the above-mentioned standard mode or high-speed signal. Specifies the image type identification code to identify whether the video is in resolution mode or run-length code, the code for converting the number of scanning lines, and whether the memory circuit in which data is written is a display-side memory circuit or a non-display-side memory circuit. A code, further a code indicating the amount of image information and other various image information, is arranged, and an address signal is arranged in the next third to sixth words.

Further, in the latter six words from the seventh word to the twelfth word, codes having the same contents as the first six words are arranged in the same arrangement. However, only the synchronization signal has a different value.

In this way, sending the header information twice is as follows:
Since there is no data correlation between adjacent words of the header signal, it is difficult to correct it when the contents of the header signal are not transmitted. Therefore, the video signal part immediately after cannot be captured, and the 2H worth of data is difficult to correct. Pixel data will be missing. Therefore, the information in the header section is sent twice,
Even if the first half header signal portion is not reproduced, pixel data is captured using the second half header signal portion. Of course, some information in the header is sent only once,
It may consist of 6 words.

Next, the signal formats of the video signal sections V1 to V286 shown in FIG. 4 will be explained. FIG. 5 shows an embodiment of the signal format of the video signal section V1.

In the figure, the vertical direction shows the pit arrangement, and the upper part shows the MS.
In B, the lower side indicates the LSB, and the horizontal direction indicates the time, which is the same as in FIG. As mentioned above, in each video signal section, the pixel data of the scanning line of one field among the pixel data L2n+1' and L2n+2' of the two scanning lines of the adjacent third and fourth fields is stored. The pixel data of the scanning line of the other field is placed in the lower 8 bits and transmitted. Therefore, the signal format of the first video signal portion V1 is as shown in FIG. 5, where the upper 8 bits of each word correspond to each sample of the first scanning line (first H of the third field) located at the highest position on the screen. A digital video signal sequence of points is arranged (that is, pixel data L1' (=L1) from the first row of pixels of a plurality of pixels arranged in a matrix to form one screen).
is arranged), and the lower 8 bits of each word contain the digital video signal sequence of each sample point of the second scan line (first H of the fourth field) (that is, the pixel group of the second row). The pixel data L2') from is arranged.

In addition, in Fig. 5, Y0-Y455 (however, Y10~
Y455 (not shown) indicates each arrangement position from the first sample point to the 456th sample point of the digital luminance signal of the first scanning line, and Y456 to Y911 (however, Y466 to Y911
(not shown) is the first digital luminance signal of the second scanning line.
Each arrangement position from the sample point to the 456th sample point is shown.

Also (RY)0~(RY)113, (B-Y)0~
(B-Y) 113 (Just R-Y) 22 ~ (R-Y)
113 and (B-Y)2 to (B-y)112 are not shown)
are the digital color difference signals of the second scanning line (R-Y), (B-
The respective arrangement positions from the 1st sample point to the 114th sample point 1 of Y) are shown. Furthermore, (R-y)114 to (R-y)2
27, (B-Y) 114 ~ (B-Y) 227 (However, (
R-Y) 114 to (RY) 227, and (B-Y) 11
6 to (B-Y) 226 (not shown) indicate the arrangement positions of the digital color difference signal (R-Y) of the second scanning line, from the first sample point to the 114th sample point of (B-Y). .

Therefore, the video signal portion V1 is 2H of the first and second scanning lines.
This unit consists of a group of pixel data of minutes, with six pixel data consisting of pixel data of four sample points of the digital luminance signal and pixel data of one sample point each of two types of digital color difference signals. It is a signal format that is repeatedly transmitted every time. Note that the other video signal sections V2 to V286 are also configured in the same signal format as the video signal section V1. Rather than arranging the pixel data of the same scanning line in the same word as shown in Fig. 6, the pixel data L2n+1' and L2n+2' of two adjacent scanning lines are divided into the same word as shown in Fig. 5. As described later, the number of scanning lines was changed from 625 to 5.
This is to facilitate conversion of the number of scanning lines in consideration of conversion to a 25-line system.

Furthermore, by simultaneously transmitting pixel data of two adjacent scanning lines in the same word, it is possible to reduce the number of times of memory writing and reading in the calculation for converting the number of scanning lines from a 625-line system to a 525-line system.

Note that the values of each word in the video signal portions V1 to V286 are as follows:
The value of each signal in the header part H1 to H286, and E
When it becomes equal to the value of the OD signal, it is changed to another value close to it.

Further, in the above embodiment, the signal format for transmitting one frame has been explained, but when transmitting one field, the signal of one of the third and fourth fields is The signal is transmitted in a signal format as shown in FIG. In this case, the pixel data of the n-th scanning line of the same field is arranged in the upper 8 bits of the same word, and the pixel data of the n+1-th scanning line is arranged in the lower 8 bits.

Next, a recording system for recording the above-mentioned digital video signal onto the above-mentioned digital audio disc will be explained.

Here, the digital video signal is transmitted on one or two channels out of a total of four transmission channels, and the digital audio signal is transmitted on the remaining channels, but as an example, the digital video signal is transmitted on one channel. I will explain it to you. For convenience of explanation, the digital audio task will be explained by taking as an example a static capacitance variable readable disc that was previously proposed by the present applicant.

FIG. 1 shows a block system diagram of one embodiment of the above recording system. In the figure, the same components as in FIG. 1 are designated by the same reference numerals. Reference numerals 30, 31, and 32 are input terminals into which three channels of analog audio signals are input separately, and the three channels of analog audio signals include a signal for central sound localization, so that in conventional two-channel stereo, Real image localization of the central sound source and expansion of the hearing amplification range, which could not be achieved previously, can be obtained. 33 is a start signal input terminal;
Reference numeral 34 is an input terminal for a cue signal generated each time the music program of the analog audio signals of the three channels is switched from the previous music program to another music program.

Here, suppose that a digital signal with a sampling frequency of 47.25 kHz and a quantization number of 16 bits is recorded in time series on one trunk for four channels as the information amount for one channel on a disk 40, which will be described later. , the above three-channel analog audio signal is sent to the AD converter 3.
5, each channel has a sampling frequency of 47.25k.
The signal as shown in FIG. 4 is sampled at Hz and converted into a 16-bit quantized digital audio signal (PCM audio signal), which is supplied to the signal processing circuit 37, and simultaneously reproduced by the digital recorder 19. A digital video signal in a signal format with a sampling frequency of 47.25 kHz and a quantization number of 16 bits is supplied to the signal processing circuit 37. Further, a control signal generating circuit 36 to which a start signal coming into the input terminal 33 and a cue signal coming into the input terminal 34 are respectively supplied generates a control signal having a configuration shown in FIG. 37. The control signal is used for purposes such as position control (random access) of the pink-up reproducing element, as will be described later.

The signal processing circuit 37 rearranges these 16-bit input digital signals and control signals of a total of four channels into serial data, which is parallel data.
The digital signals of each channel are divided into predetermined intervals, and the signals are interleaved and time-division multiplexed. Then, a recording signal is generated by adding an error code correction signal, an error code detection signal, and a synchronization signal bit indicating the start of a block (frame).

FIG. 8 is a diagram schematically showing an example of one block (one frame) of the recording signal generated as a result of the signal processing by the number processing circuit 37. One block is composed of 130 bits, and the number of bits is repeated. The frequency is the same as the sampling frequency 47.2
It is 5knz. SYNC is 10 indicating the beginning of the block
Fixed pattern of synchronization signal bits, Ch-1 to C
h-3 indicates the 16-bit digital audio signal of the three channels, and Ch-4 indicates the multiplexing position of one word of the 16-bit digital video signal reproduced from the digital recorder 19. Furthermore, P and Q shown in FIG. 8 are 16-bit error code correction signals, for example, P=W1■W2■W3■W4(3) Q=T4・W1■T3・W2・T2・W3■T・W4(
4) is a signal generated by the following equation. However, (3
), (4) where W1, W2, W3, W4 are Ch-1 to C
h-4 16-bit digital signals (usually digital signals in different blocks), T is an auxiliary matrix of a predetermined polynomial, and ■ indicates modulo-2 addition for each corresponding bit.

Furthermore, in FIG. 8, CRC is a 23-bit error code detection signal, and Ch-1 to Ch-4, which are arranged in the same block,
For example, each word of P and Q is X23+X5+X4+x+1
This is the 23-bit remainder obtained when dividing by the generator polynomial, and when the signal from the 11th bit to the 129th bit of the same block is divided by the generator polynomial during reproduction,
When the resulting remainder is zero, it is used to detect that there is no error. Furthermore, in Figure 3, Adr
is the control signal, and each bit data is distributed and transmitted one bit in one block. For example, all bits of the control signal are transmitted by 126 blocks (that is, the control signal is composed of 126 bits). . Therefore, when the rotational speed of the disk 40 is 900 rpm, 3150 blocks are recorded and reproduced per one rotation of the disk, so the above 126-bit control signal is 2 times per rotation of the disk.
It will be recorded and played back five times.

FIG. 9 schematically shows an example of the structure of the above control signal.

The total 126-bit control signal is composed of a 42-bit first chapter code CP-1, a 42-bit second chapter code CP-2, and a 42-bit time code TC. The first chapter code CP-1 is 1
Adds the 7-bit synchronization signal, 4-bit mode signal, 8-bit chapter signal, 12-bit chapter local address, and signal pits from the mode signal to the chapter local address modulo 2. It consists of a 1-bit parity code obtained by
The second chapter code CP-2 also has the same configuration and the same values as the first chapter code CP-1 except for the value of the synchronization signal. The above mode signal is a signal indicating the type of 4-channel digital signal recorded on the disc 40. For example, when it is "1100", 3-channel digital audio signal and 1-channel digital video signal are recorded. "11
When "01", a 4-channel digital audio signal is recorded, when "1110", two types of 2-channel digital audio signals are recorded, and when "1111", a 2-channel digital audio signal and a digital audio signal are recorded. Indicates that the video signal is recorded in two channels.

The chapter signal is a signal indicating the number of the recorded music program from the signal recording start position on the disc 40.

The time code TC shown in Figure 9 is composed of, for example, the same 17-bit signal and the first and second chapter codes CP-
1. Similar to the mode signal in CP-2, 4 indicates the type of 4-channel digital signal recorded on the disk 40.
A bit mode signal, a total of 16 bits of time identification code indicating the position of the recorded music program on the disk 40 in terms of the total time from the signal recording start position, and a time identification code of 16 bits that increases by 1 for each revolution of the disk 40 and is set to "0". It consists of a 4-bit track number code indicating a value of ~14 in binary code, and a 1-bit parity code. The above time identification code is expressed in minutes and seconds, and its minimum unit is 1 second. However, if the disk 40 rotates at 90 rpm, it will rotate 15 times per second, so the time identification code Even if the codes have the same value, the music program recording position can be identified every revolution of the disk 40 by the track number code.

A digital signal of 130 pits per block shown in FIG. 8 is sequentially extracted block by block from the signal processing circuit 37 in series, and is supplied to the next stage, the modulation circuit 38 shown in FIG. After being modulated using a modulation force formula of modulation (MFM), a carrier wave of, for example, 7 MHz is frequency-modulated to produce a frequency-modulated wave signal. This frequency modulated wave signal is recorded on the disk 40 by a recording device 39 using a laser beam or the like.

When the disk recording method previously proposed by the present applicant is applied, the above-mentioned recording device 39 can have a configuration as shown in FIG. 10. In the figure, a laser beam emitted from a laser light source 41 is removed by an optical modulator 42 to remove drift and noise, and then reflected by a reflecting mirror 43 and divided into two optical paths by a half mirror 44. . One of the divided laser beams is modulated in the optical modulator 45 by the output frequency modulated wave signal of the modulation circuit 38 from the input terminal 46 and a third tracking control reference signal fp3 to be described later, and becomes the first modulated light. It is considered to be a beam. The other divided laser beam is modulated in the optical modulator 47 by a first or second tracking control reference signal fp1 or fp2, which will be described later, which alternately enters each rotation period of the recording master 49 from the input terminal 48. and a second modulated light beam.

The first modulated light beam is reflected by a reflecting mirror 50, has its optical path changed, and passes through an information recording optical system consisting of cylindrical lenses 51 and 52, a slit 53, and a convex lens 54, and forms a rectangular shape on the recording master 49. The light is shaped into the following. On the other hand, the second modulated light beam is shaped into a circular light on the recording master 49 by a tracking recording optical system consisting of a convex lens 55, a slit 56, and a convex lens 57, and then its optical path is changed by a reflecting mirror 58.

The first and second modulated light beams, each shaped into a desired shape, are combined on substantially the same optical axis by a polarizing prism 59, pass through a half mirror 60, and have their optical paths changed by a prism 61. Furthermore, a slit 62 and a recording lens 6
3, on the recording master 49 on which a photosensitive agent layer 65 is formed on the glass substrate 64, the first modulated light beam is formed in a rectangular shape indicated by 66, and the second modulated light beam is formed in a circle indicated by 67. Focused irradiation is applied to the shape.

The recording master disk 49 is disk-shaped and rotates synchronously at a constant speed, and the light reflected from the half mirror 60 is applied to a signal monitoring system 68, and the light reflected by the prism 61 is applied to a monitoring optical system 69. Added. The distance between the two modulated light beams on the recording master 49 is measured by a monitoring optical system 69, and the deviation is monitored by a signal monitoring system 68, and the deviation is corrected by moving the cylindrical lens 51 vertically in the figure. Let's do it.

The recording master disc 49 is subjected to a known development process and a disc making process to create a stamper disc. On the disk 40 copied by this stamper board, the three channels of digital audio signals described above and the one channel digital video signal having the signal format shown in FIG. 4 or FIG. 5 are sequentially recorded in the signal format shown in FIG. 3. a spiral main track in which a frequency modulated wave of a signal synthesized in block units in time series is recorded as an intermittent bit string;
Approximately midway between each track center line of adjacent main tracks, first and second burst-shaped bursts of a single frequency, which are in a band lower than the band of the frequency modulated wave, are arranged alternately for each rotation period of the disk. 2 tracking 1 ring control reference signal fp
A sub-track is formed by a bit string in which fp1 and fp2 are intermittent, and a third tracking control reference signal fp3 is recorded in the main trunk at the switching connection portion of fp1 and fp2. Further, this disk 40 does not have a guide groove for tracking the reproducing needle, and has an electrode function.

As described above, according to the present embodiment, each of the 684 pixel data of one scanning line is a digital video signal of the third field and a digital video signal of the fourth field generated according to the equations (1) and (2). A video signal is recorded on a disk in time series along with a digital audio signal at a lower sampling frequency.

Next, a description will be given of an apparatus for reproducing digital video signals recorded on the disc 40 according to the method of the present invention. 11th
The figure shows a block diagram of an example of a digital signal reproducing device. In the figure, a disk 40 is placed on a turntable (not shown) and rotated synchronously at 800 rpm. As shown in FIG. 12, on the disk 40, there is a main track with a track width Tw and a track pitch Tp, in which a flat surface 70 and a bit 71 are repeated, and a flat surface 70.
and a pit 72 are repeated, and a tracking control reference signal fp2 recording sub-track is formed by repeating a flat surface 70 and a pit 73, respectively. As described above, the bottom surface 74b of the playback needle 74 is made to slide on the surface of the disk 40.

As shown in FIG. 11, the regeneration needle 74 is fixed to one end of a cantilever 75, and a permanent magnet 76 is fixed to the base side of the other end of the cantilever 75. cantilever 7
The part to which the permanent magnet 76 of No. 5 is fixed is a tracking coil 77 and a jitter correction coil 7 fixed to the playback device.
It is surrounded by 8. The tracking coil 77 generates a magnetic field in a direction perpendicular to the magnetic field direction of the permanent magnet 76, and moves the cantilever 75 in one direction along the track width according to the polarity of the tracking error signal from the tracking servo circuit 79. , and displace it by a displacement amount corresponding to its size.

The resonant frequency changes in response to the capacitance formed between the disk 40 and the electrode 74a shown in FIG. A resonant circuit, a circuit that applies a constant frequency to this resonant circuit, a circuit that amplitude-detects a high-frequency signal whose amplitude changes according to the change in the capacitance from the resonant circuit, and a circuit that detects the amplitude of a high-frequency signal whose amplitude changes according to a change in the capacitance. A high-frequency reproduction signal extracted from a pickup circuit 80 comprising a circuit for pre-amplifying a reproduction signal (reproduction signal) is supplied to an FM demodulation circuit 81, where the main information signal of the main track (in this case, a digital audio signal and The sequentially synthesized digital video signals are respectively demodulated, while a portion is branched and supplied to the tracking servo circuit 19.

The tracking servo circuit 79 detects the first signal from the reproduced signal.
to 30th tofucking control reference signals fp1 to fp5
are frequency-selected and extracted, and both reference signals fp1 to fp3 are extracted.
A tracking error signal obtained by differentially amplifying the envelope detection output is output to the tracking coil 77. However, since the recording positional relationship of fp1 and fp2 with respect to the main track is switched every rotation period of the disk 40, the tracking polarity is changed to one on the disk 40 by the switching pulse generated based on the detection output of the tracking control reference signal fp3. Switched every rotation cycle. Note that when a kick instruction signal is received at the input terminal 82, the tracking servo circuit 79 drives the tracking coil 77 so as to forcibly move the playback needle 74 in the track width direction by one track pitch or more. do.

On the other hand, the demodulated digital signal taken out from the FM demodulation circuit 81 is applied to the decoder 83, where it is MPM-decoded and converted into a time-series threat signal in the signal format shown in FIG. The beginning of a signal block is detected and converted into a serial signal into a parallel signal, and further error detection is performed. Only when an error is detected, the error code correction signals P and Q are used to correct and restore the error signal. In this way, each of the three channels of the 16-bit 4-channel digital signal is corrected and restored as necessary to be error-free and returned to the original order before the signal arrangement was interleaved. The 16-bit digital audio signal is converted into an analog audio signal by a DA converter in the decoder 83, and then outputted to output terminals 84, 85 and 86, respectively. Further, the pickup control signal is output to a predetermined circuit (not shown) for high-speed position search and the like.

On the other hand, the digital video signal having the signal format shown in FIG. 4 (and further shown in FIG. 5), which is reproduced in chronological order on the fourth channel, is supplied to the scanning line number conversion circuit 87 shown in FIG. Here, the number of scanning lines is converted from 625 lines to 525 lines. FIG. 13 is a diagram schematically showing how the number of scanning lines is converted. In the figure, Y0 is the pixel data of the first sampling point of the digital luminance signal of the first scanning line of the 625 scanning line system as shown in Fig. 5, and Y456 is the digital luminance of the second scanning line. The pixel data of the first sample point of the signal is shown. As can be seen from FIG. 5, at the beginning of the video signal section V1, the above pixel data Y0 and Y456 are
is transmitted, but the data obtained by multiplying this pixel data Y0 by 3/4 (this is the data obtained by shifting Y0 in the direction of 1 bit LSB and the data obtained by shifting Y0 in the direction of 2 bits LSB) are added. ) and pixel data Y4
The pixel data Y0' of the first sampling point of the first scanning line of the digital luminance signal of the 525 scanning line system is obtained by mixing 1/4 times the data obtained by shifting 56 by 2 bits in the LSB direction.
is generated, while data 1/2 times the pixel data Y456 is stored in the auxiliary memory (one line memory) 103. Hereinafter, in the same manner as above, the pixel data of each sample point of the first scanning line of the 625 scanning line method is multiplied by 3/4, and the pixel data of each sample point of the second scanning line is multiplied by 1 The data obtained by multiplying by /4 are mixed at sample points in the same word, and converted into pixel data of the first scanning line of the 525 scanning line system.

The pixel data of each sample point of the third scanning line of the 625-scanning line system of the video signal V2 that is subsequently reproduced is 1/2 times (L
(obtained by shifting 1 bit in the SB direction)
After that, it is mixed with the pixel data read out from the auxiliary memory 103 of the same sample point and is used as the second data in the 525-scanning method.
It is converted into pixel data of scanning lines. Y912 is the first digital luminance signal of the third scanning line of the 625 scanning line output type.
The pixel data of the sampling point Y456' indicates the pixel data of the first sampling point of the digital luminance signal of the second scanning line of the 525 search line method. Also Y1368, 1824, Y2
280 is the pixel data of the digital luminance signal with 625 scanning lines, Yl368 is the first sampling point of the fourth scanning line, Y1824 is the first sampling point of the fifth scanning line, Y2280
indicates pixel data of the first sample point of the sixth scanning line. Further Y
912', Y1368, Y1824' each have 5 scanning lines
Y
912' indicates the first sampling point of the third scanning line, Y1368' indicates the first sampling point of the fourth scanning line, and Y1824' indicates the pixel data of the first sampling point of the fifth scanning line.

As shown in Figure 13, the number of scanning lines such as Y912 is 62.
The pixel data of each sample point on the third scanning line of the 5-line method is halved.
The multiplied data is mixed with the data obtained by multiplying the pixel data of each sample point of the fourth scanning line by 1/2 such as Y1368, and
While the pixel data of each sample point of the third scanning line of the 525 scanning line system such as 912' is obtained, the latter data is stored in the auxiliary memory (one line memory) 104. Similarly, the pixel data of each sample point of the fifth scanning line such as Y1824 is multiplied by 3/4, and then mixed with data obtained by multiplying the pixel data of the same sample point read from the auxiliary memory 104 by 1/2. The pixel data of the fourth scanning line such as Y1368' of the 525 scanning line system is obtained, and the pixel data of the sixth scanning line such as Y2280 is directly used as the pixel data of the fifth scanning line of the 525 scanning line system. It is said that Thereafter, the same operation as above is repeated, and the pixel data of the 6 scanning lines of the 625 scanning line system is mixed at a predetermined mixing ratio, and the pixel data of the 5 scanning lines of the 525 scanning line system is mixed. will be converted into.

Here, as is clear from the above description, the auxiliary memories 103 and 104 used in the calculation of scanning line number conversion are a common 1-line memory that is used in turn. on the other hand,
As mentioned above, the number of sample points (number of pixel data) of the digital luminance signal is expressed as the product of 456 sample points per horizontal scanning line and 572 effective scanning lines, which is 260,832. , the number of bits of four 64kRAMs is 26
Since it is 2,144 (=216X4) bits, 131
This means that there is a margin of 2 bits. That is, four 6
The 4kRAM has an extra memory capacity that can store each 1 bit of pixel data of sampling points of digital luminance signals for 2H or more, so this is stored in the auxiliary memory 103 described above.
and 104. Note that the reading and writing of the auxiliary memories 103 and 104 are performed within the horizontal blanking period of the standard television system (NTSC system here) color video signal taken out from the output terminal 102.

In this way, the scanning line number conversion circuit 87 converts the number of scanning lines to 6.
This circuit converts pixel data of the 25-line system into pixel data of the 525-scanning line system, and since the pixel data is transmitted in the format shown in FIG. 5, the conversion operation is easy. This scanning line number conversion circuit 87 is a circuit necessary only for a playback device that reproduces and outputs an analog color video signal compliant with the NTSC system as shown in FIG. This circuit is unnecessary for a playback device that plays back and outputs an analog color video signal based on the . However, depending on the playback device, a changeover switch is provided to change the input/output of the scanning line number conversion circuit 87, and the circuit 87 is switched to be activated or deactivated depending on the number of scanning lines of the television system to be reproduced. Good too. The output pixel data of the scanning line number conversion circuit 87 is supplied to a memory 94 or 95 by a switch circuit 88.

Furthermore, the friend digital video signal is sequentially and chronologically extracted from the decoder 63 in the signal format shown in FIG.
The signal is also supplied to a synchronizing signal detection circuit 89, a header signal detection circuit 91, and a memory write controller 92, respectively. The synchronization signal detection circuit 89 detects the synchronization signal in the header signal! and supplies the detection signal to the control circuit 90. Further, the header signal detection circuit 91 discriminately reproduces each code and address signal other than the synchronization signal in the header signal, and the control circuit 91
supply to

The control circuit 90 is supplied with the synchronization signal detection signal and each code detection signal of the header signal, and furthermore, the control circuit 90 is supplied with the above-mentioned synchronization signal detection signal and each code detection signal of the header signal. When an image is stored, a signal specifying the image (which can be arbitrarily selected) is supplied from the input terminal 93, and these input signals are discriminated and decoded to the scanning line number conversion circuit 87 and the switch circuit 8.
8. Controls the memory write controller 92, switching circuit 97, etc. The memory write controller 92 causes pixel data in the digital video signal supplied to the memory 94 or 95 to be written to a predetermined address based on the address signal in the header signal, but not to write the header signal and the EOD signal. Control. switch circuit 88
is switched to terminal a or b by a control signal from the control circuit 90 based on the memory write designation code in the header signal, and supplies the digital video signal to the memory 94 or 95 designated by the memory write designation code.

The memories 94 and 95 store one frame of reproduced pixel data written based on the read control signal from the memory read controller and synchronization signal generation circuit 96, or reproduced pixel data written for one field each for a total of two fields. In addition to simultaneous readout, jitter associated with playback is also corrected. Here, the digital luminance signals read from the memories 94 and 95 have a sampling frequency of 9 MHz,
The first and second digital color difference signals are each read out with a sampling frequency of 2.25 MHz and 8 bits of quantization, and are supplied to a switching circuit 97, respectively.

Next, the configuration and operation of the memories 94 and 95 will be explained in more detail. FIG. 14 shows a block diagram of an example of the memories 94, 95 and a part of the memory write controller 92. Also, a part (auxiliary memory) of the scanning line number conversion circuit 187 can be included in this. In the same figure, M11
,M21,... M61, M12, M22,..., M6
2, M13, M23,..., M63,..., M16,..., M
66 are 64k bits of RAM each, totaling 36
These RAMs are supplied with address signals from a common address signal generation circuit 105 within the memory write controller 92. When the memories 94 and 95 are frame memories, a total of two sets of 36 RAMM11 to M66 are required, but when they are field memories, one set is sufficient. Although not shown, the upper 8 of each word of the video signal portion of the signal format shown in FIG. 5 after passing through the switch circuit 88
A first buffer memory stores a group of pixel data transmitted in bits in units of 6 words of pixel data, and a second buffer memory stores a group of pixel data transmitted in lower 8 bits in units of 6 words of pixel data. ing.

Further, S1, S2, S3, ..., 86 are supplied with pixel data from the first and second buffer memories, and are six-contact changeover switches (actually analog switches that operate electrically) that selectively output the pixel data. ), S1 is RAMM11,
The MSB of pixel data is supplied to one of the RAMs M12, . . . M16. Similarly, selector switch B2
〜B6, Bi (however, i=2 to 6) is RAMM
Which one of ij (j=1 to 6) is the RAM
The i-th high-order bit of pixel data is supplied to . Therefore, in the memory circuit shown in FIG. 14, the lower two bits of the 8-bit pixel data are discarded, but their shadowing on the reproduced image does not pose much of a problem. Of course, all 8 bits of pixel data may be stored by adding 12 more 64kRAMs, but as a consumer digital video signal reproducing device, it is better to use a memory circuit with the configuration shown in Figure 14. It is advantageous in terms of price.

Next, to explain the operation of the above memory circuit, first, the hexadecimal value from the address signal generation circuit 105 is "00".
The 16-pit address signal “00” is the RAMM11
~M66, respectively. On the other hand, selector switch B1~
RAMM11, M21, M31, M4 through B6 respectively
1, M51, and M61 are supplied with the upper six bits of pixel data Y0 shown in FIG. As a result, RAMM11
The MSB data of Y0 is at the address "0000" of M
The data of the second most significant bit of Y0 is stored at address "0000" of No. 21, respectively. Similarly, the data of the 3rd, 4th, 5th, and 6th high-order bits of Y0 are stored at address "0000" of M31, M41, M51, and M61, respectively.

Next, leave the value of the address signal as it is and switch S1~
S6 is switched, and the upper 6 bits of pixel data Y1 are R.
AMM12, M22, M32, M42, M52 and M6
2 is supplied one bit each, and its address “000
0". Thereafter, in the same manner as above, the value of the address signal is left as is, and the changeover switches B1 to B
6 are switched sequentially, RAMM16, M26,
Hexadecimal values of M36, M46, M56 and M66
When the upper 6 bits of pixel data (B-Y) 0 are stored bit by bit at the address "0000", the address signal generating circuit 105 then outputs the hexadecimal value "0000".
An address signal indicating the address "001" is output, and the address signal "001" of RAMM11 to M66 is output in the same manner as above.
01'', pixel data Y4, Y5, Y6, Y7, (R-
Y)1 and (B-y)1 are stored one bit at a time. Thereafter, the same operation as above is repeated, the address increases by 1, and the pixel data group of the first scanning line is stored in the RAMM11.
.about.M66, an address signal having the value "0072" in hexadecimal notation is generated from the address signal generation circuit 105, and the second scanning line shown in FIG. 5 is generated through the changeover switches B1 to B6. Pixel data Y of the first sample point of
The upper 6 bits of 456 are RAMM11, M21, M31
, M441, M51 and M61 one by one and stored. After that, the changeover switches S1 to S6 are changed while the value of the address signal remains unchanged, and the upper 6 bits of the pixel data Y457 are changed to RAMM12, M22, . . .
Applied to M62. As a result, the MSB data of pixel data Y457 is written to address "0072" of RAMM12, and the second bit, third bit, ..., of Y457 are written to address "0072" of RAMM22, M32, ..., M62, respectively. The data of the 6th bit is written. Thereafter, the address is incremented by 1 in the same manner as described above, and writing of one data group of pixels of the second scanning line is completed. The pixel data of the S word from the beginning of the third scanning line is 1.
The pixel data of the first six words of the fourth scanning line is written to the address of hexadecimal value "00E4", and the pixel data of the first six words of the fourth scanning line is written to the address of hexadecimal value "0156".

In this way, pixel data for one frame or one field is written into the memories M11 to M66 for two fields, but among the pixel data transmitted in six consecutive words, the pixel data for the same scanning line is Six pixel data (consisting of four pixel data of digital luminance signal and one pixel data of two types of digital color difference signals) are stored in 36 RAMMs.
It is written to the same address from 11 to M66. Here, since the memory circuit shown in FIG. 14 is driven by the same address signal, writing and reading must be performed in a time-division manner. Specifically, the read control signal from the memory read controller and synchronization signal generation circuit 96 shown in FIG.
), reading from RAMM11 to RAMM66 is performed, writing is performed within a horizontal blanking period (approximately 13 μsec), and reading and writing from the auxiliary memory for scanning line number conversion are performed.

Further, by reading out RAMM11 to M66, the above-mentioned six pixel data at the same address are read out simultaneously.

Returning to FIG. 11 again, the read pixel data of one of the memories 94 and 95 configured as shown in FIG. The selected output is
The pixel data of the digital luminance signal is supplied to the DA converter 98, and the pixel data of the two types of digital color difference signals are supplied to the DA converter 98.
The signals are supplied to converters 99 and 100, respectively. Here, the switching circuit 97 selects and outputs the readout output of one of the memories 94 and 95 from the memory that had been selectively outputting the readout output of the other memory in accordance with the switching control signal supplied when the EOD signal is detected. can be switched to

The analog luminance signal taken out from the DA converter 98 and the D
Nine color difference signals (B
-Y) and (R-Y), horizontal and vertical synchronization signals and color burst signals taken out from the memory read controller and synchronization signal generation circuit 96 are respectively supplied to the encoder 101, and the color burst signals conform to the NTSC system. After being generated as a video signal, it is outputted from the playback output terminal 102 to a color television receiver for monitoring (not shown), where the audio signal is outputted from the output terminals 84, 85, and 86 and reproduced to be heard. The images are displayed as color still images or partial moving images as supplementary information for people's music appreciation.

As can be seen from the explanation in FIG. 14, if each pixel data is composed of n bits, the memories 94 and 95 can be constructed using (4+1+1)Xn number of 64 kRAMs. If it is acceptable to lower the resolution of (4+1), the color contrast signals (R-Y) and (B-Y) are taken into the memories 94 and 95 in line sequential order.
Xn, that is, when n is 6 bits, 30 64kR
The memories 94 and 95 can be configured with AM.

Furthermore, since 256 kRAM has 282,144 (=218) bits, it is preferable that one frame of one bit signal can be written in one RAM. In this case, although it depends on the read speed of the RAM, if the read speed is slow, there is also a method of configuring it as a 2-frame memory circuit and using the two RAMs in a time-sharing manner. Furthermore, the digital color difference signal is read out from the memory 94 at 1/4 of the readout speed of the digital luminance signal.
, 95, one RAM can be used for two types of digital color difference signals in a time-division manner.

Note that the above explanation has been about image transmission in standard mode, but when transmitting high-definition, high-quality images, or when transmitting moving images using run-length codes, the image type provided in the header signal The value of the identification code is discriminated and reproduced, and the output signal of the control circuit 90 controls the scanning line number conversion circuit 87 and the memory write controller 92 as necessary to select the format for loading into the memories 94 and 95.

Further, when the memories 94 and 95 are respectively field memories, the reproduced digital video signal of the third field and the digital video signal of the fourth field are the same as the digital video signal of one of the fields. Of course, it is written in . In this case, only the upper 8 pins or lower 8 bits of pixel data of each word in the signal format shown in FIG.
4,95 will be written n.

In addition, in the above explanation, the case where it is applied to the disk recording method and nose tip device proposed earlier by the present applicant has been explained, but it is not limited to this, and the capacitance change reading type that has a tracking guide groove is used. The present invention can also be applied to disks and disks in which previously recorded signals are read out using a light beam. In addition, the television receiver has R, G,
If it has three primary color signal input terminals of B, encoder 1
01 is replaced by a matrix circuit, which converts the luminance signal Y and color difference signals (RY) and (B-Y) into three primary color signals R, G, and B and supplies them to the above input terminals separately. This allows the television receiver to display extremely high quality still images. Furthermore, the color difference signals recorded on the disk 40 are (G-Y) and (
It may be a combination with R-Y) or (B-Y), and furthermore, I
Of course, it may be a signal, a Q signal, or a three primary color signal.

As described above, the digital video signal recording method according to the present invention is based on the digital video signal of the first field and the digital video signal of the second field, which are obtained by digital pulse modulation of the analog video signal for one frame. , the pixel data of the digital video signal of the first field is attenuated and mixed with the pixel data of the digital video signal of the second field at a relatively large attenuation ratio to generate the digital video signal of the third field; 2
The first pixel data of the digital video signal of the field
The pixel data of the digital video signals of the fields are attenuated and mixed at a relatively large attenuation ratio to generate the digital video signal of the fourth field, and the pixel data of the digital video signals of the fields are attenuated with a relatively large attenuation ratio and mixed to generate the digital video signal of the fourth field, Since the digital video signals of both fields are recorded on the recording medium, the recording medium can be played back by a playback device having a field memory as a memory circuit for storing digital video signals in the playback device, or a playback device having a frame memory. Even with a playback device, it is possible to reduce the decrease in vertical resolution of the field image displayed on the screen when playing back in fast forward, and it is also possible to prevent jaggies, because the digital video signal that has been vertically filtered in advance is recorded on the recording medium. This is advantageous in a playback device that has only the field memory because it does not require the above-mentioned filtering circuit, and in a high-end playback device that has a frame memory, the digital video signals of the third and fourth fields can be used as they are. It can be played back properly without causing flicker, and therefore the first
This eliminates the need for a circuit for restoring the digital video signals of the third and fourth fields to the digital video signals of the first and second fields, which are to be displayed with three adjacent scanning lines. 1/2 the pixel data of
Since it is generated by multiplying or 1/4 times and mixing them, it has many advantages such as being simple because calculations can be performed only by bit shifting.

[Brief explanation of drawings]

FIG. 1 is a block system diagram showing an embodiment of the main part of the system of the present invention, FIGS. 3
FIGS. 4A and 5B are diagrams showing other examples of frame images and field images, respectively. FIG. 4 is a diagram showing a signal format of an embodiment of a digital video signal to be recorded according to the present invention. This figure shows the signal format of one embodiment of the video signal section in FIG. 4, FIG. 6 shows another example of the signal format of the video signal section, and FIG. FIG. 8 is a diagram showing an example of the signal format of one block previously proposed by the applicant to which the method of the present invention can be applied, and FIG. FIG. 10 is a system diagram showing an example of the recording device in FIG. 7 proposed earlier by the applicant, and FIG. 11 is an example of a digital signal reproducing device. The block system diagram shown in Figure 12 is
FIG. 13 is a partially enlarged perspective view showing an example of the sliding situation between the playback needle and the disc-shaped recording medium in the figure, FIG. 13 is a diagram for explaining an example of the conversion operation of the scanning line number conversion circuit, and FIG. FIG. 12 is a block system diagram showing an example of the configuration of a memory, etc. in FIG. 11; 1... Video signal source, 2... TV synchronization signal generator,
3... Matrix circuit, 4, 5, 6, 35... AD
Converter, 9-11, 18... Memory, 15, 97... Switching circuit, 11... Header signal generator, 19... Digital recorder, 30-32...
- Analog audio signal input terminal, 36... Control signal generation circuit, 37... Signal processing circuit, 39... Recording device, 40... Disc-shaped recording medium (disc), 41.
... Laser light source, 42, 45, 47... Optical modulator,
74... Regeneration needle, 74a... Electrode, 76... Permanent magnet, 79... Tracking servo circuit, 80...
Pickup circuit, 83... Decoder, 84-86.
...Analog audio signal output terminal, 87...Scanning line number conversion circuit, 88...Switch circuit, 90...Control circuit, 91...Header signal detection circuit, 92...Memory write controller, 96...・・Memory read controller and synchronization signal generation circuit, 98 to 100...D
A converter, 101... Encoder, 102... Analog video signal output terminal, 103, 104... Auxiliary memory, 105... Address signal generation circuit, M11-M
66...64kRAM S1~S6...Selector switch. Fig. 1 fAl Fig. 2 (8) Fig. 3 fAl (31 1 ■■ ■1-■ Fig. 6 Fig. 13 Fig. 4 Fig. 5 ■ 473- Fig. 7 Fig. 8 Fig. S 9th factor 10 Continuation of Figure ti, page 1 0 Author: Mitsuo Kubo, Japan Victor Co., Ltd., 3-12 Moriyacho, Kanagawa-ku, Yokohama 0 Author: Yoshiaki Amano, 3-12 Moriyacho, Kanagawa-ku, Yokohama City, Japan Victor Co., Ltd. 0 of these inventions Author: Hikaru Kikuchi, 3-12 Moriyamachi, Kanagawa-ku, Yokohama City, Japan Victor Co., Ltd. Amendments to proceedings May 168, 1980 Kazuo Wakasugi, Commissioner of the Tokugawa Agency 1, Case number 1988 Patent Application No. 77874 No. 2, Name of the invention Digital video signal recording system 3, Supplement i1 Patent applicant address 3 Moriya-cho, Kanayō-ku, Yokohama-shi, Kanagawa 221
12-chome Name (432) Victor Japan Co., Ltd. Representative Director and President Michi Shishi - Department 4, Agent Address 5-7-6 Kojimachi, Chiyoda-ku, Tokyo 102 Detailed description of the invention in the specification subject to amendment column. 7. Contents of correction (1) In the specification, page 49, line 11 to line 14, 1-pixel data group...r I 1 to be stored 1st pixel data group to be stored 1 minute pixel data group A buffer memory is used to store a group of 111 pixel data transmitted in ζ-order 8 bits.'' (2) Same, page 50, line 13 [For explanation, 4 is corrected as follows. [explain. However, for convenience of explanation, the digital video A signal that is directly reproduced without passing through the scanning line number conversion circuit 87 is stored in the memory'! 4.95, which allows PAt method or 5
A case of a playback device that plays back and outputs an analog color video signal conforming to the ECA/M system will be described. 1□
"・3 left"]', l 50 W j,,! ,,21”-′
"""°゛-one" and "switching...-1 and [1st
1 can be inserted from the buffer memory of . (4) l1jl, page 51, line 12-131
1' MI6, M2R,..., and M661 of [M13~・M65°M14~M64. M15~M65
and MI6 to M66”. (5) In the same page, page 51, lines 14 to 16, "pixel data . . . once stored" is corrected as follows. [Pixel data Y2, Y3 (RY)Ol(B -Y
) 0, t, l 6 bits] is stored one bit at a time, and writing of the first divided pixel data group (here, four luminance pixel data and two color difference pixel data) of the first scanning line is completed. . 6) On page 52, line 3, amend ``When the storage is finished'' to ``It will be stored for 1 time.'' ■ Insert [□ from the second buffer memory] between "...6 bits" and "rRAM..." on the 7th to 8th lines of page 52. Nido■ Same, 1st:'15. ．． 2nd page, 11th line 0 "pixel data" is corrected to □, [pixel data from second batu, fa memory]. \(
9) Same, page 52, line 19 to page 53, line 3 [3rd page]
Runsha line...written. Subtract 1 as follows: [Video signal sections V3, v4, v5, . . . are written in the same manner, and the 571st and 572nd scanning lines (7
(The last pixel data group of the 285th and 286th scanning lines in the case of - field forwarding is in RAM) Nodress rFE45J
and rFEB7-J' (r7 for field feed
E F9.1 and r7[5[3,I) stored in 1
Writing for one frame (or one field) is completed. ” (10) Same as above, “read out” from page 53, line 20 to page 54, line 4 is corrected as follows. [It is done. Further, when reading out the RAMs Mu to M-, the above-mentioned six pixel data at the same address are read out simultaneously, and the address is incremented by 1 from rooool. When the digital video signal from the decoder 83 is converted to the number of scanning lines by the circuit 87 and then written to the MET 94 or 95 in order to output an analog video signal based on the NTSC system. The write operation to the F memory circuit is the same as the above explanation except that the number of data is increased by 5/6 times, so the explanation will be omitted here. ”

Claims (2)

[Claims] (1) Pixel data of the first field digital video signal of the first field digital video signal and the second field digital video signal obtained by digital pulse modulation of one frame worth of analog video signal. The pixel data of the digital video signal of the second field is attenuated with a relatively large attenuation ratio and mixed, and the pixel data of the digital video signal of the second field is mixed.
In addition to generating a digital video signal of the field,
Attenuating and mixing the pixel data of the digital video signal of the first field with the pixel data of the digital video signal of the second field at a relatively large attenuation ratio to generate the digital video signal of the fourth field; A digital video signal recording method characterized in that a digital video signal of only one field or both of the third and fourth fields is recorded on a recording medium. (2) The digital video signal of the third field or the fourth field converts the pixel data of the first field to be displayed on the 2n-1st scanning line (where n is a natural number) from the top of the screen into L2n- 1 and the pixel data of the second field to be displayed on the 2nth scanning line below it is L2n, then the digital video of the silk 3 field to be displayed on the 2n+1st scanning line from the top of the screen. The pixel data of the signal is generated based on the formula L2n/4+L2n+1/2+L2n+1/4, and the pixel data of the digital video signal of the fourth field to be displayed on the 2nth scanning line from the top of the screen is L2n-1/ 4+L2n/2+L2n+1/4
The digital video signal recording method described in .