JPS58182981A - Digital signal reproducer - Google Patents

Abstract

PURPOSE:To simplify the memory circuits of a reproducer and to eliminate the shift in the words of a digital signal, by adding a header signal to a video signal including an address signal of a split digital picture signal and recording it, and reading out and discriminating the header signal at reproduction. CONSTITUTION:A matrix circuit 3 produces a luminance signal and color difference signals of each picture element forming one screen of a color TV signal from a video signal source 1 and the signals are applied to A/D converters 4- 6. The luminance and the color difference signals digitized by the converters 4- 6 are stored in memories 9-11 with a control signal from a TV synchronizing signal generator 2, the output is read out by a memory read controller 14 and applied to a switching circuit 15. A header signal from a header signal generator 17 is applied to the circuit 15 via a memory 18, and the header signal is added to the luminance and the color difference signals by the encoder of the reproducer for recording. The encoder of the reproducer discriminates the header signal and eliminates the effect due to the shift in the words of the digital signal.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a digital signal reproducing device, which reproduces a digital luminance signal which is a time-series composite signal of pixel data from each pixel arranged in a matrix and constitutes one screen; The color difference signal is divided into pixel data of pixel groups each having a predetermined number of adjacent rows or columns, and each divided signal is provided with a header signal (identification signal) having a synchronization signal and an address signal. By reproducing the recording medium on which the time-series synthesized digital video signal is recorded, it is possible to sequentially capture (write) the divided signals into the memory circuit using a circuit with a simple configuration. It is an object of the present invention to provide a digital video signal reproducing device capable of rewriting an image displayed in a portion or reproducing and displaying a partial moving image, and capable of reproducing a digital video signal with less influence of word shift in the digital video signal. do.

In recent years, video and audio signals have been converted to pulse code II.
Digital video signals and digital audio signals obtained by digital pulse modulation such as (PCM) are recorded on a disc-shaped recording medium (hereinafter referred to as "disc") as intermittent changes in bit strings, and changes in the intensity of light from the disc or Methods for reading and reproducing previously recorded signals by detecting changes in capacitance are being actively developed. Among these methods, a digital video signal related to color still image information is added to the digital audio signal as additional information. A recording method for digital audio discs is known in which recording is performed on the same track on the same disc.Usually, a plurality of music programs are recorded on the same disc surface of such a digital audio disc, and a color still disc is recorded in correspondence with each music program. A digital video signal between the image information is recorded, and when this disc is played back, the music program can be played back using a universal playback system.

On the other hand, since the television format for video signal playback is not universal worldwide, in order to be able to play video signals recorded on such discs in regions and countries with emerging television formats, it is necessary to Regarding video signals, it is necessary to convert them into a signal format that complies with the television system of the region or country in which they are to be played back and displayed. In particular, since the above-mentioned digital video signal concerns a color still image that plays an auxiliary role to aid the imagination of the listener who listens to the playback of the digital audio signal, the above-mentioned disc is compatible with the differences in television systems around the world. It is desirable to use a universal system regardless of the TV system and reproduce the signal format in accordance with each television system.

Therefore, in view of the above points, the present invention records a digital video signal based on a composite encoding method for a color still image, and also uses a predetermined header signal that can further correct a partial screen or reproduce a partial moving image. A digital video signal is reproduced from a recording medium in which data is recorded periodically in an optimal signal format based on a header signal, and one embodiment thereof will be described below with reference to the drawings.

First, the recording system for the digital video signal to be reproduced by the apparatus of the present invention will be described. FIG. 1 shows a block diagram of an example of the essential parts of the recording system for the digital signal. In the figure, reference numeral 1 denotes a video signal source such as a Schiller television camera, a flying spot scanner, or a VTR, to which a TV synchronization signal from a TV synchronization signal generator 2 is supplied as necessary, and a color still image to be recorded is generated. The three primary color signals are taken out and supplied to the matrix circuit 3. Matrix circuit 3 has 625 scanning lines and horizontal scanning frequency of 15.62
5kHz luminance signal Y, color difference signal (B-Y) and (R-
Y) and supplies these to AD converters 4, 5 and 6 separately. On the other hand, the output TV sync signal of the TV sync signal generator 2 is supplied to clock generators 7, 8, 12 and 13, respectively. Supplied.

The AD converter 4 receives a luminance signal Y with a band of about 4.5 MHz,
After sampling at a sampling frequency of 9 MHz using a 9 MHz clock from a clock generator 7, the signal is quantized using an 8-bit quantization number and converted into a digital luminance signal, and this signal is supplied to a memory 9. The 80 converter 5 converts one of the color difference signals (B-Y) and (R-Y) into a band approximately a fraction of the luminance signal by considering the well-known human visual characteristics.
B-Y) is sampled at a sampling frequency of 2.25 MHz based on a 2.25 MHz clock signal from the clock generator 8, and then converted into a digital color difference signal by converting it into a single child between 8 bits of quantization, and converting this signal into a digital color difference signal. is supplied to the memory 10. Further, the AD converter 6 converts the color difference signal (R-Y) into a digital color difference signal with a sampling frequency of 2.25 MHz and a quantization number of 8 bits, based on the clock signal from the clock generator 8, similar to the AD converter 5. This signal is then supplied to the memory 11.

The memory 9 writes the digital luminance signal for one frame, for example, in response to the output pulses of the memory write controller 12, and sequentially performs read operations in response to the output pulses of the memory read controller 14. The digital luminance signal supplied to this memory 9 is divided into four pixels per scanning line, for example, four
This is a digital luminance signal at 56 sample points (456 pixels in the horizontal direction). In other words, if a luminance signal with 625 scanning lines and a horizontal scanning frequency of t5.625kHz is sampled at a sampling frequency of 9MHz, 576 (=9x10/15625) sample points for one scanning line will be obtained.
Of the video signals shown in horizontal scanning period units in FIG. 2, the video period VT that actually includes image information is one horizontal scanning period (1H
), and on the other hand, since horizontal and vertical synchronization signals and color burst signals can be added in the playback device, digital luminance signals are stored in the memory 9 at 456 sample points in the first half video period VT. shall be supplied. Furthermore, the digital luminance signal read out from this memory 9 is a digital luminance signal regarding 572 scanning lines containing image information among the 625 scanning lines, and its sampling frequency is 94.5kHz (or 88.1kHz).
Hz), and the quantization number is 8 bits.

In addition, the digital color difference signals are written to the memories 10 and 11 based on the write control signals from the memory line 1 to the cogitator 13, for example, for frames, and the stored data is read out based on the output readout control signal of the memory read controller 14. It will be done. Since the sampling frequency of the digital color difference signals supplied to the memories 10 and 11 is 2.25 MHz, which is the same as that of the digital I1 degree signal, the number of sampling points per scanning line is 114 (-456/
4) digital signals, which are stored in memories 10 and 1.
1 to sampling frequency 94.5kHz (or 88.2k}
-1z) and are read out as first and second digital color difference signals with a quantization number of 8 bits. These first and J1!2 digital color difference signals are the same as the digital luminance signal.
Concerning image information of 72 scanning lines. Each output digital signal of memories 9, 10 and 11 is supplied to a switching circuit 15, respectively.

On the other hand, the input terminal 16 receives a signal generated each time the still image signal to be recorded is switched, and the header signal generator 1
7. As will be described later, the header signal generator 17 generates a 16-bit header signal that is a set of signals and codes that make up part of the header, and stores this in the memory 18.
supply to.

The memory 18 stores the header signal at a sampling frequency of 47.25 kHz (or 44 kHz), for example, with a period of 6 word transmission periods.
1kHz) Read with 16 bits of quantization and switch circuit 1
Supply to 5.

The switching circuit 15 switches each digital signal from the memories 9, 10, 11, and 18 in a predetermined order and outputs the signals shown in FIGS.
A digital video signal having a signal format as shown in the figure is generated and supplied to a digital recorder 19 where it is recorded.

Note that a read interval control signal is output from the memory read controller 14 in synchronization with a clock signal from one digital recorder.

Next, the signal format of the above-mentioned digital video signal will be explained in more detail. The digital video signal taken out from the switching circuit 15 is composed of a header part of 12 words and a composite encoded digital video signal part of, for example, 684 words of 2 to 1 minute (H is a horizontal scanning period), which are alternately arranged in time series. It is a signal that is synthesized in a single word, and a signal transmission end signal (hereinafter also referred to as rEOD signal) is added to one word of the most dominant part.When image information for one frame is transmitted, As shown in Figure 3, H1~
Some of the 286 headers of H286 (however, H3 to H286 are omitted from illustration) and ■1 to v286 (however, V3
A total of 199,057 words of digital video signals are recorded, consisting of 286 video signal sections indicated by .about.V285 (not shown) and an EOD signal of 1 gide indicated by EOD. Therefore, this one frame worth of digital video signal consists of one block of signals shown in FIG. 8, which will be described later.
When one word is transmitted on a 16-bit channel,
Since the signal period of this one block is selected to be equal to the reciprocal of the sampling frequency of the header signal, when the dehydration frequency is 47.25kHz, it is transmitted in approximately 4.21 seconds, and when the dehydration frequency is 44.1kHz, it is transmitted in approximately 4.21 seconds. It is transmitted in approximately 4.51 seconds.

An example of the signal format of the above header portions H1 to H286 is as shown in FIG. In the figure, the vertical direction shows the bit arrangement, the upper side shows the MSB (Most Significant Bit), the lower side shows the LSB (Least Significant Bit), and the horizontal direction shows time. ■ indicates the transmission time of one word. A synchronization signal 20 for indicating the start of the header signal is placed in the first word of the header signal, and its upper 8 bits are 1
The hexadecimal value is rFFJ, and the lower 8 bits are hexadecimal value rFEJ. Therefore, the synchronization signal 20
When expressed as a binary number, the upper 8 bits are all "1",
The lower 8 bits are "11111110".

Here, the values rFFJ and rFEJ of the synchronization signal 20 are:
This value is assigned only to the synchronization signal in the digital video signal, and when these values exist in the video signal portions V1 to V286, they are changed in advance to the value rFDJ in the recording system shown in FIG. This prevents the playback device described later from erroneously determining that the signal is a synchronization signal. In addition,
This value "1FF" indicates the brightest image data of the video signal, but normally this image data and rFEJ picture frame data, which is slightly darker than this, hardly appear, so even if these values are assigned to the synchronization signal 20, it is not practical. No problem.

Various identification codes are transmitted in the second word of the header signal following the synchronization signal 20 described above.

First, an image type identification code indicated by rMODEj is placed in the upper 4 bits. This code determines whether the digital video signal to be recorded is a standard still image (the above explanation for Figure 1 was based on the example of a standard still image) or a moving image based on a run-resigis code. , for example, high definition with 1125 scanning lines,
This is a code that indicates whether the image is a high-quality still image. Next, a transmission channel identification code indicated by rlP/2PJ is placed in the fifth upper bit. This code is a code that identifies which channel out of the four transmission channels described below, the digital video signal is transmitted.When the value is "1", it is transmitted on 1P, that is, the 4th channel. (In this embodiment, this case will be explained as an example), and in the case of rOJ, transmission is performed using 2P, that is, a total of two channels, the fourth channel and the third channel. In the case of 2P, the type of image of the digital video signal transmitted on the 4th channel and the 3rd channel, respectively (for example, landscape painting, portrait, musical performance, etc.)
The viewers can choose their favorite image and enjoy it. Alternatively, the same image may be transmitted by one word each in the fourth channel and the third channel, that is, equivalently, the sampling frequency is doubled.

Next, the upper sixth word of the second word of the header signal shown in FIG.
An image information identification code indicated by rFR/FLj is placed in the th bit, and this identifies whether the digital video signal to be transmitted is for one frame or one field, and the value is 11. "0" indicates one frame, and "O" indicates one field. Is the digital video signal transmitted frame by frame?
Since the signal format of the video signal section (to be described later) differs depending on whether it is transmitted in units of one field, the playback device detects this and captures the image signal in accordance with the signal format at that time.

Also, the next 1 bit of this image information amount identification code is FA
A screen transmission identification code indicated by /PJ is placed and the value is “1”.
'' indicates that a still image digital video signal that should be displayed on the entire screen is transmitted (so-called full screen transmission), and when the value is 0, it is displayed on a part of the screen. This indicates that a so-called partially replaced digital video signal is not transmitted.

Furthermore, the "1" shown in Fig. 4 is a binary "1", and the values of each code arranged up to the upper 7th bit are all "0", and the 8th bit is also "1". 0", the EOD signal shown in FIG.
Since both bits and the lower 8 bits are set to all "0", it may be erroneously detected as this EOD signal, so "1" is placed to prevent this.

Further, in FIG. 4, rs. El indicates a 2-bit special effect code, and is used to identify when a still image displayed on the screen is displayed with a special effect such as a fade-in, screen change from the top or left side of the screen, etc. This is the code. The above special effect code Is. The next two bits of EJ contain r. 61MODEJ is the scanning line number conversion code, and the next two bits are IP. Picture type identification codes are arranged to identify the type of program indicated by GJ.

The code for converting the number of scanning lines r6LMODEJ is the number of scanning lines 6.
When converting a 25-line digital video signal to a 525-line scanning system using a playback device, the image information of 6 scanning lines can be simply converted into the uniform information of 5 scanning lines as the number of scanning lines. This is a code that indicates one of the four types of mixing ratios required when performing the conversion. That is, when performing the above conversion of the number of scanning lines, the image information of the first to sixth scanning lines of the 625 scanning line system shown as 1 to 6 in FIG. Image information is created from the first to fifth scanning lines of the 525-scanning system shown as 1 to 5 in Figure (B). To create image information for the 1st H of the 1st field, the first scanning line (1H of the 1st field) of the 625-scanning method and the second scanning line (1H of the 2nd field) are used. Each image information is created by multiplying the spine and x, respectively.

Here, it is well known that if each digital data is shifted by 1 bit in the direction of 1 LSB, the amount of data will be multiplied by Σ, and if it is further shifted by 1 bit in the direction of LSB, the amount of data will be multiplied by Σ. . Therefore,
Since the above ten times is the sum of ÷ times and ten times, the digital data of the first scanning line of the above 625 scanning line method is
By adding the first digital data obtained by shifting 1 bit at a time in the B direction and the second digital data obtained by shifting 2 bits at a time in the LSB direction, image information of the J first scanning line is obtained. By generating image information T times as much as , and further adding to this digital data obtained by shifting the digital data of the second scanning line of the 625 scanning line method by 2 bits each in the LSB direction, Image information of the first scanning line of the 525-line scanning method is obtained.

Hereinafter, in the same manner as above, FIG. 6(A). As shown in (8), the second, third, fourth degree,
The image information of the 5th scanning line is the image information of the 2nd and 3rd, 3rd and 4th, 4th and 5th, and 5th and 6th scanning lines of the 625-scanning line system at a predetermined mixing ratio. Obtained by mixing. These mixing ratios are shown in Figure 6 (A). As can be seen from (B), a1 flea 1 upper J (non, 〒), (,, Σ). (,, Engineering>, (0.1) of 4
Since it is given as a seed pattern, by giving a mixing ratio of 1 to the scanning line to be obtained in advance using the code indicated by r6LMoDEJ, the number of scanning lines in the reproduction device can be reduced to 52.
This means that conversion to the 5-wire system can be easily performed.

Note that if the code r6LMODEj is not given, in the case of the n-th scanning line, it is necessary to calculate the mixing ratio from the remainder when this is divided by 6.

Next, the picture type identification code I'P. When GJ transmits digital video signals independently of each other using two channels, the fourth channel and the third channel, for example, the fourth channel transmits a digital video signal of a normal image, and the third channel transmits a digital video signal of a normal image. Assuming that a special image is transmitted in which the digital video signals of several types of images are synthesized in time series, it is assumed that the digital video signals of several types of images are transmitted in a time-series manner. This indicates the value of the category number assigned to each image.Continuity of display is required for each image transmitted on this third channel, and images for which it is inconvenient to switch to a different type of image in the middle of display (for example, East) , IIL!llI, illustration, performer, etc.], and the picture type identification code [P.GJ] indicates the category number assigned according to the type of these pictures. If you select to play the II images of a channel and specify a desired category number, only the images of that category number will be played continuously and will not be interrupted by images of other category numbers. It disappears.

Furthermore, the 1-bit codes shown as rB19WJ and rB19RJ in FIG. 4 are write designation codes and read designation codes for two frame memories in the playback device, which will be described later, and both are "O" (or "1"). When , the first
The pixel data of the digital video signal is loaded into the (or second) frame memory, and the stored data is read out and displayed on the screen. This means changing the content of an image while displaying it, and as a result, a moving image can be displayed in a part of the image that is not a still image. On the other hand, when rB19WJ is rOJ and rB19RJ is "1", pixel data is loaded into the first frame memory, pixel data read out from the second frame memory is displayed, and the pixel data read out from the second frame memory is displayed. After the write operation is completed, the display screen is switched from the second frame memory to the first frame memory by the EOD signal. Further, when rB19WJ is "1" and rB19RJ is rOJ, the pixel data read from the first frame memory is displayed while writing the pixel data to the second frame memory, contrary to the above.

Next, the third to sixth words of the header signal shown in FIG.
Address signals 21 indicated by 83 to 818, respectively, are applied to the word word.
a, 22a. 23a and 24a are arranged respectively,
The address signal for the memory circuit of two pixel data (pixel sample value) of the upper 8 bits and the lower 8 bits of each word of the video signal section is shown which is transmitted following this header signal. Here, the number of scanning lines of color television signals in the world is 625 or 525, and the digital video signal in the present invention is actually a time-series synthesis of 572 scanning lines containing image information. The signal is transmitted using a 625-scanning line system, so when playing back using a 525-scanning line system, the number of scanning lines must be converted in the playback device as described above before being stored in the memory circuit. do. Therefore, as the address signal for this memory circuit, the values for two pixel data, the upper 8 bits and lower 8 bits of one word, and the different values for the 625 scanning line system and the 525 scanning line system are used. A total of four address values will be required. Therefore, the address signal 21a indicates the address value of the upper 8 bits of pixel data of one word of the video signal section in the 625-line system, and the address signal 22a
The address value of the lower 8 bits of pixel data in the 25-line method,
23a is assigned to indicate the address value of the upper 8 bits of pixel data of the 525-line method, and 24a is assigned to indicate the address value of the lower 8-bit pixel data of the 525-line method.

The seventh to twelfth words of the header signal shown in FIG. 4 have the same configuration as the first to sixth words described above.
5 is different from the synchronization signal 20 in that both the upper 8 bits and the lower 8 bits have hexadecimal values rFFJ, and other various codes of the 8th word and the address signal @2lb , 22b. 23b. 24b are various codes of the second word and address signals 21a, 22a . 23
a. The content has been selected to be the same as 24a. This is due to the following reason. As described later, the disk 40 shown in FIG.
The digital signal recorded on the transmission line includes error correction signals (indicated by P and Q in Figure 8), which correct most of the errors that occur on the transmission path, but if they cannot be corrected. It also happens rarely. In this case, for digital audio signals, data is corrected using an interpolation circuit, etc., and for digital video signals, adjacent pixel data often have similar values, so the data is corrected using the immediately preceding pixel data. There are few problems even if it is corrected using .

However, if there is no data correlation between adjacent signals such as a header signal, it is difficult to perform the above correction, and if the contents of the header signal are not transmitted, the digital video signal immediately after it is Therefore, for example, two days' worth of pixel data will be missing. Therefore, in order to avoid these inconveniences, some information in the header is sent twice as shown in Figure 4.
Even if the first half of the header signal part is not regenerated on the transmission path,
The second half of the header signal portion is used to capture pixel data. Note that since the values of the synchronization signals 20 and 25 are different, it is possible to identify whether the synchronization signal is the synchronization signal of the first half header signal portion or the synchronization signal of the second half header signal portion.

Next, the signal format of the video signal sections V1 to V286 shown in FIG. 3 will be explained. FIG. 5 shows an embodiment of the signal format of the video signal section V1. In this figure, the vertical direction shows the bit arrangement, the upper side shows the MSB, the lower side shows the LSB, and the horizontal direction shows time, as in FIGS. 3 and 4. As mentioned above, in this embodiment, each of the 286 video signal sections v1 to V286 is composed of 684 words. The pixel data of the scanning line is arranged in the upper 8 bits, and the pixel data of the other scanning line is arranged in the lower 8 bits and transmitted. Therefore, the signal format of the first video signal part V1 is as shown in FIG. A digital video signal sequence is arranged (that is, pixel data from the first row of pixels of a plurality of pixels arranged in a matrix and forming one screen is arranged), and the lower 8 pits of each word are arranged as follows: , a digital video signal sequence (ie, pixel data from the second row of pixels, group) of each sample point of the second scanning line (first H of the second field) located second is arranged.

In addition, in Fig. 5, YO~Y455 (however, Y10~
Y455 (not shown) indicates each arrangement position from the first sample point to the 465th sample point of the digital luminance signal of the first scanning line, and Y456 to Y911 (however, Y466 to Y911
(not shown) is the first digital luminance signal of the second scanning line.
Each arrangement position from the sample point to the 456th sample point is shown. Also, (RY)0~, (R-Y)113, (B-Y)0~
(B-Y) 113 (However, (RY) 2 ~ (RY) 1
13 and (B-Y) 2 to (B-Y) 112 (not shown) are the digital color difference signals (R-Y) of the first scanning line. (B-Y
) from the first sample point to the 114th sample point are shown.

Furthermore, (RY)114 to (RY)227, (B-Y)
114~(B-Y)227 (However, (RY)116~
(RY) 227 and (B-Y) 116 to B-Y 226 are not shown) are the digital color difference signals (R-Y
), (BY) from the first sample point to the 114th sample point are shown. Therefore, the video signal section V1 consists of a group of 2H worth of pixel data of the first and second scanning lines, including pixel data of four sample points of the digital luminance signal and one sample point of each of the two types of digital color difference signals. The signal format is such that six pieces of pixel data are set as one unit, and each unit is repeatedly transmitted.

Note that the video signal sections V2 to V286 also have the same signal format as V1.

In this way, the pixel data of 62 adjacent scanning lines are arranged in the same video signal section, considering the case where the number of scanning lines is converted from 625 to 525. This is so that the conversion can be performed smoothly. In addition,
The EOD signal has 16 pits all "0", but this EOD signal
To prevent erroneous detection as an OD signal, the values of each word of the video signal section v1 to V286 are all rOJ.
, all r such that only the LSB is "1"
It is changed to another value close to OJ.

Next, a recording system for recording digital video signals in signal formats as shown in FIGS. 3 to 5 on a disk in time series along with digital audio signals will be described. In the present invention, a digital video signal is transmitted through one or two transmission channels out of a total of four transmission channels,
Although digital audio signals are transmitted through other three- or two-channel transmission paths, a case in which both digital video signals and digital audio signals are transmitted through two-channel transmission paths will be described here. FIG. 7 shows a block system diagram of an example of other essential parts of this recording system. In the same figure,
30.31 The same components as in Fig. 1 are given the same reference numerals.
．． Reference numeral 32 denotes an input terminal into which three channels of analog audio signals are input separately, and the three channels of analog audio signals include a central sound image localization signal.
As a result, real image localization of the central sound source and expansion of the listening range, which could not be obtained with conventional two-channel stereo, can be achieved. Further, 33 is a start signal input terminal, and 34 is an input terminal for a cue signal generated every time the Onto program of the three channels of analog audio signals switches from the previous music program to another music program. .

Here, the disk 40 to be described later has a sampling frequency of 47.25 kHz, 1 child number, and 1 channel of information.
Assuming that 6-bit digital signals are recorded in time series for 4 channels on one track, the above 3-channel analog audio signal is sampled by the AD converter 35 for each channel at a sampling frequency of 47.25 kHz. and is converted into a digital audio signal (PCM audio signal) with a quantization number of 16 bits and supplied to the signal processing circuit 37. At the same time, a digital video signal having a signal format as shown in FIG. 3, which is reproduced by the digital recorder 19, is reproduced at a sampling frequency of 47.25 kHz and a quantization number of 16 bits, and is supplied to the signal processing circuit 37. Further, the start signal coming into the input terminal 33 and the cue signal coming into the input terminal 34 are respectively supplied to a control signal generating circuit 36, which generates a control signal having the configuration shown in FIG. 9, which will be described later. This control signal is a signal used for position control III (random access) of the big-up reproducing element such as the reproducing needle 74, and is supplied to the signal processing circuit 37 described above.

The signal processing circuit 37 rearranges these 16-bit total four channels of input digital signals and control signals from parallel data into serial data, and also processes the digital signals of each channel for each predetermined interval. Separate them and interleave them to create time-division multiplexing. Then, a recording signal is generated by adding an error code correction signal, an error code detection signal, and a synchronization signal bit indicating the start of a block (frame).

FIG. 8 is a diagram schematically showing an example of one block (one frame) in the recording signal generated as a result of signal processing by the signal processing circuit 37. One block consists of 130 bits, and its repetition frequency is the same as the sampling frequency, for example 4
It is 7.25kHz.

SYNC is a 10-bit fixed pattern synchronization signal bit indicating the start of a block, ch-i to ch-3 are 16-bit digital audio signals of the above three channels, and Ch-4 is reproduced from the digital recorder 19 above. The figure shows each multiplex position of one word of a 16-bit digital video signal. Also, P. shown in FIG. Q is 16 each
A bit error code correction signal, for example, P=&■vJ. oW. 3■W4(+)θjitwo”W+
■'1'-'/JzCE)T'Wa$T・IA/4(2
) is the signal generated by the formula. However, (1)
, (2) where w, w, w. 3. w, is each 16-bit digital signal of CIλ 111 to Ch-4 (usually a digital signal in each respective block);
is an auxiliary matrix of a predetermined polynomial, and ■ represents addition modulo 2 for each corresponding bit.

Furthermore, in FIG. 8, CRC is a 23-bit error code detection signal, and is a signal for ch-1 to ch-4 arranged in the same block.
P, Q (7) each') 1t'ljlEG;fX"+tshi×
23 obtained when divided by the generation multi-funeral formula of 4,000 x + 1
If the remainder of the bit is used, the signal from the 11th bit to the 129th bit of the same block during playback is divided by the above generator formula, and if the resulting remainder is zero, it is detected that there is no error. used for Furthermore, in FIG. 8, Adr is the control signal, each bit data of which is distributed, and one bit is transmitted in one block. For example, all the pits of the control signal are transmitted by 126 blocks (that is, the control signal is 126 blocks). Consists of bits.

Therefore, when the rotational speed of the disk 40 is 90 rpm, 50 blocks are recorded and reproduced per one rotation of the disk, so the above 126-bit control signal is recorded and reproduced 25 times during one rotation of the disk. become.

FIG. 9 schematically shows an example of the structure of the above control signal.

A total of 126 bits of control signals include a 42-bit first chapter code CP-1, a 42-bit second chapter code CP-2. and a 42-bit time code TC. The first code CP-1 is 1
The 7-bit synchronization signal, the 4-bit mode signal, the 8-bit chapter signal, the 12-bit chapter local address, and the signal bits from the mode signal to the chapter A7 local address are added modulo 2. It consists of a 1-bit parity code obtained by
The second chatter code CP-2 also has the same configuration and the same values as the first chatter code CP-1, except for the value of the synchronization signal. The above mode signal is a signal indicating the type of 4-channel digital signal recorded on the disc 40. For example, when it is "11", 3-channel digital audio signal and 1-channel digital video signal are recorded. , [110
1J records a 4-channel digital audio signal, l-1110J records two types of 2-channel digital audio signals, and ``1111J records a 2-channel digital audio signal and a digital video signal.'' Indicates that 2 channels are being recorded.

Further, the chatter signal is a signal indicating the number of the recorded music program from the signal recording start position on the disc 40.

Further, the time code TC shown in FIG.
1. Similar to the mode signal in CP-2, 4 indicates the type of 4-channel digital signal recorded on the disc 40.
A bit mode signal, a total of 16 bits of time identification code indicating the position of the recorded sound program on the disk 40 by the total time from the signal recording start position, and a time identification code of 16 bits, which increases by - for each revolution of the disk 40, It consists of a 4-bit track number code indicating a value of 14 in binary code, and a 1-bit parity code. The above time identification code is expressed in minutes and seconds, and the minimum unit is 1 second.
1 per second when the disk 40 rotates between 900 and -
Since the disc 40 rotates five times, the music program recording position can be identified every revolution of the disc 40 by the track number even if the time identification codes have the same value.

The digital signal of 1 block of 130 pits shown in FIG. 8 is sequentially taken out in series from the signal processing circuit 37 block by block, and is supplied to the modulation circuit 38 shown in FIG. (MFM) modulation method, for example, 7M
A Hz carrier wave is frequency modulated to produce a frequency modulated wave signal. This frequency modulated wave signal is recorded on the disk 40 by a recording device 39 using a laser beam or the like.

When the disc recording method previously proposed by the present applicant is applied, the recording device 39 described above has a configuration as shown in FIG. 10. In the figure, a laser beam emitted from a laser light source 41 is removed by an optical modulator 42 to remove stray light and noise, and then reflected by a reflecting mirror 43 and divided into two optical paths by a half mirror 44. . One of the divided laser beams is modulated in the optical modulator 45 by the output frequency modulated wave signal of the modulation circuit 38 from the input terminal 46 and a third tracking control reference signal fp3 to be described later, and becomes the first modulated light. It is considered to be a beam. The other divided laser beam is sent to the optical modulator 47 from the input terminal 48 and receives a first or second tracking control reference signal fp1 or fp2, which will be described later, which alternately enters every 1 rotation period of the recording 11 [1149]. is modulated into a second modulated light beam.

The first modulated light beam is reflected by a reflecting mirror 50, has its optical path changed, and passes through an information recording optical system consisting of cylindrical lenses 51 and 52, a slit 53, and a convex lens 54, so that it forms a rectangular shape on the recording source 1149. The light is shaped into the following. On the other hand, the second modulated light beam is shaped into a circular light on the recording master 49 by a tracking recording optical system consisting of a convex lens 55, a slit 56, and a convex lens 57, and then its optical path is changed by reflection 11158.

The first and second modulated light beams, each shaped into a desired shape, are combined on substantially the same optical axis by a polarizing prism 59, pass through a half mirror 60, and have their optical paths changed by a prism 61. Furthermore, a slit 62 and a recording lens 63
On the recording master 49 on which a photosensitive agent layer 65 is formed on the glass substrate 64, the first modulated light beam is formed in a rectangular shape shown at 66, and the second modulated light beam is shown at 67'. The irradiation is focused in a circular shape.

The recording master disk 49 is disk-shaped and is rotated synchronously at a constant speed.The light reflected from the half mirror 60 is applied to a signal monitoring system 68, and the light reflected from a prism 61 is applied to a monitoring optical system 69. Added. The distance between the two modulated light beams on the recording master 49 is measured by a monitoring optical system 69, and the deviation is monitored by a signal monitoring system 68, and the deviation is corrected by moving the syringe drill lens 51 in the vertical direction in the figure. Do the following.

The recording master disc 49 is subjected to a known development process and a disc making process to create a studio disc. The disk 40 duplicated by this metatamper board contains the three-channel digital audio signal described above and the one-channel digital video signal in the signal format shown in FIGS. 3 to 5 in the signal format shown in FIG. a spiral main track in which a frequency modulated wave of a signal synthesized in block units in a time-series manner is recorded as an intermittent bit string;
Approximately in the middle between the track center lines of adjacent main tracks, first and second burst-shaped bursts of a single frequency, which are in a band lower than the band of the frequency modulated wave, are arranged alternately every disc rotation period. tracking control reference signals fp1 and f
A sub-track is formed by a bit string in which p2 is intermittent, and a third tracking control reference signal f is formed in the main track at the switching connection part of fp1 and fp2.
p3 is recorded. Further, this disk does not have a guide groove for tracking the playback needle, and has an electrode function.

In this way, the cogibonen encoded digital video signal section, which is a time-series composite signal of pixel data from each pixel arranged in a matrix on the screen, is divided into pixel data of two adjacent rows of pixel groups, A header signal having a signal format as shown in Fig. 4 is added to each divided signal, and a digital video signal with an EOD signal added to the last word is synthesized with the digital audio signal in time series. Words are sequentially recorded on the disk 40 one word at a time.

Next, a device for reproducing digital signals recorded on the disc 40 will be explained. FIG. 11 shows a block diagram of an embodiment of the digital signal reproducing device according to the present invention. In the figure, a disk 40 is placed on a turntable (not shown) and rotated synchronously between 900r.

As shown in FIG. 12, the disk 40 has a track width TW, l-, which is formed by repeating flat surfaces 70 and bits 71.
A main track of rack pitch TP, a tracking control reference signal fp1 recording sub-track in which a flat surface 70 and a bit 72 are repeated, and a tracking control reference signal fp2 recording in which a flat surface 70 and a bit 73 are repeated. As described above, the sub-tracks are formed respectively, and the bottom surface 74b of the reproducing needle 74 is made to slide on the surface of the disk 40.

As shown in FIG. 11, the regeneration needle 74 is fixed to one end of a cantilever 75, and a permanent magnet 76 is fixed to the base side of the other end of the cantilever 75. cantilever 7
The part to which the permanent magnet 76 of No. 5 is fixed is a tracking coil 77 fixed to the playback device and a jitter correction coil 7.
It is surrounded by 8. The tracking coil 77 generates a magnetic field in a direction perpendicular to the magnetic field direction of the permanent magnet 76, and moves the cantilever 75 in one direction along the track width depending on the polarity of the tracking error signal from the tracking servo circuit 79. And, it is displaced by an amount of displacement corresponding to its size.

Resonance in which the resonant frequency changes in response to the capacitance formed between the disk 40 and the electrode 74a shown in FIG. a circuit that applies a constant frequency to this resonant circuit, a circuit that detects the amplitude of a high-frequency signal whose amplitude changes according to the change in capacitance from the resonant circuit, and a circuit that applies a constant frequency to this resonant circuit; The high-frequency reproduction signal taken out from the backup circuit 80 consisting of a circuit for pre-amplifying the signal) is supplied to the FMI [1 circuit 81, where the main information signal of the main track (in this case, the digital audio signal and The sequentially synthesized digital video signals are each demodulated, while a portion is branched and supplied to a tracking servo circuit 79.

The tracking servo circuit 79 detects the first signal from the reproduced signal.
to third tracking control reference signals fp1 to fp3
are frequency-selected and taken out, and both reference signals fp1 and fp2 are extracted.
A tracking error signal obtained by differentially amplifying the envelope detection output of is output to the tracking coil 77. However, since the recording positional relationship of fpi and fp2 with respect to the main track is switched every - rotation period of the disk 40, the tracking polarity is changed by the switching pulse generated based on the detection output of the tracking control reference signal fp3. It is switched every rotation period. Note that when a kick instruction signal is received at the input terminal 82, the tracking servo circuit 79 drives the tracking coil 77 so as to forcibly move the regenerator 74 in the track width direction by one track pitch or more. do.

At the bottom, the demodulated digital signal taken out from the FMIm1 circuit 81 is applied to the decoder 83, where it is MFM decoded and converted into a time-series composite signal with the signal format shown in FIG. The beginning of a block is detected, the serial signal is converted to a parallel signal, and further error detection is performed. Only when an error is detected, the error code correction signals P and Q are used to correct and restore the error signal. In this way, each of the three channels of the 16-bit four-channel digital signal is corrected and restored as necessary to be error-free and returned to the original order before the signal arrangement was interleaved. The 16-pit digital audio signal is converted into an analog audio signal by a DA converter in the decoder 83, and then outputted to output terminals 84, 85, and 86, respectively. Further, the backup control signal is output to a predetermined circuit (not shown) for speed position search and the like.

On the other hand, the digital video signal having the signal format shown in FIGS. 4 and 5, which is reproduced in time series on the fourth channel, is supplied to the scanning line number conversion circuit 87 shown in FIG. The number is converted from the 625-line system to the 525-line system. Here, as described above, the digital video signal is related to image information of scanning lines in which the scanning line of the first field and the scanning line of the second field are alternately selected from the top of the screen, and Since the code r6LMODEj for converting the number of scanning lines in the header signal is reproduced, the number of scanning lines can be easily converted.

As described above, the scanning unit conversion circuit 87 is a necessary circuit for a reproduction device that reproduces an input signal as an analog color video signal conforming to the NTSC system with 525 scanning units. As explained in , SECAM method with 625 scanning lines or PAL
It is not necessary when playing back as an analog color video signal that conforms to the standard. Of course, in this case, a changeover switch may be provided to change over the input and output of the scanning uniformity conversion circuit 87, and this may be changed according to the television system to be reproduced. The 525-scanning-line digital video signal serially extracted from the scanning-line converting circuit 87 is supplied to a switch circuit 88 .

Further, the digital video signals sequentially and time-sequentially extracted from the decoder 83 in the signal format shown in FIG.
The signal is also supplied to a synchronization signal detection circuit 89, a header signal detection circuit 91, and a memory write controller 92, respectively. The synchronization signal detection circuit 89 detects the synchronization signal 20 or 25 shown in FIG. 4 and the EOD signal in the header signal, and supplies the detection signal to the control circuit 90.

However, when this interphase signal detection circuit 89 detects the synchronization signal 20 or 25, the 5 words (
11) is configured not to be detected as a synchronization signal even if it has the same value as the synchronization signal 20 or 25. As a result, the synchronization signal 20
．． It is possible to prevent a signal of a part of the header other than 25, or even pixel data, from being detected as a synchronization signal.

Header signal detection circuit 91 discriminates each code in the header signal shown in FIG. 4 and supplies it to control circuit 90.

The control circuit 90 receives code detection signals such as a synchronization signal detection signal and a header signal, and also detects the type of code intended by the playback device user (with the above-mentioned picture type code IP. A signal (category number signal) specifying several types of special images (to be identified) is supplied, and these input signals are discriminated and decoded to control the scanning line number conversion circuit 87, the switch circuit 88, the memory write controller 92, and the switching circuit. Controls the circuit 97 etc. The output digital video signal of the scanning line number conversion circuit 87, which is selectively output by the switch circuit 88, is supplied to one of the memories 94 and 95, where it is outputted by the write control signal from the memory write controller 92 as shown in FIG. The address specified by any of the address signals 21a to 24a (or 21b to 24b) shown in FIG.
and 24b》 after conversion of the number of scanning lines).

Here, the address signals 21a to 24a, 21b to 2
In this embodiment, 4b is a signal specifying an address number for loading (taking) two days' worth of digital luminance signals and two types of digital color difference signals into the memory 94.95, and the memory light controller 92 handles the luminance signals. and one system common to two types of color difference signals. In addition, the memories 94 and 95 have header sections H1 to H2 shown in FIG.
86 and EOD signals are not written, and the video signal section V1~
(2) The memory write controller 92 is controlled so that 286 pixel data groups are written.

Normally, reproduced pixel data is written into the memories 94 and 95 alternately one frame or one field at a time, but in this embodiment, the memory 94 or 95 designated by the write designation "1" rB19WJ shown in FIG. Write reproduced pixel data within the horizontal blanking period.

The memories 94 and 95 are operated based on read control signals from the memory read controller and synchronization signal generation circuit 96.
The input reproduced pixel data is equalized and read out, and jitter accompanying reproduction is also corrected. Here, the memory 94
The digital luminance signal read out from the first
and a second digital color difference signal each having a sampling frequency of 2.
The signal is read out at 25 MHz with a quantization number of 8 bits and supplied to the switching circuit 97.

The switching circuit 97 selectively outputs the readout output of one of the memories 94 and 95 according to a switching control signal from the control circuit 90 and supplies it to the DA converters 98 , 99 and 100 . Here, the switching circuit 97 selectively outputs the read output of the memory 94 or 95 specified by the read designation code rB19R- shown in FIG. Of the memories 94 and 95, the memory that had been selectively outputting the readout output is switched to the readout output of the other memory. The time required for switching the switching circuit 97 is normally extremely short, but when a special effect such as a fade-in is produced, the switching is performed gradually over a certain period of time (for example, 1 second).

Among the three types of digital signals that passed through the switching circuit 97,
The digital luminance signal is subjected to digital-to-analog conversion by the DA converter 98 and is then supplied to the encoder 101 as an analog luminance signal.On the other hand, the two types of digital color difference signals are subjected to digital-to-analog conversion by the DA converters 99 and 100, respectively. The color difference signals (B-Y) and (R-Y) are supplied to the encoder 101. encoder 10
1 is a horizontal synchronization signal from these three analog signals and a memory read controller and a synchronization signal generation circuit 96;
A color video signal compliant with the NTSC system is generated using a vertical synchronization signal, a color burst signal, etc., and outputted from the playback output terminal 102 to a monitor color television receiver (not shown), where it is output to output terminals 84 and 85. , 86 and reproduced to produce sound, color still images, partial moving images, etc. are displayed as supplementary information for the listener's music appreciation.

By the way, the music program and the color image played from the disk 40 need to be played back in synchronization with each other, but it is necessary to store pixel data of one frame (or one field) in the memories 94 and 95. Since it takes a certain amount of time, it is necessary to record the digital video signal a certain period of time before the start of displaying the image. Therefore, the recording start position of each music program and the digital video that is played from the beginning of the music program must be recorded. The latter is recorded in advance of the recording start position of the signal by the predetermined period of time. Therefore, when randomly accessing the disk 40, the playback unit 74 is moved at high speed toward the inner or outer circumference of the disk 40, and a control signal having the signal format shown in FIG. When the desired music program reaches the beginning position, playback in any mode such as normal playback starts from there, but in such cases, playback may start from the middle of the digital video signal. . In such a case, in the method previously proposed by the applicant, the synchronization signal existed only at the first position of the digital video signal of one field or one frame of the image, so the digital video signal reproduced from the middle of the above Although it was not possible to display the video signal, according to this embodiment, part of the header was 2H as shown in Figure 3.
Since it is placed and transmitted before the digital video signal part of the section, even if it is played from the middle, the memory 94 of the digital video signal after the first part of the header that is played back is stored.
Or it can be imported into 95 and displayed.

Furthermore, when displaying lyrics or the like on a portion of the screen, if the image information of only that portion is transmitted in a concentrated manner, that portion can be quickly changed. Similarly, a moving image can be played on a limited small screen portion of the screen. That is, a limited small screen portion 106 within the playback screen 104 shown in FIG.
When playing a video, address signals 21a to 24a121b to specify the address of this small screen portion 106 are used.
The process of transmitting the pixel data following the header part having 24b is repeated. In FIG. 13, 105 indicates the transmission position of a part of the header. However, as described above, this header section 105 is not displayed on the screen 104. Since the pixel data of the small screen portion 106 is written to the memory of the memory 94 and 95 that is reading the digital video signal displaying the image on the screen 104,
The written pixel data is displayed as a moving image in the small screen portion 106
will be displayed.

In the case of partial image transmission, the transmission time varies depending on the display area, so the transmission period is short for images displayed on a small screen.
It can be a video.

The above rewriting of the pixel data in the small screen part is done by rewriting the q pixel data of the scanning line after reproducing the header signal of -, and then finishing the rewriting of the q pixel data of the scanning line when the synchronization signal in the next header signal is regenerated. The configuration is such that the operation proceeds to the rewriting operation of the malefactor data of the scanning line.

In the above case, standard image transmission using 625 scan lines was explained, but when transmitting high-definition, high-quality images or moving images using run-length codes, the image type identification code "MODEJ" is used. This fact is identified by the value of , and the transmission format is also different from that shown in FIG.

Also, the value of the image type identification code rMODEJ is discriminated and reproduced, and the output signal of the control III1 circuit 90 controls the scanning line number conversion circuit 87 and the memory write controller 92 as necessary to select the format for loading into the memories 94 and 95. do. For example, when it is determined by the code rMODEJ that a high-quality, fine-grained digital video signal has been reproduced, the memory write controller 92 is controlled so that the memories 94 and 95 do not take in this reproduced digital video signal. (Or, the memory write controller 92 is arranged so that the above-mentioned reproduced digital video signal is compressed and taken into the memories 94 and 95 with the necessary scanning lines.) In addition, the above-mentioned high-quality The number of scans of the reproduced digital signal is 112.
The circuit operation of the scanning line number conversion circuit 87 may be changed from a 5 line system to a 625 line system or a 525 line system. In addition, transmission for one frame and transmission for one field can be mixed, and although part of the header remains the same at 12 words in either case, the value of the image information identification code rFR/FTJ and the signal format are different. (In the case of 1-field transmission, the video signal part divided every two days is divided into 143 parts in total and transmitted.) The playback device discriminates this code rFR/FLJ and imports it into the memories 94 and 95 at that time. Follow the format.

Furthermore, even if the digital video signals supplied to the memories 94 and 95 are shifted by one word for some reason, it is corrected by reproducing part of the next header, and errors due to the time shift of words will not accumulate.

Note that the unit of division of the digital video signal recorded on the disk 40 by the method of the present invention is not limited to the above-mentioned embodiments, but in short, the unit of division of the digital video signal recorded on the disk 40 by the method of the present invention is not limited to the above embodiment, but in short, the unit of division of the digital video signal is such that one image is displayed on the display screen while gradually switching to another image. In such cases, it is sufficient that the human eye does not perceive that the color and brightness are being switched separately (for example, by collecting pixel data with a maximum of 10 scanning lines and adding a part of the header to it). ). Further, in the above embodiment, the pixel data of the divided signal is the pixel data of two adjacent scanning lines (that is, the pixel data of two horizontal rows of pixel groups) as shown in FIG. 14(A). However, as shown in the same figure (B), pixel data of adjacent pixel groups of 2 to 10 columns lined up in the vertical direction may be used.Furthermore, the digital video signal is A frame or one field may be transmitted through a total of two channels, Ch-3 and Ch-4, shown in Figure 8. In this case, the reproduced digital video signals of the two channels are regenerated in chronological order. and transmitted over a single transmission line.

In the above embodiment, the number of scanning lines of the video signal is 625.
Although this was composed of a book, the signal recording format of digital audio discs such as disc 40 is common throughout the world, so that it can be played universally, and it is possible to use PAL or SECA.
This is to ensure that there is no shortage of information when reproducing a video signal compliant with the M format.

In addition, in the above explanation, the case where it was applied to the disk recording method and playback @ device proposed earlier by the present applicant was explained, but the application is not limited to this, and the capacitance change reading type having a tracking guide groove is also applicable. The present invention can also be applied to disks and disks in which previously recorded signals are read by a light beam. In addition, the television receiver has R. G.
If you have three primary color signal input terminals of B, use Eshicoder 1
01 is replaced by a matrix circuit, which converts the luminance signal Y and color difference signals (RY) and (B-Y) into three primary color signals R, G, and B and supplies them to the above input terminals separately. This allows the television receiver to display extremely high quality still images. Furthermore, the color difference signals recorded on the disk 40 are (G-Y) and (
It may be a combination of (RY) or (B-Y), it may be an I signal, a Q signal, or it may be a three primary color signal.

As mentioned above, the digital signal reproducing device according to the present invention has the following features:
A digital luminance signal, which is a time-series composite signal of pixel data from each pixel that is arranged in a matrix and constitutes one screen, and two types of digital color difference signals are respectively arranged in adjacent rows or columns. A time series in which pixel data of a pixel group is divided into pixel data, and a header signal having at least a synchronization signal and an address signal indicating the address number of a memory circuit that takes in the divided signal is added to the initial position of each divided signal. A recording medium on which a digitally synthesized digital video signal is recorded is reproduced, the header signal is discriminately reproduced from the reproduced digital video signal, and the divided signal reproduced following the header signal is transmitted to a memory circuit. The digital luminance signal and two types of digital color difference signals written in the memory circuit are written to a predetermined address specified by the address signal in the header signal, are read out simultaneously and passed through a DA converter, and then converted to the standard television system. Since the reproduced color video signal is generated, the address circuit of the memory circuit for taking in the divided signals can be configured as a single system common to the luminance signal and the two types of color difference signals, and the digital video signal can be reproduced in one screen. When the first digital video signal is composed of a first digital video signal having image information for 10 minutes, and a second digital video signal having image information to be reproduced in an area smaller than one screen, the first digital video signal is Based on the address signal of the header signal in the second digital video signal, the divided signals in the second digital video signal are stored in the memory circuit in which each of the divided signals in the digital video signal is written.
! By sequentially writing the divided signals in the digital video signal in step 2 and partially rewriting the image information for one screen, it is possible to rewrite a portion of the image on the screen or display a portion of the image as a moving image. Even if there is a jitter in the reproduced f′ digital video signal, the hegeder signal is recorded in each of the divided signals divided into relatively short intervals of about several H, so the jitter will not occur in time. Furthermore, since each divided signal also includes the address number for the memory circuit taken in after the scanning line number conversion process, it is easy to use even when converting the number of scanning lines. It has a number of features, such as being able to import into a memory circuit the output of an address circuit having a unique configuration.

[Brief explanation of the drawing]

FIG. 1 is a block system diagram showing an example of the main part of the recording system of the digital signal reproduced by the apparatus of the present invention, FIG. 2 is a diagram showing the image information part to be transmitted in the video signal, and FIG.
The figure is a diagram schematically showing an example of the configuration of one frame of a digital video signal, Figure 4 is a diagram showing an example of the signal format of the header signal in Figure 3, and Figure 15 is a diagram showing an example of the signal format of the header signal in Figure 3. Diagram showing an example of the signal format of the signal section, No. 6
Ward (A). (B) is a diagram showing an example of a method for converting the number of scanning lines from 625 to 52, respectively. FIG. 8 is a diagram showing an example of the signal format of one block of digital signals previously proposed by the applicant. FIG. 19 is a diagram showing an example of the signal format of the control signal in FIG. 8. FIG. 10 is a system diagram showing an example of the recording device shown in FIG. 7, FIG. 11 is a block system diagram showing an embodiment of the digital signal reproducing device according to the present invention, and FIG. 12 is a system diagram showing an example of the recording device shown in FIG. 11. FIG. 13 is a partially enlarged perspective view showing an example of a sliding situation with a shaped recording medium, FIG. 13 is a diagram explaining the screen rewriting operation on a limited small screen, and FIG. (B) is a diagram showing each example of the transmission order of pixel data of a digital video signal to be reproduced by the apparatus of the present invention. 1... Video signal source, 2... TV synchronization signal generator,
3... Mathematics circuit, 4.5.6.35... AD
Converter, 9.10.11.1B, 94.95... Memory, 15.97... Switching circuit, 17... Header signal generator, 19... Digital recorder, 20.25
...Synchronization signal, 21a to 24a. 2lb~24b-・
Address signal, 30-32... Analog audio signal input terminal, 36... Control signal generation circuit, 37...
Signal processing circuit, 39... Recording device, 40... Disc-shaped recording medium (disk), 41... Laser light source, 42
,45.47...Light change 1L49...Record III,5
9...Polarizing prism, 60...Half mirror, 61
... Prism, 74... Regeneration needle, 74a... Electrode, 76... Permanent magnet, 79... Tracking servo circuit, 80... Big up circuit, 83... Decoder, 84-86 . . . Analog audio signal output terminal, 87 . . . Scanning and integral number conversion circuit, 88 . , 93... Input terminal for picture type designation signal, etc., 98-100... OA converter, 1
01...Encoder, 102...Analog video signal output terminal, 106...Small screen portion to be rewritten, H1, H2...Part of header, ■1 to V286.
...Video signal section, EOD...Signal transmission end signal (E
OD signal). 531 - 532 Procedural Amendment (edited by Koma, S. 6, 1982) '1 Mr. Kazuo Wakasugi, a good official 1. No. 1 Patent Application No. 66100 of 1982 2. Title of defense i. Digital signal reproducing device 3. Supplementary address of patent applicant: 3-12 Moriya-cho, Kanagawa-ku, Yokohama-shi, Kanagawa Prefecture 221
Address name (432) Japan Victor Co., Ltd. Representative Director and President Ichiro Shinji 4 Agents 0 Location 102 Hidekazu Kioicho, 5-71 Kojimachi, Chiyoda-ku, Tokyo BR1010jj, Chonikura, Name (7015)
) Patent Attorney Itogo ← Telephone: 03 (263) 3271 (Representative Voluntary Amendment (2=) 5. Date of amendment order 6. Detailed explanation of the invention in the specification to be amended. 7. Amendment Contents (1) In the specification, 10th period-1 on page 8, line 12 is corrected to "above". Correct. Correct r465J on page 25, line 12 during a period to "456".

Claims (1)

[Claims] 1. A digital luminance signal, which is a time-series composite signal of pixel data from each pixel arranged in a matrix and forming one screen, and two types of digital color difference signals are arranged in a fixed number of adjacent rows or columns. When pixel data of a pixel group is divided into pixel data, and a header signal having at least a synchronization signal and an address signal indicating the address number of a memory circuit that takes in the divided signal is added to the initial position of each divided signal. A recording medium on which a serially synthesized digital video signal is recorded is reproduced, the header signal is discriminately reproduced from the reproduced digital video signal, and the divided signal reproduced subsequent to the header signal is stored in a memory circuit. The digital luminance signal and the two types of digital color difference signals written in the memory circuit are read out after being equalized and passed through a DA converter. , a digital signal reproducing device characterized in that it generates a reproduced color video signal of a standard television system. 2. The first digital video signal has image information for one screen, and the second digital video signal has image information to be reproduced in an area smaller than one screen.
digital video signal, the second digital video signal is stored in the memory circuit in which each of the divided signals in the first digital video signal is written based on the address signal of the header signal in the second digital video signal. 2. The digital signal reproducing apparatus according to claim 1, wherein the divided signals of the digital video signal are sequentially written to perform partial replacement of the image information for one screen. 3. Partial rewriting of the image information is performed by reproducing the divided signal of the scanning line at the time when the synchronization signal in the next header signal is reproduced after reproducing the header signal of - in the 12 digital video signals. 3. The digital signal reproducing apparatus according to claim 2, wherein the rewriting of the divided signal of the next scanning line is completed and the rewriting operation of the divided signal of the next scanning line is started.