JPS58195386A - Digital video signal reproducer - Google Patents

Abstract

PURPOSE:To reduce the deterioration in the vertical resolution, by attenuating and subtracting the picture element data of two adjacent scanning lines to the digital video signal of the 3rd field and reproducing the data into the digital video signal of the beginning 1st field. CONSTITUTION:To suppress the deterioration in the vertical resolution of a field picture taking the reproduction of a digital signal reproducer having a field memory only and the reproduction of the field picture with the fast feed reproduction into consideration, the digital video signal of one field is attenuated and mixed to the digital video signal of the other field as shown is Equations and the result is recorded as the digital video signal of the other field. The mixing processing as shown in Equations is done in memories 9, 10 and 11, the picture element data from the main memory of the scanning line to be mixed in an auxiliary memory is stored, it is read out sequentially, operated at an operation circuit and stored in the main memory again, allowing to attain the mixing processing.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a digital video signal reproducing device, which mixes the digital video signals of the first and second fields at a predetermined mixing ratio so that only the digital video signal of the third field is recorded. When playing back a field image recording medium or a frame image recording medium on which the digital video signal of this third field is recorded together with the digital video signal of the second field (or the first field), when playing back a field image, the third field is By replaying the TT digital video signal, high-quality field-side playback with less jaggies can be achieved, and during frame image playback, the third field digital video signal played from the frame image recording medium can be replayed from the original 3rd field. To provide a digital video signal reproducing device which can reproduce flicker-free, high-quality frames by restoring and reproducing the first field (or second field) digital video signal and then inputting it into a memory circuit. The purpose is to

In recent years, pulse code modulation (
Digital video signals and digital audio signals obtained by digital perspective modulation such as PCM) are recorded on a disc-shaped recording medium (hereinafter referred to as "disc") as changes in intermittent pit rows, and changes in the intensity of light from the disc are recorded. Alternatively, methods for reading and reproducing recorded signals by detecting changes in capacitance are being actively developed. Among these, a recording method for a digital audio disc is known in which a digital video signal related to color still image information is added to a digital audio signal and additional information is recorded on the same track on the disc. Usually, a plurality of music programs are recorded on the same surface of such a digital audio disc, and a digital video signal related to color still image information is recorded corresponding to each music program. In this case, the music program can be played using a universal playback system.

On the other hand, when it comes to playing back video signals, the television system is not universal, so in order to be able to play back in regions or countries where the television system differs from the television system of the video signal recorded on such a disc, it is necessary to As for the signal, it is necessary to convert it into a signal format that complies with the television system of the region or country in which it is to be reproduced and displayed. In particular, the above-mentioned digital video signal is related to color still images, lJ, which play an auxiliary role to aid the imagination of the listener who listens to the playback sound of the digital audio signal. It is desirable to adopt a universal system regardless of differences in television systems, and to reproduce the signal format in accordance with each television system.

Among the world's television systems mentioned above, the current color signal transmission formats are the HTBO system, PAL system, and
] [! There are three types of systems: o, m, and y. All of these systems compose a color dual signal from a luminance signal and two types of color difference signals, so the brightness signal and two types of color difference signals are separated, respectively. Adopting a component encoding method that transmits digital pulse modulation makes it easy to achieve compatibility between the three methods mentioned above, and it also makes it easier to use display monitors with three primary color signal input terminals, RGB, which may appear in the future. It is desirable because it has advantages such as good image quality when using a digital audio disc, and especially the possibility of partial moving images in the case of the above-mentioned digital audio disc.

Among such component-encoded digital video signals, digital video signals particularly applicable to television studios are currently subject to the International Radiocommunications Commission (International Radiocommunications Commission).
OOIR) is currently considering the standardization of standards, and according to the standardization, the number of scanning lines per second is 2.25 MHz, which is the least common multiple of the world's main horizontal scanning frequencies of 525 lines/30 frames and 625 lines/725 frames. 1, which is six times the frequency of
The sampling frequency of the luminance signal is 3.5 MHz, and two types of color difference signals (R-Y).

(B-Y) are each sampled at 6.75 MHz, and each is sampled at 8
Component coding that quantizes bits/pel has been proposed. In this case, the number of sampling points per one scanning line (hereinafter also referred to as "line") of the luminance signal is the sampling frequency of 1 quadrant S'KHM, horizontal scanning frequency of 15, 112
This is obtained by dividing by 5 kHz, resulting in 14 pieces. Further, as a signal format, a format has been proposed that does not cause signal deterioration even when subjected to chromakey processing or other image processing.

In the case of transmitting digital video signals for consumer use, it is preferable to transmit according to the standards proposed above, but when there is a large amount of data, the problem is that the image memory element becomes large and the image transmission time becomes long. Become. For example, 1
The number of effective sample points on the line is 720 for the luminance signal and two types of color difference signals (RY).

(B-Y) is 3@0 each, and the number of transmission lines is 575.
In the case of a book, the number of transmission sample points is (720+2×350)×575=828000 (pieces). Assuming that the first type main point is composed of 8 bits, it becomes 828000×8=6624000 (bits). This is 64kRAM of 216 (=65538) bits
This is the amount of information that can be stored using 102 random access memories. This amount of information is 1 at 44.1kHz.
If the data is transmitted using a transmission path capable of transmitting 6 bits, the transmission time is required. Furthermore, assuming that the first sled circuit has two types, one for writing and one for display,
A total of 204 kRAMs are required. However, this makes the structure of the memory circuit of the playback device complicated and expensive for the consumer digital video signal transmission on the digital audio disc.
This is particularly undesirable for consumer digital signal reproducing devices that require low cost.

Therefore, the present applicant filed a patent application (2) dated the same month as the present application (
The invention is titled "Digital Video Signal Recording System") and proposed a system for recording a third field digital video signal generated from first and second field digital video signals on a recording medium. The present invention relates to a reproducing apparatus capable of reproducing both field images and frame images from a medium with high quality, and one embodiment thereof will be described below with reference to the drawings.

First, the selection of the sampling frequency and the number of effective scanning lines of the digital luminance signal and digital color difference signal to be reproduced by the apparatus of the present invention will be explained.

The frequency band of the brightness signal in the television broadcast signal is N
42MHg for T80 system, J'MUL system and SKOA
In the M system, there is 1 MHg or @ MHM7, but in the NT80 system, the frequency band of the brightness signal actually transmitted by the television receiver is about 1 MHtx,
3 MHz to 4 for L method and 811fOAM method
I only use it up to MHi level. Therefore, although it is possible to lower the sampling frequency to about @MHg1, it is better to have some margin. Therefore, the sampling frequency of the luminance signal is 3:
1 MHz, which has a relationship of 2. Nine color difference signals (
The sampling frequency of R-Y) #(B-Y) is determined.

Note that the number of bits in a memory circuit that stores digital video signals increases in proportion to the signal band frequency.
In addition to the standard mode digital video signals mentioned above,
Future number of scanning lines: 1125, luminance signal frequency band: 20
Considering the case where a digital video signal of MHta high-definition mode is also recorded, recording is performed by providing a code for identifying whether the mode is standard mode or high-definition mode in a part of the header, which will be described later.

The number of sampling points of the luminance signal per scanning edge of the above standard mode digital video signal is at a sampling frequency of 49 MHz.
is obtained by dividing by the horizontal scanning frequency ILl of 125 kHz, resulting in 876 pieces. However, in addition to the information on both flights, this includes horizontal blanking periods such as the horizontal synchronization signal period and color burst signal period, and if we exclude the sample points during this period, up to 45 @ individual feed rate. can be reduced.

On the other hand, the bit number of commercially available 64 kRAM is 21'6
(-@5.58ε) bits, using 4 of these gives 482"-2"-2@2.144 (, bits).
, 11·1· bit number is obtained. ρ: (Divide the number of points by the above - the number of effective sample points of the luminance signal of the horizontal scanning line, 4s6.), approximately 57
It becomes 4.87. Therefore, the number of scanning lines in one frame is 625.
The number of effective scanning lines of a book to be transmitted as an image is determined by the above s
r4. By selecting 512 lines with a value extremely close to y and smaller than this, each pixel data of the effective sample point of the signal for one frame is divided into 4 bits per bit.
This means that the data can be efficiently stored in 1 4 kRAM.

In addition, the 2h1 color difference signals (R-Y) and (B-Y) are
The m-element data of 92 types of digital color difference signals obtained by digital pulse modulation at a sampling frequency of 125 MHz on each side can be efficiently stored in one 14k RAM each for one bit. Therefore, assuming that the pixel data of a sample point is 1 bit, the digital video signal obtained by combining the above digital luminance signal and two types of digital color difference signals in time series is 70: One frame can be stored in 3 94 kRAMs, as shown by One field of digital video signals can be stored, which is equivalent to the number of @4kRAMs required for the aforementioned TV studio memory circuit.
It is much less than 4, and can be realized at a low price.

In the case of component encoding, even if the pixel data of one sample point is quantized to 6 bits as described above, there is almost no problem with the accumulation of teacherization noise in standard consumer playback devices. It has been experimentally confirmed that there is no such thing. According to this embodiment, since the number of chips per bit can be an integer, the address signal generation circuit for actually controlling the storage of digital video signals in the memory circuit can be shared, and the memory controller and controller can be used in common. A recording system for a signal reproduced by the zero-order apparatus of the present invention will be described, which is easy to use and eliminates the need for an extra buffer memory element added to facilitate memory control. FIG. 1 is a block diagram showing an example of the essential parts of a signal recording system. In the figure, reference numeral 1 denotes a video signal source such as a color television camera, a flying spot scanner, or a VTR, to which a TV synchronization signal from a TV synchronization signal generator 2 is supplied as necessary, and is used to generate a color image to be recorded. The three primary color signals are taken out and supplied to the matrix circuit 3.

The matrix circuit 3 has a luminance signal Y with a horizontal scanning frequency of 125 kHz and two types of color difference signals (B-
Y) and (RY), respectively, and supply them to the MDC converters 4, 5 and @J separately. On the other hand, the output Tv synchronization signal of the TV synchronization signal generator 2 is output from the clock generator 7.1.1.
2 and 1s, respectively.

A system D converter 4 converts the luminance signal Y into a clock generator T.
According to the above clock) l MH
After sampling at the sampling frequency selected as ts, the signal is quantized using an 8-bit quantization number, converted into a digital luminance signal, and supplied to the memory. As mentioned above, this digital luminance signal has 40 sample points (pixels) for the scan edge, and for one frame, the number of scan lines for the side effect is 5.
These are 12 digital luminance signals. The memory (2) writes the digital luminance signal for one frame or one field according to the output write control signal of the memory write controller 12, and writes the digital luminance signal for one frame or one field according to the output write control signal of the memory read controller 14, and sets the sampling frequency to 47.25 k according to the output read control signal of the memory read controller 14.
HI (or 44-1 kHI), which is read out as a digital luminance signal with a quantization number of 3 bits.

f7'j A/D converters S and 6 are color difference signals (B-Y)
and (RY) are applied to each side, and the input color difference signals are sampled at a sampling frequency of 2.25 MHH, chosen to be 2.25 MHH, by a clock generator. After that, it is quantized with a quantization number of 3 bits and converted into a digital color difference signal with the number of sample points per scanning line being 114 (-45@/4). The memories 10 and 11 write the digital color difference signals taken out (by the D converters 5 and 6) according to the write control signal from the memory write controller 13!
', '+t frames (572 effective scanning lines) or 1 frame), write the yield 61. □, -1. 2. .

→・Anchor□・、、Reading 4 degrees.

The output control signal has a sampling frequency of 47.25kHz (
or 44-1 kHz), the first of the 8-bit quantization numbers
and read out as a second digital color difference signal.

Here, the luminance signal, color difference signal (B-Y) and (R-
Y) is transmitted for one frame or one field, but
When playing back with a low-cost consumer digital signal playback device that only has field memory, or if you want to perform fast-forward playback even with a digital signal playback device that has frame memory, the first field (odd field) and second field (even field) ), only the signal component of one of the fields is stored in the memory and reproduced, so the vertical resolution is naturally lower than the reproduced image (frame image) K when one frame is transmitted. descend. Therefore, in the frame image, the diagonal line displayed as ' shown in FIG. 2 (4) is 11: 1) As shown in the same figure, the diagonal lines become stair-like.

For example, when the frame image has horizontal lines with different thicknesses and positions, as shown in Figure 3), the field image has uneven thickness ξ in the field image. As shown in 6), differences in thickness and position tend to be emphasized and displayed as 90,000 lines, which is a problem especially when displaying kanji on the screen.

Therefore, in the present invention, in consideration of playback using a digital signal playback device having only the above-mentioned field memory, and playback of both fields by fast-forward playback, the nine-wave signal that suppresses the decrease in vertical resolution of the field image is attenuated. The mixed signals are recorded as one field of digital video signals.

or 1 1 1 12n42nl+
"i"L2n+ 7IJ2n, +2)L
However, in formulas (1) and (2), "2n (in ft, n is a natural number) is the needle 1 of the 2nth scanning line from the top on the screen.
Assuming that there are four pixel data, and the odd-numbered scanning line indicates the scanning line of the first field and the even-numbered scanning line indicates the scanning line of the second field, ll2n is the pixel data of the scanning line of the second field. shows. Further, L2n-1-1 indicates a total of 684 pixel data of the scanning line of the first field displayed next to the pixel data L2H of the scanning line of the second field on the screen. Therefore, when recording the pixel data L shown by equation (l) as pixel data of the 2n+1 digital video signal in the third field, as is clear from equation (1), zn+ is 684 pixel data of field "2n-)
-1 multiplied by 1, and each 6I゛4 pixel data LL of the second field of each 2nth and 2n+2nd scanning line displayed above and below it on the screen.
'2n' 2n-? lY: Each - each - plane pixel data are respectively added and recorded as 6.4 pixel data to be displayed on the 2n+1st scanning line on the screen. On the other hand, when recording the pixel data ll2n shown by equation (2) as pixel data of the digital video signal of the third field, as is clear from equation (2), the pixel data ll2n of the second field of the 2nth scanning line is Pixel data of 7 times each of 664 pixel data L
Each 884 pixel data L2n-1' 2n+
1" and the multiplied pixel data are respectively added and recorded as 884 pixel data to be displayed on the 2nth scanning line on the screen.

Here, the pixel data of the poor ratio (mixing ratio) in equations (1) and (2) can be obtained by shifting 2 bits in the direction of YLSB (therefore, for example, 7L2n is obtained by shifting the pixel data L2n in the direction of L8B). (obtained by shifting 2 bits).

In this way, the pixel data of the third field generated according to equation (1) or (2) is transferred to the first field or the second field.
When displayed on the screen instead of the pixel data of the field, the boundary portion (contour) is replaced with an intermediate value, so jagged edges (so-called "jaggies") can be reduced. The field image in the third field above is actually viewed as a stamp set close to the frame image,
The effect is extremely large.

By the way, it is essentially up to you whether to perform matrix processing as shown in equation (1) or equation (2), that is, high-frequency component removal by image filtering in the vertical direction, on the playback device side or on the recording system. When reproducing a recording medium that has been previously recorded in a recording system as in the present invention, it is convenient for a low-cost digital signal reproducing apparatus having only a field memory.

However, in a high-grade digital signal reproducing device having a frame memory, the digital video signal of the third field has vertical high frequency components removed compared to the digital video signal of the first field or the second field. Since there is a lack of information, it is not preferable to play this as is. ``te...::Presentation first, Fiya... Aiji, ya.

video signal and second field (or first field)
digital video signal and frame memory 1
, and when this is reproduced and displayed, it is not preferable because the images between the two fields will be displayed on the screen as different images or flickers.

However, the digital video signal of the third field can be restored and played back as the original digital video signal of the field on the playback device side, for example, the third field shown in equation (1).
When restoring and reproducing the digital video signal of the field, the pixel data L2n in the digital video signal of the second field, which is reproduced as the other field signal, is
Double it (shift 2 bits in the LBB direction) and convert this to (1)
The first subtraction 2n+1 obtained by subtracting from the pixel data L shown in the formula When the pixel data L is reproduced from the signal, this 2n+
Multiply 2 by - and the difference is 1. The original pixel data L of the first field can be restored by subtracting to obtain a second subtraction signal, and then shifting this second subtraction signal by one bit in the MSB direction and doubling it. In this case, when the pixel data is transmitted in 2n+1 bits, the restored and reproduced next pixel data L2.
This results in a T-bit signal in which the B information is lost, but the image quality of this T-bit is sufficiently good and does not pose a problem in practice.

Therefore, in view of the above, in the case of field feed, the digital video signal of the third field is recorded, and in the case of frame feed, the digital video signal of the third field and the digital video signal of the second field shown in equation (1) are recorded. The video signal (or the digital video signal of the third field and the digital video signal of the first field shown in equation (2)) is reproduced from a recording medium on which each is recorded.

The mixing process shown in the above (iJ formula or (2) formula) is performed in the memories 9, 1o, and 11 shown in FIG.

Memo 'J9, 10, and 11 each consist of a main memory, an auxiliary memory, and an arithmetic circuit, and store pixel data from the main memory of the scanning line to be mixed in the auxiliary memory, read it out sequentially, and use the arithmetic circuit. The above-mentioned mixing process is performed when the calculation is performed and stored again in the main memory.

On the other hand, a signal is input to the input terminal 1@ every time the recorded color information is switched, and is supplied to the header signal generator IT. The header signal generator IT generates a 16-bit header signal, which is a set of signals and codes forming part of the header, and supplies this to the memory 18. memory 1
s is a header signal, for example, with a period of 6114 word transmission period and a sampling frequency of 47.25 kHz (or 44 yl
kIim), and the quantization number is 16 bits.

The switching circuit 15 receives the digital brightness signal from the above memory, and the memory 10. ．． The first and second digital color difference signals from 11, and notes! The header signals from the JIII are switched in a predetermined order to generate a digital video signal in the signal format shown in FIGS. 4 and 5, which is supplied to the digital recorder 19 and recorded therein. Note that the memory read controllers 1, 1, and 1 are activated in synchronization with the clock signal from the digital recorder 1s.
A read control signal is output from 4. ...Next, the signal format of the above-mentioned digital video recorder No. 1 Sakaki will be explained in more detail. The digital video signal taken out from the switching circuit 1s is composed of a 12-word header part and a 2H component encoded video signal part of @114 words (H is a horizontal scanning period), which are alternately synthesized in time series. This is a signal in which a letter transmission end signal (hereinafter also referred to as "1liOD signal") is added to the last word, and when image information for one frame is transmitted, As shown in Figure 4, H7~”286 (
However, a part of the 2 heat 6 headers of H5 to H2, 6 (not shown) and v, to v2, 6 (starting, vi!1 to v28)
286 video signal sections indicated by Ff
A total of 1111 signals consisting of one word of KOD signal indicated by OD.
．． O5? A word digital video signal is recorded.

Therefore, the digital video signal for one frame is
The above-mentioned digital audio disc includes the 8th part described below.
In the signal of one block shown in the figure, it is assumed that one word is recorded on one channel of 16-bit transmission path.
This one block signal period and the above 3. - if the values of the reciprocals of the sampling frequency of the signal are each chosen to be equal, then when the sampling frequency is 441 kHz't&, approximately 4. s
It is transmitted in 1 second, and at 4F2!1kHz, it is transmitted in about 421 seconds.

In each of the above header parts H1 to H284, a fixed pattern synchronization signal is placed in the first word (one word consists of 16 bits), and the next standard mode is placed in the next word. An image type identification code to identify whether the video is in high-definition mode or a run-length code, a code for converting the number of scanning lines, a code to identify whether it is a field image or a frame image, and data. A code for specifying whether the memory circuit to be written is a display-side memory circuit or a non-display-side memory circuit, and a code indicating the amount of image information and other various image information are arranged, and furthermore, the following third code is arranged.
Address signals are arranged from the 6th word to the 6th word. Then, in one word in the second half from the first word to the 12th word, codes having the same contents as the first six words are arranged in the same arrangement. Only the friend synchronization signals have different values.

In this way, the reason for sending part of the header twice is as follows:
Since there is no data correlation between adjacent words in the header signal, it is difficult to correct it when the contents of the header signal are not transmitted, and therefore the video signal section immediately after it cannot be captured, and the 2H pixel data will be missing. Therefore, the information in a part of the header is transmitted vertically twice, and even if the first half of the ladder signal section is not reproduced, the second half of the header signal section is used to capture pixel data. Of course, some information in the header is sent only once, and 6
It may also be composed of words.

Next, the signal format of the video signal portions V, -v284 shown in FIG. 4 will be explained. FIG. S shows an example of the signal format of the video signal portion V. In the figure, the vertical direction shows the bit array, with MsB on the top and L8 on the bottom.
It is the same as in FIG. 4 that B is shown and the horizontal direction shows time. Here, 2■ video signal sections V, ~v284
As mentioned above, each video signal part is composed of 04 words, and each video signal part is composed of pixel data of two scanning lines of the third field and the second (or first) field adjacent to each other. The pixel data of the scanning line of one field is arranged in the upper -171m bits, and the pixel data of the scanning line of the other field is arranged in the lower 8 bits and transmitted. Therefore, the signal format of the first video signal section (2) is as shown in FIG.
The digital video signal sequence of each sampling point is arranged (that is, pixel data L from the pixel group in the first row among the plurality of pixels arranged in a matrix and forming one screen, (
, -L,)), and the lower 8 bits of each word contain #!, which is located second. 2 scanning lines (second (or first)
The digital video signal sequence of each sample point of the 1st H of the field (i.e., pixel data from the pixel group of the 2nd row)
is placed.

In addition, in Figure 5, Y0 ~ "45m (Tomodashi" 1G
~Y455 (not shown) are each □ from the first sampling point to the 41st sampling point of the digital luminance signal of the first scanning line. 1
, Y;tu (Eh' ”444~454 ・9
11 Y94. (not shown) shows each arrangement of the digital luminance signal of the second scanning line from the first sampling point to the fourth S@ sampling point. Also (RY) 〒(” ”)11i1 m(B
-Y) ~(B -Y),, (just R-Y)2~
(R”)INI and (B Y)2~(B”)11
2 (not shown) is the digital color difference signal (R
-Y).

Each arrangement position from the 1st sample point to the 114th sample point of (BY) is shown. 【Ni” ”114～(R”)227m
(B-”)114 @”-”)22A (edashikaku)
"'114~(RY'227 and (B")11
4 to (B-Y) 224 (not shown) are digital color difference signals (R-Y) of the second scanning line.

Each arrangement position from the 1st sample point to the 114th sample point of (BY) is shown. Therefore, the video signal portion V is 21! of the first and second scanning lines! The unit consists of a group of pixel data of 1,000,000, and 6 pixel data consisting of 4 sample points of the digital luminance signal, 1 sample point of each of the 2 types of digital color difference signals, and 6 pixel data. The signal format is such that it is transmitted repeatedly for each unit.

It should be noted that the video signal is configured in the same signal format as the 1:11 bow parts v2 to v2a-"%vl, respectively.

Instead of arranging pixel data of the same scanning line in the same word as shown in Fig. 6, pixel data of two adjacent scanning lines are divided and arranged in the same word as shown in Fig. 5. As will be explained later, the number of scanning lines was changed from 625 to 52.
This is to facilitate conversion of the number of scanning lines in consideration of conversion to a five-line system. Furthermore, by simultaneously transmitting pixel data of two adjacent scanning lines in the same word, it is possible to reduce the number of times of memory writing and reading in the calculation for converting the number of scanning lines from a 625-line system to a 525-line system.

Note that the values of each word of the video signal portion V, ~v286 are as follows:
The value of each signal of the header part H4 to H28β and KO
When it becomes equal to the value of the D signal, it is changed to another value close to it.

Furthermore, in the above example, the signal format for transmitting one frame has been explained, but when transmitting one frame, the third
The field signal is transmitted in a signal format as shown in FIG. In this case, pixel data of the nth scanning line of the same field is arranged in the upper 8 bits of the same word, and pixel data of the n+th scanning line of the same field is arranged in the lower 8 bits.

Next, a recording system for recording the above-mentioned digital video signal onto the nine digital audio discs will be explained.

Here, the digital video signal is transmitted on one or two channels out of a total of four transmission channels, and the digital audio signal is transmitted on the remaining channels.
As an example, a case will be explained in which a digital video signal is transmitted through one channel. For convenience of explanation, the digital audio disk will be explained by taking as an example a variable capacitance readable disk that was previously proposed by the applicant. FIG. 1 shows a block diagram of an example of the above-mentioned recording system.

In the figure, the same components as in FIG. 1 are designated by the same reference numerals. 1g1, 31, and 32 are input terminals into which 3 channels of analog audio signals are input separately, and the 3 channels of analog audio signals include a signal for center sound localization, which allows conventional 2-channel stereo It is possible to localize the central sound source and expand the listening range, which was not possible with the conventional method. 33 is a start signal input terminal;
Reference numeral 4 designates an input terminal for a cue signal generated each time the three-channel analog audio signal 9 music program switches from a previous music program to another music program.

Here, as the information amount for one channel, for example, a digital signal with a sampling frequency of 41.25 kHz and a quantization number of 16 bits is stored on a disk 40 to be described later for four channels.
Assuming that the analog audio signals of the above three channels are recorded in time series on the tracks of a book, each channel is sampled at a sampling frequency of 47.25 by the AD converter 3s.
KHI! The signal shown in FIG. Sampling frequency 47-25kHz with signal format as shown,
A digital video signal with a quantization number of 16 bits is supplied to a signal processing circuit 37. Further, the control signal generating circuit 3@, to which the start signal coming into the input terminal 33 and the cue signal coming into the input terminal 34 are respectively supplied, generates a control signal having the configuration shown in FIG. 1, which will be described later, and processes the signal. Supplied to circuit 37. The control signal is used for position control (random access) of the pickup reproducing element, etc., as will be described later.

The signal processing circuit 37 rearranges these 16-bit input digital signals and control signals of a total of four channels from parallel data to serial data, and
The digital signals of each channel are divided into predetermined intervals, and are interleaved and time-division multiplexed. Then, a recording signal is generated by adding an error code correction signal, an error code detection signal, and a synchronization signal bit indicating the start of a block (frame).

FIG. 8 is a diagram schematically showing an example of one block (one frame) in the recording signal generated as a result of signal processing by the signal processing circuit 3-7, and one block is composed of 180 bits. Its repetition frequency is the same as the sampling frequency 47.
It is 25 kHz. SYNO is a 10-bit fixed pattern synchronization signal bit that indicates the beginning of a block, Ch-1
~0h-5 indicates the 16-bit digital audio signal with a total of 3,000 channels, and 3h-4 indicates the multiplex position of one word of the 16-bit digital video signal reproduced from the digital recorder I. P and Q shown in FIG. 6 are respectively 16-bit error code correction signals, which are generated by the following equation, for example. However, (3).

(4) In the formula 'w1. w2. w3. w4 is 0h-1
.about.0h-4 (usually digital signals in different blocks), T is an auxiliary matrix of a predetermined polynomial, and ■ indicates modulo-2 addition for each corresponding bit.

Furthermore, in FIG. 8, ORO is a 23-bit error code detection signal, and 0h-1 to 0h-4, arranged in the same block.
For example, each word of P and Q is X25+X5+X4+x+1
This is the 23-bit remainder obtained when dividing by the generator polynomial, and when the signal from the 11th bit to the 121st bit of the same block is divided by the generator polynomial during playback, the resulting remainder is When it is zero, it is used to detect that there is no II. Further, in FIG. 1, M ar is the control signal, each bit data of which is dispersed, and one bit is transmitted in one block. For example, all bits of the control signal are transmitted in 126 blocks (that is, the control signal consists of 121 bits). Therefore disk 4
If the number of revolutions is -00 rpm, then the disc rotation is J) 31! Since the i0 block is recorded and played back, the 126-bit control signal described above is 2 times during the disk rotation period.
The data will be recorded and played back s times.

FIG. 1 schematically shows an example of the structure of the above control signal.

The total 126-bit control signal is composed of a 42-bit first chapter code op-1, a 42-bit second chapter code 0F-2, and a 42-bit time code TO. The first chapter code 0P-1 is 1
It is obtained by adding the 7-bit synchronization signal, the 4-bit mode signal, the 8-bit chapter signal, the 12-bit chapter local address, and the signal bits from the mode signal to the chapter local address modulo 2. It consists of a 1-bit parity code and a 1-bit parity code.
The second chapter code 0P-2 also has the same configuration and the same values as the first chapter code CP-1 except for the value of the synchronization signal. The above mode signal is a signal indicating the type of 4-channel digital signal recorded on the disc 40. For example, when it is "1100", 3-channel digital audio signal and 1-channel digital video signal are recorded. "11
When it is set to ``10'', a 4-channel digital audio signal is recorded, when it is set to ``1110'', two types of 2-channel digital audio signals are recorded, and when it is set to ``1111'', a 4-channel digital audio signal is recorded. Indicates that the digital video signal is being recorded in two channels. Further, the chapter signal is a signal indicating the number of the recorded music program from the signal recording start position on the disc 4.0.

Further, the time code TC shown in FIG. 1 includes, for example, a 17-bit synchronization signal and first and second chapter codes cp
1. Similar to the mode signal in cp-2, 4 indicates the type of 4-channel digital signal recorded on the disk 40.
A bit mode signal, a 16-bit time identification code indicating the position of the recorded music program on the disk 40 in terms of the total time from the signal recording start position, and an "O" bit which increases by - for each rotation of the disk 40. It consists of a 4-bit track number code indicating a value of ~14 in binary code, and a 1-bit parity code. The above time identification code is expressed in minutes and seconds, and its minimum unit is 1 second. However, when the disk 48 rotates at 900 rpm, it rotates 15 times per second, so the time identification code is Even if the codes have the same value, one music program record can be identified each time the disc 40 rotates by the track number code.

From the signal processing circuit 3T, a digital signal of 130 bits per block shown in Fig. After being modulated using the MIFM) modulation method, the carrier wave of, for example, 7 MHgg is frequency-modulated to produce a frequency-modulated wave signal. This frequency modulated wave signal is recorded on the disk 40 by a recording device 39 using a laser beam or the like.

When the nine-disk recording system proposed earlier by the present applicant is applied, the above-mentioned recording device 32 has a configuration as shown in FIG. 10. In the figure, a laser beam emitted from a laser light source 41 is removed by a light converter FA device 42 to remove drift and noise, and then reflected by a reflecting mirror 43 and divided into two optical paths by a half mirror 44. be done. One of the divided laser beams is inputted to the optical modulator 4s by an output frequency modulated wave signal of the modulation circuit 38 from the input quadrature 46 and a third tracking control reference signal f to be described later.
p3 to form a first modulated light beam. The other laser beam is divided into nine parts and the other laser beam is input to the optical modulator 41 from the input terminal 4s by a first or second tracking control reference signal, which will be described later, which alternately enters every 1 (b) rotation period of the recording master 49. 'p1 or fp2 to form a second modulated light beam.

The first modulated light beam is reflected by a reflecting mirror 50, has its optical path changed, and passes through an information recording optical system consisting of cylindrical lenses 51 and 52, a slit 53, and a convex lens 54, and is then transferred onto a recording master 49. The light is shaped into a rectangle. On the other hand, the second modulated light beam is transmitted through the convex lens 5
5. The tracking recording optical system consisting of a slit 56 and a convex lens s7 shapes the light into a circular shape on the recording master 4I, and then the optical path is changed by reflection fiiiSa.

The first and second modulated light beams, each shaped into a desired shape, are combined onto substantially the same optical axis by a polarizing prism 5, and then pass through a half mirror 60, where a prism 61 has a polarized light beam. Furthermore, the slit 62 and the recording lens 63 are changed.
On the recording master disk 4, on which a photosensitive agent layer 65 is formed on a glass substrate 84, a first modulated light beam is formed in a rectangular shape shown at 66, and a second modulated light beam is formed in a rectangular shape shown at 67. The irradiation is focused in a circular shape.

Note that the recording master disk 49 is disk-shaped and rotates synchronously at a constant speed, and the light reflected by the t+half mirror 60 is applied to the signal monitoring system 6I, and the light reflected by the prism 61 is sent to the monitoring optical system. Added to system 11. The distance between the two modulated light beams on the recording master 49 is measured by the monitoring optical system 6g, and the deviation is monitored by the signal monitoring system SS, and the deviation is corrected by moving the cylindrical lens S1 in the vertical direction in the figure. Let's do it.

The recording master disk 49 is subjected to a known development process and mounting process to create a stamper disk. The disc '40 copied by this stamp board has the following *3
The digital audio and video signals of the channels and the digital video signal of one channel in the signal format shown in FIG. Frequency-modulated waves are recorded as a series of intermittent pits on nine spiral-shaped main tracks, and bands of the frequency-modulated waves are recorded alternately at each disk rotation period approximately in the middle between the track center lines of adjacent main tracks. The sub-track recorded by the burst-shaped first and second tracking control reference signals fp of a single frequency existing in a very low band and the pit string in which fp2 is intermittent is formed. shi, around f, f
A third tracking control reference signal fps is recorded in the main trap pl p2 of the switching connection portion. Further, this disk does not have a guide groove for tracking the playback needle, and has an electrode function.

In this way, - the 371st scan line in which each of the 684 pixel data is generated according to the above formula (1) or C4> formula:
□1:1 yield digital video signal and second film 'l.
The digital video signal color 1 of the first feed λ or the first feed λ is recorded on the disk 4o in time series along with the digital audio signal at a lower sampling frequency.

Next, a digital signal system diagram recorded on the disc 40 is shown. In the figure, a disk 40 is placed on a turntable (not shown) and rotated synchronously at soo rpm. On the disk 4°, as shown in FIG. 12, there is a track width TV consisting of a repeated flat surface TO and bit T1, a track width TV consisting of a) rack pitch TPO main track, and a tracking consisting of a repeated flat surface TO and bit T2. As described above, the control reference signal fp, the recording sub-track, and the tracking control reference signal fp2 recording sub-track formed by repeating the flat surface To and the bit T3 are formed, respectively. The bottom surface 74'b of the playback needle T4 is made to slide on the surface of the disk 40.

As shown in FIG. 11, the regeneration needle T4 is fixed to one end of the cantilever 75, and the permanent magnet 7@ is fixed to the base side of the other end of the cantilever 75. cantilever 1
The fifth permanent magnet 711 is fixed, and the ninth part is surrounded by a tracking coil 11 and a jitter correction coil T8 fixed to the reproducing device. The tracking coil T7 generates a magnetic field in a direction perpendicular to the magnetic field direction of the permanent magnet T6, and moves the cantilever 15 in one direction in the track width direction according to the polarity of the tracking error signal from the tracking servo circuit T1. In addition, the amount of displacement is changed according to the size.

The resonant frequency changes in response to the change in the static capacitance I formed between the disk 40 and the electrode 74a shown in FIG. A resonant circuit, a circuit that applies a constant frequency to this resonant circuit, a circuit that amplitude-detects a high-frequency signal whose amplitude changes according to the change in the capacitance of the resonant circuit, and a high-frequency signal that is detected by this amplitude detection. The high frequency reproduction signal extracted from the pickup circuit 80, which is similar to a circuit for pre-amplifying the reproduction signal (reproduction signal), is supplied to the FM demodulation circuit 11, where the main information signal of the main track (in this case, digital While the audio signal and the digital video signal synthesized in time series are each demodulated, a portion is branched and supplied to the tracking servo circuit 7s.

The tracking servo circuit T1 detects the first signal from the reproduced signal.
to third tracking control reference signal fp, ~fp,
are frequency-selected and taken out, and both reference signals f and f
The envelope detection output of p1 p is obtained by differential amplification and the tracking error signal is sent to the tracking coil I.
Output to T. It's a friend, f for the main track, f
The recording positional relationship is −pl of the disk 40.
Since the tracking polarity is switched every rotation period of the disk 40, the tracking polarity is switched every rotation period of the disk 40 by a switching pulse generated based on the detection output of the tracking control reference signal fp. In addition, when the tracking servo circuit 10 receives the K L, 11 TS command signal at the input terminal 82, the regeneration needle T4 is forced to move 1 track point, J:, □: 1 minute or more accordingly. The tracking coil T1 is driven so as to move the track widthwise direction.

On the other hand, the demodulated digital signal extracted from the FM demodulation circuit 81 is applied to the decoder @3, where it is MUM decoded and converted into a time-series composite signal with the signal format shown in FIG. The beginning of the signal block is detected based on 8YNO, the serial signal is converted into a parallel signal, and further false detection is performed. Only when an error is detected, the error signal is corrected and restored using the error code correction signals p and Qt-. In this way, each of the three channels of the 16-bit four-channel digital signal is corrected and restored as necessary, and the signal arrangement is restored to its original order before interleaving. The channel 16-bit digital audio signal is converted into a 1-Cyan analog audio signal by the DM converter in the decoder 83, and then sent to the output end, F-14, I
The signals are output to S and 86 separately. The calculated pickup control signal is connected to a predetermined circuit (
(not shown).
1. On the other hand, the digital video signal having the signal format shown in FIG. 4 and FIG. The number of scanning lines is converted from 625 lines to 525 lines.

FIG. 13 is a diagram schematically showing how the number of scanning lines is converted. In the figure, Yo is the first digital luminance signal of the first scanning line of the 625 scanning line system as shown in Figure S.
In the pixel data of the sampling point, Y4.6 similarly indicates the pixel data of the first sampling point of the digital luminance signal of the second scanning line.

As can be seen from FIG. 5, the above pixel data Yo and Y4, 6 are transmitted at the beginning of the video signal section V, and this pixel data Y. (This is data obtained by shifting Yo by 1 bit in the direction of L8B, and data obtained by multiplying Yo by 2.
data shifted in the direction of bit L8B) and pixel data Y456 in the direction of L8B.
The pixel data Y° of the first sampling point of the first scanning line of the 525-scanning-line digital luminance signal is generated by mixing the bit-shifted one-time data. Double the data is in the auxiliary memory (
1 line memory) 105. Thereafter, in the same way as above, the data from the first scanning line of the 62S scanning line system is mixed at the sample points in the same word, and the data is mixed into the pixel data of the first scanning line of the 525 scanning line system. converted.

The pixel data of each sample point of the third scanning line of the 1125 scanning line system of the video signal v2 that is subsequently reproduced is multiplied by 1 (L8
(obtained by shifting 1 bit in direction B), the pixel data is mixed with the pixel data read from the auxiliary memory 103 of the same sample point and converted into pixel data of the second scanning line in the 525-scanning line system. be done. Y9,2 has 6 scanning lines
The pixel data of the first sampling point of the digital luminance signal of the third scanning line in the 25-line system, and Y456'' indicate the pixel data of the 111th sample point of the digital luminance signal of the second scanning line of the 525-scanning system. Also Y1568, Y1824, Y
2280 is pixel data of a hydraulic digital luminance signal with 625 scanning lines, Y1568 is the first sampling point of the fourth scanning line, Y1824 is the first sampling point of the fifth scanning line, Y228
0 is the pixel data of the digital luminance signal of the 6th scanning line, and "9"
, 2° is the first sample point of the third scanning line, Y1548° is the fourth
The first sample point of the scanning line, and Y1824' indicates the pixel data of the first sample point of the fifth scanning line.

As shown in Figure 13, the number of scanning lines such as Y912 is 62.
! Pixel data for each sample point of the third scan line in the single-line method While pixel data for each sample point of the scan line is obtained, the latter data is stored in the auxiliary memory (one line memory) 1o4. Similarly, the pixel data of each sample point of the fifth scanning line such as Y1824 is multiplied by 3/4, and then mixed with data obtained by multiplying the pixel data of the same sample point read from the auxiliary memory 184 by 1/2. The pixel data of the 4th scanning line of a 525-scanning system such as Y1548'' is obtained, and the pixel data of the 6th scanning line of Y2280 etc. is directly obtained from the 5th scanning line of a 525-scanning system. It is considered as pixel data. Thereafter, the same operation as above is repeated, and the pixel data of the 6 scanning lines of the 62s scanning line system are mixed at a predetermined mixing ratio, and the pixel data of the 5 scanning lines of the 525 scanning line system are mixed. It is converted into pixel data.

Here, as is clear from the above explanation, there is an auxiliary memo to be used when calculating the number of scanning lines. J 103.104 is
A common one-line memory is used in turn. On the other hand, as mentioned above, the number of sample points (number of pixel data) of the digital luminance signal is expressed as the product of -456 sample points per horizontal scanning line and 572 effective scanning lines, which is 260,83
In contrast, the number of bits of four 64kRAMs is 282, 144 (-216X4) bits, so 1
This means that there is a margin of 312 bits. In other words, the four 64k RAMs have extra memory capacity to store each 1 bit of pixel data of sampling points of digital luminance signals for 2H or more, so this is used as the above-mentioned auxiliary memories o3 and 104. be able to. Note that the reading and writing of the auxiliary memories 03 and 104 is performed using the standard television method (which is taken out from the output terminal 102).
Here, this is performed within the horizontal blanking period of a color video signal of the NT80 system.

Further, the above-mentioned scanning line number conversion circuit 8T is connected to a memory 94 which will be described later.
．． When each Is is a field memory, the nine scanning line number conversion described above is performed on the digital video signal itself of the reproduced third field, and on the other hand, the memory 14
．． When 85 is a frame memory, the reproduced digital video signal of the third field is subjected to the above-mentioned inverse calculation process to become the original digital video signal of the first field (or second field). The above scanning line number conversion will be performed later for restoration and reproduction. Note that, in practice, a pixel data of 6 bits is sufficient to obtain good image quality, but on the other hand, as described above, the information of L8B1 bits is lost due to the inverse calculation process, so at least 7 bits are required for rounding to reproduce with good image quality. Inverse calculation processing must be performed using an auxiliary memory circuit of (-6+1) bits or more. When performing the above inverse arithmetic processing within a playback device, it is better to transmit the pixel data of adjacent scanning lines in the same word as described above, which reduces the number of times of memory writing and reading. You can also increase the amount of auxiliary memory required.

In this way, the scanning line number conversion circuit II7 is a circuit that converts pixel data of the 62s scanning line system into pixel data of the 525 scanning line system, but the pixel data is in the format shown in FIG. The conversion operation is easy. This scanning line number conversion circuit 1 is a circuit necessary only for a playback device that reproduces and outputs an analog color video signal compliant with the IT80 system (as shown in Fig. 11). This circuit is unnecessary for a playback device that plays back and outputs analog color video signals conforming to the 81CAM and 81CAM systems. However, depending on the playback device, a changeover switch may be provided to switch the input/output of the scanning line number conversion circuit 870, and the circuit 8T may be switched to be activated or deactivated depending on the number of scanning lines of the television system being reproduced. good. The output pixel data of the scanning line number conversion circuit 8T is supplied to the memory 94 or ss by the switch circuit 88.

Furthermore, nine digital video signals are sequentially extracted in time series from the decoder 63 in the signal format shown in FIG.
Synchronous signal detection circuit 89. The signal is also supplied to a header signal detection circuit 91 and a memory write controller 92, respectively. The synchronization signal detection circuit 8s detects the synchronization signal in the header signal and supplies the detection signal to the control circuit 90. The header signal detection circuit 91 discriminately reproduces each code and address signal other than the synchronization signal in the header signal and sends it to the control circuit 90.
supply to

The control circuit 90 is supplied with each code detection signal of the synchronization signal detection signal and the header signal, and furthermore, the control circuit 90 is supplied with each code detection signal of the synchronization signal detection signal and the header signal, and furthermore, by operating an external switch etc. (which can be arbitrarily selected when different images are recorded) are supplied from the input terminal 93, and these input signals are discriminated and decoded to the scanning line number conversion circuit IT1 switch circuit 8.
8. Controls the memory write controller 12, switching circuit IT, etc. The memory write controller s2 writes pixel data in the digital video signal supplied to the memory I4 or 15 to a predetermined address based on the address signal in the header signal.
The signal is controlled so that it is not written. The switch circuit 88 is switched to the terminal a or b by a control signal from the control circuit 90 based on the memory write designation code in the header signal, and outputs the digital video signal to the memory s4 or Is designated by the memory write designation code. supply.

The memories 94 and 95 contain reproduced pixel data for one frame written based on a read control signal from a memory read controller and a synchronization signal generation circuit 96, or a total of two fields each for one field. The reproduced pixel data is read out simultaneously, and the jitter associated with reproduction is also corrected. Here, the digital luminance signals read from memories 4 and 95 have sampling frequencies -MEN,
The first and 20th digital color difference signals are read out with a quantization number robit, and the sampling frequency is L2S MHg.
.

The signals are read out with a quantization number of 6 bits and supplied to the respective switching circuits 9T.

Next, the above memory 14. The configuration and operation of Is will be explained in more detail. FIG. 14 shows a block system diagram of an embodiment of the memory 14.95 and part of the memory write controller I2. Further, a part (auxiliary memory) of the scanning line number conversion circuit 8T can also be included. In the same figure, M11,
M21,...M61, M12, M62, M15, M2
3, . . . M65 . A signal is provided. When memory 94°95 is a frame memory, 36 R
A total of two sets of AMM11 to M44 are required, but if it is a field memory, only one set is sufficient. Although not shown, the switch circuit &! A first buffer memory stores a group of pixel data to be transmitted using the upper 8 bits of each word of each word of the video signal portion of the signal format as shown in FIG. A second buffer memory is provided for storing a group of pixel data to be transmitted in units of six words of pixel data.

In addition, B1, B2, ..., B4 are supplied with pixel data from the first and second buffer memories, and 6-contact changeover switches (actually analog switches that operate electrically) selectively output the pixel data. ), B1 is RAM M11,
Pixel data M8R is supplied to one of the RAMs M12...M16. Similarly, the changeover switch 82~
81 out of 86 (1-2 to 6) are RAM M
RA of any one of ij (9 numbers j-1 to 6)
The first high-order bit of pixel data is supplied to M. Therefore,
In the memory circuit shown in FIG. 14, the lower two bits of the .-bit pixel data are discarded, but their influence on the reproduced image does not pose a problem. Of course, 64 kR
It is possible to store all 8 bits of pixel data by adding 12 more AMts, but as a consumer digital video signal reproducing device, it is better to use a memory circuit with the configuration shown in Figure 14. It is advantageous in terms of price.

Next, to explain the operation of the above memory circuit, first,
The hexadecimal value from the address signal generation circuit 105 is “0”.
The 16-bit address signal “000” is RAM
, ~M64, respectively. On the other hand, selector switch S1
- RAM M11, M21, M31 through S6 respectively
M41 M51 and M61 have pixel data Y shown in FIG.
The upper 6 bits of 0 are supplied. This allows RAM
The MSB data of Y0 is stored at address "0000" of M11, and the data of the second most significant bit of Y0 is stored at address "0000" of M21. M31, M41M5
1 and M61 address “0OOO” in the same way.
Data of the third, fourth, fifth, and sixth most significant bits of 0 are stored, respectively.

Next, leave the value of the address signal as it is and switch S1~
S6 is switched, and the upper 6 bits of pixel data Y1 are R.
AM M12, M22, M32, M42, M52 and M
62, one bit each, and the address “0O
OO”. Thereafter, in the same manner as above, the value of the address signal is left as is, and the changeover switches B, -
s6 is switched sequentially, 14'24, black 6,
46・”56 and M44 1@legal value r 01@O
Pixel data (B-Y) at address J. When the upper 6 bits of data have been stored bit by bit, the address signal generation circuit 105 then outputs the value roeo1 in decimal notation.
An address signal indicating the address is output, and pixel data Y4, Y5, Y6, Y7 (R-Y) 1, and (B-Y) 1 are stored in addresses "0001" of RAMM11 to M61 in the same way as above. be done. From then on, the same operation as above is repeated, and the address increases by 1.
When the pixel data groups of the scanning lines are stored in the RAMMs, .
An address signal with the value "0072" in hexadecimal notation is generated,
The upper 1 bit of the pixel data Y456 of the first sample point of the second scanning line shown in FIG.
One bit is applied to M51 and M61 and stored. After that, the changeover switch 8. is pressed while the value of the address signal remains unchanged. -84 are switched, and the upper six bits of pixel data Y457 are applied to RAMM, M12M22, . . . M62. As a result, address “00” of RAMM, 2
72", pixel data Y4570MSB data is written, and the address "0072" of RAM M22, M32, . . . M62 is written with the 2nd bit, 3rd bit, . . . , 6th bit of Y457, respectively. data is written. Thereafter, the address is incremented by 1 in the same manner as described above, and writing of the pixel data group of the second scanning line is completed. The pixel data of the first six words of the third scanning line is written to the address of the hexadecimal value room4J, and the pixel data of the first six words of the fourth scanning line is written to the address of the hexadecimal value r1.
It is written to address 511J.

In this way, pixel data for one frame or one field is written into memories '11 to M66 for two fields, but among the pixel data transmitted in six consecutive words, the same scanning line 6 pixel data (consisting of 4 pixel data of digital luminance signal and 1 pixel data of 2 types of digital color difference signals) are stored in 36 RAMMs.
, , ~M66 are written to the same address. Here, since the memory circuit shown in FIG. 14 is driven by the same address signal, it is necessary to perform writing and reading in a time-division manner. Specifically, according to the read control signal from the memory read controller and synchronization signal generation circuit 9I shown in FIG. 11, the IH period (@4μ8・C)
The visual period (approximately 51μm・
C) RAMM4. ~M46 is read,
Writing is performed within the horizontal blanking period (approximately 13 .mu.m5o), and reading and writing from the auxiliary memory Q for converting the number of scanning lines are performed. Ma゛9RAMM...~'6
By reading 6, the above-mentioned 96 pixel data at the same address are simultaneously read.

Returning to FIG. 11 again, the read pixel data of one of the memories I4 and 95 configured as shown in FIG. The pixel data of the digital luminance signal that is selectively output is supplied to the DMU converter I8, and the pixel data of the two types of digital color difference signals are supplied to the DMU converters 89 and 100, respectively. Here, the switching circuit 97 selects and outputs the read output of the other memory from the memory 94 and the Igi which had been selectively outputting the read output in accordance with the switching control signal supplied when the EOD signal is detected. It can be switched to

The analog signal taken out from the DA converter 98 and the D
Nine color difference signals (B
-Y) and (RY), the horizontal and vertical synchronization signals and the color burst signal extracted from the memory read controller and synchronization signal generation circuit St are respectively supplied to the encoder 011 and are compliant with the NT80 system. After being generated as a color video signal, it is outputted from the playback output terminal 102 to a monitor color television receiver (not shown), where the audio signal is outputted from the output terminals 84, 85, and 86 to be played back and sounded. Color still images and partial moving images are displayed as supplementary information for listeners to listen to music.

As can be seen from the explanation in FIG. 14, if each pixel data is composed of n bits, 64 hRAM
A mesori 14.15 can be constructed by using (4+4+1)xn number of chrominance signals, but if it is acceptable to further reduce the resolution of the color signal, the color difference signals (R-Y) and (B-Y) can be set as line sequential. memory! By incorporating it into 14.95, (4+
1) Xn, that is, when n is 6 bits, 30 41
A memory 114°BS can be configured with 4 kRAM.

Also, since 256 kRAM has 282,144 (-2) bits, it is preferable that one frame of one bit signal can be written in one RAM. In this case, it depends on the read speed of the RAM, but if the read speed is slow, 2
There is also a method of configuring it as a full memory circuit and using two RAMs in a time-sharing manner. Furthermore, with the speed of delivery ♀4
14. Since it is read from Ig, one RAM is
It can be used in a time-division manner for different types of digital color difference signals.

Note that the above explanation has been about image transmission in standard mode, but when transmitting high-definition, high-quality images, or when transmitting moving images using run-length codes, the image type provided in the header signal The value of the identification code is discriminated and reproduced, and the output signal of the control circuit (2) controls the scanning line number conversion circuit 8T and the memory write controller I2 as necessary to select the format for loading into the memory 94.95.

Further, when the memories 94 and 115 are respectively field memories, the reproduced digital video signal of the third field is stored in the memory 14. Of course, it is written to Is. In this case, only the pixel data of the third field of the upper 8 bits or lower 8 bits of each word of the signal format shown in FIG. 5 will be written as is into the memory 114°ss without being restored and reproduced. This allows the output terminal 1 to
The color video signal output to 02 is reproduced and displayed as a field image with less jaggies and which approximates a frame image.

If only the digital video signal of the third field is recorded on the disk 40 in the signal format shown in FIGS. 4 and 5, the code indicating frame transmission or field transmission in the header signal is discriminately reproduced. Particularly, in a digital signal reproducing device having a frame memory, the above-mentioned inverse operation processing is stopped and the digital video signal of the third field is stored in the memory 94 for two fields.
On the other hand, since a digital signal reproducing device having only a field memory does not originally have the above-mentioned inverse arithmetic processing circuit, the digital video signal of the third field reproduced as is is written to the memory 14 or II. It turns out.

In the above explanation, the case where the application is applied to the disk recording method and playback device proposed earlier by the present applicant was explained, but the invention is not limited to this, and the capacitance change reading device having a tracking guide groove has been described. The present invention can also be applied to type discs and discs on which previously recorded signals are read by a light beam. In addition, the television receiver has R, G,
If it has three primary color signal input terminals of B, encoder 1
111, a matrix circuit is used to convert the luminance signal Y and color difference signals (RY), CB-Y) into three primary color signals R, G, and B and supply them to the above input terminals separately. This allows the television receiver aircraft to produce still images of extremely high quality. Further, the color difference signal recorded on the disk 40 may be a combination of (G-Y) and (RY) or (B-Y), and may also be an I signal, a Q signal, or a primary color signal. Of course.

As described above, the digital video signal reproducing apparatus according to the present invention has a first field digital video signal obtained by digital pulse modulation of an analog video signal for one frame, and a field digital video signal.
The pixel data of the digital video signal of the first field (or the second field) is mixed with the pixel data of the digital video signal of the second field (or the first field) by reducing the pixel data at a relatively large attenuation ratio. A field image recording medium in which only the digital video signal of the third field is recorded, or the digital video signal of the third field is used as the digital video signal of the first field (or the second field) and the second field (or the first field) ), and when reproducing a field image, the digital video signal of the third field reproduced from the field image recording medium or the frame image recording medium is taken into the memory circuit, and the frame During image reproduction, the scanning line of the digital video signal of the third field of the digital video signal of the second field (or the first field) is converted from the pixel data of the digital video signal of the third field reproduced from the Mayuki frame image recording medium. The pixel data of two adjacent scanning lines are attenuated and subtracted to restore and reproduce the original digital video signal of the first field (or second field), and the restored and reproduced digital video signal and the second field are (or the first field) are sequentially taken into the memory circuit, and the digital video signals taken into the memory circuit are read out and passed through the DA converter to obtain the playback analog video signal. Compared to conventional field images, there is less reduction in vertical resolution, and therefore it is possible to reproduce high-quality field images that are extremely close to frame images with less jaggies. Since the video signal is restored and played back to its original field and then stored in the memory circuit along with the played digital video signal of the other field, it is possible to play back high-quality frame images without flickering, just as before. The pixel data of the digital video signal is taken into the memory circuit using an auxiliary memory circuit whose quantization number is at least one bit larger than the quantization number, and performs arithmetic processing for restoring and reproducing the digital video signal of the third field. Therefore, it has many features such as being able to reproduce with good image quality even if, for example, about one bit of pixel data information is lost (due to arithmetic processing).

[Brief explanation of drawings]

FIG. 1 is a block system diagram showing an example of the main part of a recording system for a signal to be reproduced by the apparatus of the present invention, and FIGS. 2(A) and (B)
3(A) and 3(B) are diagrams showing other examples of the frame image and field image, respectively, and FIG. 4 is a diagram showing an example of a frame image and a field image when displaying diagonal lines, respectively. Figure S is a diagram showing the signal format of an example of the video signal section in Figure 4. Figure 6 is a diagram showing the signal format of an example of the video signal section in Figure 4. FIG. 7 is a block system diagram showing another example of the main part of the recording system of the signal to be reproduced by the device of the present invention, and FIG. 8 is a diagram showing another example of the format. FIG. 1 is a diagram showing an example of the signal format of one block. FIG. 1 is a diagram showing an example of the signal format of the control signal in FIG. 8. FIG. 10 is a diagram showing an example of the signal format of the control signal in FIG. 8. FIG. System diagram, FIG. 12 is a partially enlarged perspective view showing an example of the sliding situation between the playback needle and the disc-shaped recording medium in FIG. 11, and FIG. 13 explains an example of the conversion operation of the scanning line number conversion circuit. FIG. 14 is a block system diagram showing an example of the configuration of the memory, etc. in FIG. 11. 1... Video signal source, 2... TV synchronization signal generator, 3
... Matrix circuit, 4. s, s, ss...AD converter, 9-11. Ill; previous table; - product... memory, 15
, j7... switching circuit, 17... header signal generator,
19...Digital recorder, 30-32...Analog audio signal input terminal, 3@...Control signal generation circuit, 31...Signal processing-::j l, 'path, 39...Recording device, I . 40... Disc-shaped recording medium < i, Tesku), 41... Laser light source, 42, 45.47... Optical modulator, 74...
... Regeneration needle, 74a... Electrode, T6... Permanent magnet, T
i+...Tracking servo circuit, 80...Pickup circuit, 83...Decoder, 84-86...Analog audio signal output terminal, 87...Scan # number conversion circuit, 88...Switch circuit, ■o... ...control circuit, sl
. . . Header signal detection circuit, 12 . . . Memory write controller, 84. Is...Memory, -6...Memory read controller and synchronization signal generation circuit, III~
100...DM converter, 1o1...Encoder, 1
o2...Analog video signal output terminal, 103, 1
04...Auxiliary memory, 105...Address signal generation circuit, Ml, ~M66...114kRAMS8. ~S4
...Selector switch. Figure 2 iAl 1Bl (Al tB+ --1-1 Garden Figure 6 Figure 13 Figure 7 Figure 18 Figure S Figure 9 Figure 10 Figure Mu 1 42 43 Laser runner 68 5756 4 Fi' Tomigo
46 ★-@521 61
t( 60/' $ Procedural amendment May 16, 1980 Kazuo Wakasugi, Commissioner of the Japan Patent Office 1. Case number: 1982 Patent Application No. 77876 2. Title of invention: Digital video signal reproducing device 3. Make amendments. Patent applicant 11 Location: 3-121 Moriya-cho, Kanayō-ku, Yokohama-shi, Kanagawa Prefecture, 221 Place name (432) Japan Victor Co., Ltd. Representative Director and President Michi Shishi - Department 4, Agent (1 location: Chiyoda-ku, Tokyo, 102) 5-7-6 Kojimachi, Detailed description of the invention in the specification subject to amendment. 7. Contents of the amendment (1) In the specification, page 53, line 20 to page 54, line 3 [ Pixel Y-data group...Stored] is set to ``the first 7 meters that stores 111 worth of pixel data groups, and the lower 8
It is supplemented by ``memorize the pixel γ-data group for I L1 transmitted by the pixel.''. ■ "To explain," in the second line of page 55 of the same document is amended as follows. However, for convenience of explanation, the reproduction digital video signal is directly supplied to the main 94.95 without passing through the scanning line number conversion circuit 87, and thereby the PAL or SE
We will explain the case of a so-called re-installation device that uses an A/V color video A signal for reproduction based on the CAM system. 1 ■ On the other hand, 1 and 1 switching...・Insert the first buffer candy ``Rikara'' between ``.'' and ``.''. (4) rM+6 on page 56, line 2. M part...
・. and M44” to “M13~M41 + M14~M
44. M+s~M- and M+s~M-''. δ) "Pixel data..." on page 56, lines 3 to 5.
・When it is finished being memorized, ” is corrected as follows. “Pixel data Y2, Y3 (RY)Ol(B-Y)・
The upper six bits of data are stored bit by bit, and writing of the first divided pixel data group (here, four luminance pixel data and two color difference pixel data) of the first scanning line is completed. ” f3) On page 56, line 13 of the same page, change “Once it is memorized,” to “
It ends up being remembered. ” he corrected. ■ Same, page 56, line 17, ``...6 bits are J and r.
"From the second buffer memory □" is inserted between "RAM...". : ■ Correct "pixel data" from line 20 on page 56 to line 1 on page 57 to "pixel data from buffer memo of status 1.i". ■) Same, page 57, lines 9 to 13 [3rd scanning line/
...Written. ] is corrected as follows. "Writing to the video signal sections ■3, ■4, ■5, etc. is performed in the same way, and the last pixel of the 571st and 572nd scanning lines (285th and 286th scanning lines in the case of field forwarding) The data group is at RAM address r[r45J and rFEB7J (r7EE in case of field sending)
9J and r7F5BJ), and writing of one frame or one field is completed. ” (10) “Read out” on page 58, lines 10 to 14 is corrected as follows. Also, when reading out the RAM !Vtn~M-, the six pixel data mentioned above at the same address are read out at the same time, and the address is incremented by 1 from r0000J.From the reproduced signal, NTSC In order to output the Afrolog video signal conforming to the standard format, the digital T6 video signal of the decoder 83 is converted to the number of scanning lines by the circuit 87 and then written into the memory 94 or 95. 1 of the combination
The write operation to the memory circuit is as simple as increasing the number of data by 5/6 times. Since it is the same as the explanation, the explanation is omitted here. ”

Claims (3)

[Claims] (1) One frame worth of analog video signal is digitally pulse modulated to obtain a digital video signal of the first field (or second field) of the first field digital video signal and second field digital video signal. By attenuating and mixing the pixel data of the digital video signal of the second field (or the first field) with the pixel data of the digital video signal at a relatively large attenuation ratio, only the digital video signal of the third field is mixed. The recorded field images are recorded on a recording medium, or the digital video signal of the third field is used together with the digital video signal of the second field (or the first field) as the digital video signal of the first field (or the second field). The recorded frame image recording medium is reproduced, and at the time of field image reproduction, the digital video signal of the field image recording medium or the third field reproduced from the frame image recording medium is taken into the memory circuit, and at the time of frame image reproduction, the digital video signal of the third field is read. From the pixel data of the digital video signal of the third field reproduced from the frame image recording medium, two pixels adjacent to the scanning line of the digital video signal of the third field of the digital video signal of the second field (or the first field) The pixel data of the scanning line of the book is subtracted and restored to the original digital video signal of the first field (or the second field), and the restored and reproduced digital video signal and the second field (or the second field) are reproduced. 1 field) are sequentially stored in a memory circuit, and the nine digital video signals are read out and passed through a DM converter to obtain a reproduced analog video signal. A digital video signal reproducing device featuring features. (2) Restoration and playback of the digital video signal of the first field (or second field) based on the digital video signal of the third field is performed by reproducing the digital video signal of the second field (or first field). The third field of the signal is subtracted from the pixel data of the fields of two scanning lines adjacent to the scanning line of the digital video signal, and the obtained nine pixel data is doubled. The digital video signal reproducing device according to item 1 of the scope of the invention. (3) An operation for restoring and reproducing the digital video signal of the third field using an auxiliary memory circuit whose quantization number is one bit or more larger than the quantization number into which the pixel data of the cough digital video signal is taken into the memory circuit. 3. The digital video signal reproducing apparatus according to claim 2, wherein the digital video signal reproducing apparatus performs processing.