JPS58194517U - Shock noise prevention circuit - Google Patents
Shock noise prevention circuitInfo
- Publication number
- JPS58194517U JPS58194517U JP9084382U JP9084382U JPS58194517U JP S58194517 U JPS58194517 U JP S58194517U JP 9084382 U JP9084382 U JP 9084382U JP 9084382 U JP9084382 U JP 9084382U JP S58194517 U JPS58194517 U JP S58194517U
- Authority
- JP
- Japan
- Prior art keywords
- capacitor
- turned
- prevention circuit
- noise prevention
- shock noise
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は従来のショックノイズ防止回路を示す パ回路
図、第2図は本考案の一実施例を示す回路図、第3図は
本考案の回路と比較するために描いた回路図である。
Q□・・・リップルフィルタ用トランジスタ、Q2・・
・コンデンサ放電用トランジスタ、Q3・・・制御用ト
ランジスタ、C’b C5・・・コンデンサ、R3〜R
6・・・抵抗。Figure 1 is a circuit diagram showing a conventional shock noise prevention circuit, Figure 2 is a circuit diagram showing an embodiment of the present invention, and Figure 3 is a circuit diagram drawn for comparison with the circuit of the present invention. . Q□・・・Ripple filter transistor, Q2...
・Capacitor discharge transistor, Q3...Control transistor, C'b C5...Capacitor, R3~R
6...Resistance.
Claims (1)
ックノイズ防止回路において、リップルフィルタを構成
するコンデンサの放電回路に、エミッタが負電源に接続
されるコンデンサ放電用トランジスタと、制御用トラン
ジスタとを備え、該、制御用トランジスタは電源切断時
にはオフとなって前記コンデンサ放電用トランジスタを
オンとすることにより、コンデンサの電圧レベルやコン
デンサ放電用トランジスタの飽和電圧に無関係に瞬時に
コンデンサが放電されるように構成したことを特徴とす
るショックノイズ防止回路。In a shock noise prevention circuit that prevents noise generated when power is turned on and off, a capacitor discharging circuit constituting a ripple filter includes a capacitor discharging transistor whose emitter is connected to a negative power supply, and a control transistor. The control transistor is turned off when the power is turned off and the capacitor discharging transistor is turned on, so that the capacitor is instantly discharged regardless of the voltage level of the capacitor or the saturation voltage of the capacitor discharging transistor. A shock noise prevention circuit characterized by:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9084382U JPS58194517U (en) | 1982-06-17 | 1982-06-17 | Shock noise prevention circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9084382U JPS58194517U (en) | 1982-06-17 | 1982-06-17 | Shock noise prevention circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS58194517U true JPS58194517U (en) | 1983-12-24 |
Family
ID=30099296
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9084382U Pending JPS58194517U (en) | 1982-06-17 | 1982-06-17 | Shock noise prevention circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58194517U (en) |
-
1982
- 1982-06-17 JP JP9084382U patent/JPS58194517U/en active Pending
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