JPS5844643U - Dettman timer - Google Patents
Dettman timerInfo
- Publication number
- JPS5844643U JPS5844643U JP13708081U JP13708081U JPS5844643U JP S5844643 U JPS5844643 U JP S5844643U JP 13708081 U JP13708081 U JP 13708081U JP 13708081 U JP13708081 U JP 13708081U JP S5844643 U JPS5844643 U JP S5844643U
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- capacitor
- turned
- timer
- microcomputer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Debugging And Monitoring (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は本考案によるデツトマンタイマの一実施例を示
す回路図、第2図a、 bは第1図に示す回路の各部
動作波形図である。
1・・・マイクロコンピュータ、2.6・・・トランジ
スタ、4・・・コンデンサ、5.15・・・インバータ
、11・・・比較器、14・・・オアゲート、3.7.
−9゜10.12.13・・・抵抗。FIG. 1 is a circuit diagram showing an embodiment of a dead man timer according to the present invention, and FIGS. 2a and 2b are operation waveform diagrams of each part of the circuit shown in FIG. 1. 1... Microcomputer, 2.6... Transistor, 4... Capacitor, 5.15... Inverter, 11... Comparator, 14... OR gate, 3.7.
-9°10.12.13...Resistance.
Claims (1)
される周期信号によりオンとなる第1トランジスタと、
前記第1トランジスタのオンによって充電される抵抗と
コンデンサの直列体からなる充電回路と、前記周期信号
の反転信号によりオンとなる第2トランジスタと、前記
第2トランジスタを介して前記コンデンサの両端間に接
続された放電用の抵抗と、前記コンデンサの両端電位を
入力として、上限値部よび下限値を越えた時点にマイク
ロコンピュータにリセット信号を供給するウィンドコン
パレータとを備えたデツトマンタイマ。a first transistor that is turned on by a periodic signal generated from a microcomputer in response to loop processing;
a charging circuit consisting of a series body of a resistor and a capacitor that are charged when the first transistor is turned on; a second transistor that is turned on by an inverted signal of the periodic signal; and a charging circuit that is connected between both ends of the capacitor via the second transistor. A dead man timer comprising a discharge resistor connected to the capacitor, and a window comparator which inputs the potential across the capacitor and supplies a reset signal to a microcomputer when the upper limit value and the lower limit value are exceeded.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13708081U JPS5844643U (en) | 1981-09-17 | 1981-09-17 | Dettman timer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13708081U JPS5844643U (en) | 1981-09-17 | 1981-09-17 | Dettman timer |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5844643U true JPS5844643U (en) | 1983-03-25 |
Family
ID=29930374
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13708081U Pending JPS5844643U (en) | 1981-09-17 | 1981-09-17 | Dettman timer |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5844643U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS628673A (en) * | 1985-07-05 | 1987-01-16 | Matsushita Electric Ind Co Ltd | Detection circuit for sound multiplexing signal |
-
1981
- 1981-09-17 JP JP13708081U patent/JPS5844643U/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS628673A (en) * | 1985-07-05 | 1987-01-16 | Matsushita Electric Ind Co Ltd | Detection circuit for sound multiplexing signal |
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