JPS5819055A - クロツク再生回路 - Google Patents

クロツク再生回路

Info

Publication number
JPS5819055A
JPS5819055A JP56117023A JP11702381A JPS5819055A JP S5819055 A JPS5819055 A JP S5819055A JP 56117023 A JP56117023 A JP 56117023A JP 11702381 A JP11702381 A JP 11702381A JP S5819055 A JPS5819055 A JP S5819055A
Authority
JP
Japan
Prior art keywords
timing
circuit
signal
output
burst
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56117023A
Other languages
English (en)
Japanese (ja)
Other versions
JPS639784B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html
Inventor
Kotaro Kato
加藤　興太郎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP56117023A priority Critical patent/JPS5819055A/ja
Publication of JPS5819055A publication Critical patent/JPS5819055A/ja
Publication of JPS639784B2 publication Critical patent/JPS639784B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0331—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop with a digital phase-locked loop [PLL] processing binary samples, e.g. add/subtract logic for correction of receiver clock

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP56117023A 1981-07-28 1981-07-28 クロツク再生回路 Granted JPS5819055A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56117023A JPS5819055A (ja) 1981-07-28 1981-07-28 クロツク再生回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56117023A JPS5819055A (ja) 1981-07-28 1981-07-28 クロツク再生回路

Publications (2)

Publication Number Publication Date
JPS5819055A true JPS5819055A (ja) 1983-02-03
JPS639784B2 JPS639784B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1988-03-02

Family

ID=14701526

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56117023A Granted JPS5819055A (ja) 1981-07-28 1981-07-28 クロツク再生回路

Country Status (1)

Country Link
JP (1) JPS5819055A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6464434A (en) * 1987-09-03 1989-03-10 Nec Corp Digital phase control circuit
JPH09149017A (ja) * 1995-11-24 1997-06-06 Oki Electric Ind Co Ltd Ｐｌｌ回路及びビット位相同期回路

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6464434A (en) * 1987-09-03 1989-03-10 Nec Corp Digital phase control circuit
JPH09149017A (ja) * 1995-11-24 1997-06-06 Oki Electric Ind Co Ltd Ｐｌｌ回路及びビット位相同期回路

Also Published As

Publication number Publication date
JPS639784B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1988-03-02

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