JPS58189767A - Electronic register device - Google Patents

Abstract

PURPOSE:To hold a changed program in an electronic register device which registers and processes various types of transaction information, by backing up an RAM with a back-up battery power supply. CONSTITUTION:A back-up battery power supply 13 backs up an RAM3 which has the same address as a mask ROM2 and registers the presence or absence of a program change to each address of the ROM2, an RAM4 which records a corrected program, and an RAM5 which records a program change address and the corrected program in the form of a pair. Therefore the information recorded to RAM3-5 can be held although the power supply of an electronic register device is turned off. This eliminates the second storage during the register processing.

Description

[Detailed Description of the Invention] +The invention is based on "Kameko equipment" (hereinafter referred to as "electronic register device", ECR) such as electronic gear horns that register and process each 1Φ transaction information, or teller suits used in banking operations. (abbreviated as ), in particular, if a part of a program such as a program written in a fixed memory device is changed or modified without any other reason,
One VC can make changes or modifications to the program easily and easily. This is related to ECR.

Generally, when writing various ECR transaction processing programs into a fixed memory device, an inexpensive mask ROM (read-only memory) is used. However, this RO
Once a processing program is programmed into M, the processing program is fixed and then changed.
'C processing processing program, -/ After loading the program into the flash ROM, it often happens that you want to change or modify a part of the processing block. It was necessary to replace the mask ROM with a mask ROM in which the block ROM had been written.As a result, any attempt to change or modify the block ROM would not only be very expensive, but also require a great deal of time and effort. This made it difficult to make changes.

The present invention was made with the purpose of providing an ECR that eliminates the above-mentioned problems, and to achieve this purpose, an ECR that implements the present invention has a transaction registration processing method of this device or a registered The first part permanently stores programs such as processing programs for checking and processing data.
It has a memory means (mask ROM) and a 71-" V bus identical to the first memory means, and has a corresponding memory at each address location.

a second storage means for storing information indicating whether or not a program has been changed; a third storage means for storing a program change address of the first storage means and a storage address of a modification program thereof; The fourth part of the program that memorizes the modified address that is different from the address of the user
and a battery power source for back-amplifying the second, third, and fourth storage means, and with such a configuration, 1.4: The invention can be realized by the mask described in 1-1. By making it possible to modify the program without replacing the ROM, an F-register device is provided which can store the modified program regardless of whether the device is powered on or off.

f41: Detailed description of one embodiment of the invention with reference to the drawings
FIG. 1 is a block diagram showing the configuration of an ECR in which the present invention is implemented.

In FIG. 1, reference numeral 1 denotes a central processing unit (CPU), and the CPU I has a first storage means (mask ROM) for fixedly storing various transaction processing blocks, etc.
2 and a second storage means (RA) having the same address as this mask ROM 2 and storing the state of the program change by '2[] at each address position of the mask ROM 2.
M) 3 and a fourth storage means (RA
M) 4, a third storage stage (RAM) 5 that stores a pair of a program change address of the mask ROM 2 and a storage address of the RAM 4 that stores a correction program for the change address, and A RAM 6 for storing data, and an input means 7 for selecting mode information such as human power for various transaction information and device registration, inspection, settlement, etc.
, a display means 8 for displaying input/output information, etc., a printing means 9 for similarly printing this input/output information, etc. on rents, etc., and a drawer 10 for storing cash etc. generated from transaction registration etc.
A magnetic sword device z for reading various data or programs etc. is connected to a data bus I4 and an address bus 15.
Sweat and connect.

In history, the above RAM3.4.5 is the back amplifier battery power supply I3
However, some areas of the RAM 6 are still backed up by the backup battery power supply 13.

1 and 12 are composed of flip relogs, and RAM3
Modification 7 is set by the ``'' bit signal outputted from the FLIP 70, interrupts the CPU I by the cent output of the flip 70 knob 12, and is stored in the RAM 4.
One stage of detection detects the changed address position of the block which is reset by a signal from the CPUI in response to the last step of the program. Reference numeral 16 denotes a decoder, which is configured to decode address information on the address bus 141- and select one of the above elements.

17 is key inter 7-v chair (key '/F)
, 18 is Noriliter Inter 7, Chair (PI”p), +
9 is an interface (DI/F), and 2o is an input/output interface (DI/F).

Furthermore, each of the above memory 1 stages 3 to 61 is C-MO5゛Non-dumb access memory (RAM) [Yoshi+1N].1 Next, the ECR block change operation shown in Figure 1 of Memory 1 (/ ζ will be explained in the operation flow diagram shown in FIG.
First, the address location of the mask ROM 2 that needs to be changed and the storage address location of the RAM 4 where the corresponding modification program is stored are stored in the RAM 5, the modified 7° locum is stored in the RAM 4,
The address location of mask ROM 2 that requires further changes is R.
Each AM3 is loaded from the magnetic data storage device 11 and stored in each memory.

Specifically, for example, the fourth storage means (RAM) 4 has a second
As shown in Figure (a), the predetermined address of the RAM 4
After A, the modified 7° ROCRAM of address A that requires a program change in the mask ROM 2, which is the first storage means, is sequentially written, and in the final step of the modified 7° ROCRAM, a jump is made to the return address to the mask ROM 2. Instructions are written. If it is necessary to modify the program at address B in the mask ROM 2, the modification program is written in the RAM 4 from address VxxxxB onwards. Also, in the third storage means (RAM) 5, as shown in FIG. 2(b),
As shown in FIG. As shown in Figure 2(c), the mask RO
RO to the same address as the program change address of M2.
A hook is stored that indicates that the blockrum stored at that address in M2 requires a change.

In addition, in the examples shown in FIGS. 2(a) to (C), the square '/
7) of ROM 2 "This is a statement that indicates the case where there is a change in the history of the block RAM in responses A and B; and the change device and modification 7 of the program fixed from the magnetic data device 11 in RAM 3.4 and 5 to the disk ROM 2. °After writing Rokulam [)11 Mask RO
Execute the processing program M2.

Next, the brocrum fruit stored in this mask ROM2 (
The T-page order will be explained in detail with reference to the operation flow diagram shown in FIG. In this execution, CPU1 to -7scR
The OM2 is sequentially addressed, the allograms in the ROM2 are sequentially accessed, and the program is executed.

(Step n4). At this time, RAM3Vc is also masked R.
Since the addressing is the same as that of OM2 and the address information is transferred from the CPU, it is addressed in synchronization with mask ROM2, and data at that address position is read out. As mentioned above, RAM 3 stores "0" for 10-gram programs that do not require changes, and "B" for program steps that require changes, and when there is a "0" output from RAM 8. In this case, the flip 7 floor 12 is in a reset state.

Therefore, while the interrupt signal, which is the cent output of the flip-flop 12, does not arrive, the CPU
2 program steps are carried out sequentially.

The address location of mask ROM2 is now changed to '
When the address position A is reached, the flag "
1゛ is output and the flip is 7p.

12 cents. That is, the RAM 3'l indicates that the flip-flop 12 is currently at the address location that requires change.
It is detected based on the contents of the stored flag (step n3), and an interrupt signal (set output) is supplied to the CPU to generate an interrupt (step n6).

When CPU I responds to the interrupt signal and temporarily stores the current address Ii+\A, the address information stored in RAM 5 is temporarily stored (from address 1 directly A to this address). The address location XXXA of the RAM 4 storing the corresponding modified program is searched (step n7), and the modified program is designated by skipping to this modified program location (step n8). Therefore, the modification block 'yl, -h (stored after address K x A in this RAM 4) will be executed (step n9).

In addition, a check jump instruction is written at the end of this modification program, and when the execution of this modification program is completed, if the Furi 7 programmer 12 is in the reset state, 1 (
Jump to Mask ROM2 (Stenoa °n10),
Execute all blockrams of mask ROM 2 again.

At the same time, the blocks in the mask ROM 2 are executed sequentially, and when the address position B that requires change is reached, the frame flow is executed.
CPU 12 is sent, a cPUIK interrupt is generated, and the modification program corresponding to the address location in RAM 40 is executed.

Note that the RAM 3 is provided with a flag indicating whether or not the program needs to be changed at a rate of 1 bit per 1 byte of the mask ROM 2.

What has been described above is the method for modifying the program of an electronic register device according to the present invention and its execution procedure.Generally, this electronic register device is configured such that the power is turned on and the device is used only when a registration process occurs. . Therefore, the above RAM
The modification program related information stored in 3.4 and 5 will be lost when the power of the device is turned off, so when the next registration process etc. .4 and 5.

Therefore, in order to eliminate such problems, the present invention further provides a backup power source 13 for the RAMPs 4 and 5.
The memory information stored in the second to fourth memory means (RAM) 3.5 and 4 is retained even when the power of the apparatus is turned off.

In the present invention, L RAMs 3.4 and 5 are C-MO
Since it is configured with S RAM, it is possible to reduce the power consumption of this back amplifier battery.
.

As described below, according to the present invention, the mask RO is the first storage means for permanently storing various transaction processing software.
has the same address as M, and the mask ROM at that address
a storage means for storing whether a change is made in the program stored in the program; and a storage means for storing information indicating at which address a modified Zorokulam is stored when a change is identified as necessary. , Modification (F) Since it is configured to have a storage means for storing the program and a / 17 that can be fixedly stored in the mask ROM extremely easily without being replaced.
'A very useful and practical electronic register device can be provided because the program can be changed and the changed program can be stored regardless of whether the device power is turned on or off.

In addition, in the embodiment described in L, the case where each information necessary for program modification is read from a magnetic tape device was explained, but instead of this magnetic tape device, various information storage devices and the same type of ECR that is currently widely used can be used. Needless to say, the information may be transmitted through an infinitive or online connection, or the program modification information may be set and input using manual means.

Further, although the RAMs 4 and 5 are expressed as separate parts for convenience of explanation, they may be used in the same RAM at different addresses.

[Brief explanation of drawings]

Figure 1 is a block diagram showing the configuration of an ECR that implements the present invention. Figures 2 (a) to (c) are RAM 4.5
FIG. 3 is a diagram showing the storage state of FIG. DESCRIPTION OF SYMBOLS 1...Central processing unit (CPU), 2...(Storage means (mask ROM)), 3...Second memory 11'ff1 (C-MO5RAM), 4...
Fourth storage means (C-MO5RAM), 5...
Third storage means (C-MO3RAM), 1. Backup battery power source. Agent Patent attorney Aihiko Fukushi (and 2 others)'$2 fig. 3 fig.

Claims (1)

[Scope of Claims] 1. In an electronic register device that registers and processes various transaction information, a first electronic register device that permanently stores a program such as a transaction registration processing method of the device or a processing program that checks and settles registered data. a second storage means for storing information indicating whether or not a program has been changed at each address location, the second storage means having the same address as the first storage means, and the first storage means; a third storage means for storing a 10-crum address and a storage address of the modification program; 21-The register device is characterized in that it is equipped with a battery power source for back-amplifying the memory 2, 3rd and 4th memory means.21-The memory 2, 3rd and 4th memory means 105
2. The electronic register device according to claim 1, wherein the electronic register device is provided with an access memory (RAM).