JPS58189613U - oscillation circuit - Google Patents

oscillation circuit

Info

Publication number
JPS58189613U
JPS58189613U JP8464282U JP8464282U JPS58189613U JP S58189613 U JPS58189613 U JP S58189613U JP 8464282 U JP8464282 U JP 8464282U JP 8464282 U JP8464282 U JP 8464282U JP S58189613 U JPS58189613 U JP S58189613U
Authority
JP
Japan
Prior art keywords
oscillation circuit
substrate
capacitor
dielectric
microstrip line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8464282U
Other languages
Japanese (ja)
Inventor
稔 茂木
武志 斉藤
畑下 博
Original Assignee
株式会社日立製作所
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社日立製作所 filed Critical 株式会社日立製作所
Priority to JP8464282U priority Critical patent/JPS58189613U/en
Publication of JPS58189613U publication Critical patent/JPS58189613U/en
Pending legal-status Critical Current

Links

Landscapes

  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
  • Inductance-Capacitance Distribution Constants And Capacitance-Resistance Oscillators (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例を示す回路図、第2図は第1
図におけるコンデンサ5の構造を示す断面図である。 1・・・FET、 2−3.4・・・マイクロストリッ
プ線路、5・・・コンデンサ、6・・・負荷、7,8・
・・ストリップ線路導体、9・・・下層配線導体、10
・・・誘電体基板。
Fig. 1 is a circuit diagram showing one embodiment of the present invention, and Fig. 2 is a circuit diagram showing an embodiment of the present invention.
FIG. 2 is a cross-sectional view showing the structure of capacitor 5 in the figure. 1...FET, 2-3.4...Microstrip line, 5...Capacitor, 6...Load, 7,8...
... Strip line conductor, 9 ... Lower layer wiring conductor, 10
...Dielectric substrate.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 誘電体基板上に形成されたマイクロストリップ線路から
成るリアクタンス素子とコンデンサを有して成る発振回
路において、前記コンデンサとして、前記基板内に埋置
された導体と前記マイクロストリップ線路導体が基板を
構成する誘電体を間に介在させて成る容量を用いること
により、発振回路の温度特性が前記基板を構成する誘電
体の温度特性に支配されるようにしたことを特徴とする
発振回路。
In an oscillation circuit comprising a reactance element and a capacitor formed on a dielectric substrate and formed of a microstrip line, the substrate is composed of a conductor embedded in the substrate as the capacitor and the microstrip line conductor. An oscillation circuit characterized in that the temperature characteristics of the oscillation circuit are controlled by the temperature characteristics of the dielectric constituting the substrate by using a capacitor with a dielectric interposed therebetween.
JP8464282U 1982-06-09 1982-06-09 oscillation circuit Pending JPS58189613U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8464282U JPS58189613U (en) 1982-06-09 1982-06-09 oscillation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8464282U JPS58189613U (en) 1982-06-09 1982-06-09 oscillation circuit

Publications (1)

Publication Number Publication Date
JPS58189613U true JPS58189613U (en) 1983-12-16

Family

ID=30093573

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8464282U Pending JPS58189613U (en) 1982-06-09 1982-06-09 oscillation circuit

Country Status (1)

Country Link
JP (1) JPS58189613U (en)

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