JPS58181348A - Error correcting and detecting device - Google Patents

Abstract

PURPOSE:To attain the error correction and detection of digital information, by performing interleaving with a method that a burst error remains even after the interleaving and using a burst error correcting code for the result. CONSTITUTION:An error correcting and detecting device consists of a coder 1, a decoder 2, a signal transmission line or a memory 3, an input terminal 4 for digital information and an output terminal 5. The coder for error correction codes is a device producing a code word having a redundancy of information under a certain rule. If there is any error in the code word, the reguiarity is disturbed. The decoder is a device which detects the disturbance and corrects the error based on it. A part corresponding to the coder 1 is provided with a check point addition circuit 6 and an interleave circuit 7, and a part corresponding to the decoder 2 is provided with a reverse interleave circuit 8 and an error correction circuit 9.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to codes t14. Of the items b, this mainly relates to a device for correcting and detecting berth H14.

[Background technology]

In image writing/printing devices such as digital VTRs, errors occur in accumulated signals due to miscellaneous signals, dropouts, and the like.

If this Idii image signal with errors is reproduced, the image quality will deteriorate. Therefore, it is necessary to use an error correction code to correct the image signal containing the error, or to detect the presence of the error and replace it with, for example, a pixel in the previous scanning line. Note that the above-mentioned noise includes not only random noise but also burst noise that occurs continuously, albeit for a relatively short period of time.This burst noise also causes continuous burst errors, so countermeasures that take this into consideration are necessary. Required 0 Conventionally, interleaving was used as a countermeasure against errors in the communication path, and the code words created using interleaving were tested using a single error detection method using parity bits, or a combination of Hamming code and parity check. A single error correction/double error detection method is known. The reason why interleaving is used is to scatter burst errors on the communication path into each code word of the received sequence, thereby converting them into an error pattern that is easy to process by the decoder.

The conventional correction/detection methods described above are all simple and take into consideration burst errors, but errors that occur in digital VT) are usually several hundred bits in length. It is a burst g-shi that extends. Moreover, if an error occurs that is larger than its correction ability, the scale will not be able to correct or detect it, but will be affected if it makes an incorrect correction. Furthermore, if a BCH code or the like with high correction ability is used, it is possible to correct even a large number of erroneous sibits, but there is a problem in that the apparatus becomes complicated.

[Purpose of the invention]

The present invention has been made in order to solve the above-mentioned problems, and is aimed at solving digital information (signals) containing long burst errors.
The present invention aims to provide a device with a simple configuration that enables agb correction and detection.

[Summary of the Invention] In order to achieve the above object, the apparatus of the present invention performs interleaving in such a way that the result of interleaving is also a burst error, and the result is a burst error. The system is configured to correct and detect erroneous codes using a code correction code.

[Embodiments of the invention]

The present invention will be explained in detail below using examples.

FIG. 1 is a block diagram showing the basic configuration of the error correction/detection device of the present invention. In the figure, 1 is an encoder, 2 is a portion corresponding to a decoder, 3 is a signal transmission 16t or memory layer, 4 is an input terminal for digital information (signal), and 5 is an output terminal. For the sake of simplicity, the digital V
The configuration and functions of each part will be explained assuming a TR device. Therefore, the above 3 will be called a magnetic tape.

In order to automatically correct errors in digital information, the information must have some kind of redundancy. An encoder in an error correction code is a device that generates code words with redundancy in information under certain rules. If an error occurs in the code word, its regularity will be disrupted. A decoder is a device that detects disturbances and corrects them based on the disturbances.

The device of the present invention has a configuration in which a portion corresponding to the encoder 1 is provided with a check point addition circuit 6 and an innotary 1 circuit 7, and a portion corresponding to the decoder 2 is provided with an inverse interleap circuit 8 and an error correction circuit 9. It becomes. Note that 10 is an input terminal of the error correction circuit 9.

FIG. 2 is a functional explanatory diagram of each component of the apparatus of the present invention. In the figures, the same numbers as those mentioned above indicate the same or equivalent parts. The functions will be explained step by step below.

(1) Pixel signals of a block with one scanning line as a unit are P
Information bits that have been binarized into "1" and "O" by CM etc. are sequentially input from the input terminal 4.

(2) The test point addition circuit 6 is equipped with a test point generation circuit 11 and a switch 12, and is configured to alternately switch between the input information bits and the test bits generated by the test point generation circuit 11. A code word is created by adding check bits for error correction.

(3) The above code word is loaded into a line memory (hereinafter abbreviated as LM) 13 provided in the Innotary 1 circuit 7. At this time, the LM write control circuit 14 writes 1, 2, 3, .・
. . . Addresses in Nl are generated sequentially.

(4)・Next, in the LM continuous control time @15, 1. L+1゜2
L+1, --・-・-nL+1.2, L+2.2L+
2, . . . nL+2y . . . Addresses are generated at random for every N and L bits, and code words are read out at random from the LM13. Write it on ffl tape 3.

This operation is called interleaving.

(5) The reverse I/talleep circuit 8 is connected to the LM read control circuit 15.
It has an LM write control circuit 16 which has exactly the same function as the LM write control circuit 16, and generates an address every L bits.
The nine interleaved codewords successively continued from 9 are sequentially written into the LM 17 at a rate of one scanning line.

(6) Next, the LM successive control circuit 18 which has exactly the same function as the LM write control circuit 14, 1,2°3...
- Generate addresses in the order of N, read code words sequentially from the LM 17, and input them to the input terminal 10 of the error correction circuit 9. This operation is called reverse i/talleep.

(7) Error correction port Ili! ! 19 includes an erroneous position detection circuit 19 and an erroneous turn detection circuit Nr 20, which detects the position of the erroneous turn that has occurred based on the check bits of the nine input code words, and detects the code word stored in the shift register 21. is corrected and the result is output to output terminal 5.

Based on the above procedure, even if a long burst signal occurs on the magnetic tape 3, the number of bits with gb will be reduced in the code word resulting from deinterleaving, so error correction and detection will be relatively easy. can be done.

Furthermore, such an interleaving method has the following characteristics.

If a burst error occurs on a magnetic tape and interleaving as described above is performed during running, the error within a code word will become like a burst. This is because when interleaving is performed every L bits, for example, the range from (i-L+j) bits to (1/・L+j') bits on a magnetic tape (however, J
*J' is okuj.

If a burst error occurs in j'< an integer satisfying L,
The position of an error code in a code word after deinterleaving is within the range of i bits (i'+1) bits. Therefore, in the present invention, using this property, a burst error correction code is used to correct the code ilK code. Use.

This makes it possible to correct and detect long burst errors in codewords in a simple manner. As a result, burst errors on the magnetic tape can also be corrected and detected using easier means than in the prior art.

The above-mentioned burst error correction code used in the present invention is described in "Coding Theory" by Jiyo, Iwadare, and Imai, Showako, Tokyo, Japan.
1973. etc., so it will be briefly explained below.

To correct burst errors, it is suitable to use a burst error correction code. Of course, even if a code for correcting t random errors p is used, up to t consecutive errors can be corrected. However, if there is a correlation between the occurrences of errors such as burst errors, this correlation can be used to correct random errors much more easily. .

The code is corrected as follows.

The sequence of information bits is expressed as I (x) by the following polynomial, and the m-th generation polynomial for adding check points is expressed as G (x)
Then, a code word to which a check point is added can be expressed as equation (1), where nxm+ is the following polynomial P (x).

P(x) −I (x) ・G(phantom
・(1) If an error E(x) occurs in this, P(
x) is P'(x) - P(x) + h(x) = I
(x) −G(x) + h(x)...(2) Then, divide P'(x) by G(x) and get the remainder Be (P'(x)/G(x)) -Re (g(
x)/()(x) )...(3) 2(x) is estimated and corrected.

The burst error correction code has a characteristic in this G(x),
For example, G(x) −x@+ 1 ) ・Q(x)
・It has the form of = (4). (Q(X) is an irreducible polynomial of degree d) Then, if 'n(x) has an error only in the range of xl-XI+b, dividing P'(x) by xi gives There is an error in the range. This (x@+
1) Whether divided by Q(X) or Q(X), the remainder is h
It becomes equal to (x)/x. Therefore, it can be detected that an error corresponding to this remainder exists in the range of X% By dividing (x) and using the point 9, find the position of the error and make corrections.

As described above, according to the apparatus of the present invention, even a long burst error 9 can be corrected and detected relatively easily. However, even with the burst correction code used in the present invention, if an error larger than its correction ability occurs, as occurs when other correction codes are used, the error cannot be detected and is incorrectly corrected. There are cases where Therefore, there is a need for a means to detect whether the erroneous correction result is correct or incorrect and to reduce the influence of the erroneous correction. The means for doing so will be explained below.

When an erroneous correction is made, the actual location of the error and the corrected location are often very different. Furthermore, if the actual incorrect position is slightly shifted, it is corrected and the nine positions are shifted significantly, so the incorrectly corrected positions are distributed over a wide range. On the other hand, when the error is corrected, the corrected position is, of course, the position where the error occurred. Therefore, there is a difference in the distribution of corrected positions when the correction is made correctly and when the correction is made incorrectly. Taking advantage of this property,
By statistical processing of the error correction results, it is possible to detect whether the correction results are correct or incorrect.

By the way, although it is not possible to know the exact location where an error occurs, if we focus on multiple codewords in which an error occurs at the same position, the above detection can be performed even without knowing the location of the error. Possible 0 FIG. 3 shows the result of code correction within one block when nine errors occur that exceed the error correction capability. If corrected, the corrected positions of each code word will be gathered at one place within the same block, but if incorrectly corrected, the range of the sum of the corrected positions will expand between each code word, as described above. This is due to the percentage image of the interleaving method used in the present invention. Figure 4 is a block diagram of an error correction circuit that includes a function to detect whether the correction is correct or incorrect in the above corrected range. . First, a reset signal (the generation circuit is not shown) is applied to the terminal 22 corresponding to the block boundary of the received code.
All the code words in the 0th-order block for which all 3 are reset are input into the error correction circuit 9 one after another. Then, the FF 23 corresponding to the position where the error has been corrected is set for each code word.

Next, the correlation detection circuit 24 counts the range of corrected bits displayed on the FF 23.

If the range is less than a tolerance value, such as a constant determined by the correction ability of each code word, the comparator 25 determines that the correction of those code words was correct; if it is greater than the tolerance value, the correction is determined to be an error, and the result is is output to terminal 26. Normally, the corrected code obtained at terminal 5 is used, but if it is detected at terminal 26 as an erroneous correction, the code obtained at terminal 5 may be changed to something similar (for example, The influence of errors can be reduced by replacing the code with a code corresponding to an adjacent scanning line stored in a provided line memory.

The error correction detection circuit shown in the above embodiment detects the presence or absence of error correction in the same range of errors between code words, that is, in units of blocks as described above, and then detects error correction in code word units. We will describe the means for detecting the presence or absence of .

There are cases where the probability that the corrected result is correct is sufficiently higher than the probability that it is incorrect. In this case, there will be many codewords with the same correction position within the block and a few codewords with different correction positions. Therefore, only the codewords that have been incorrectly corrected in positions that are less frequently corrected will be incorrectly corrected. What is necessary is to configure a detection circuit for erroneous correction, which is regarded as a false correction.

FIG. 5 is a block diagram of an error correction circuit including an error correction detection function to achieve the above purpose.
8 is reset.0 Next, the switch 29 is turned down to input the code word to the error correction circuit 9. However, when a code word is corrected, only the position to be corrected is displayed. Then, the value of the counter 28 at the position where the correction is to be made is incremented by one.

Once this has been done for the codewords within one block, the correlation detection circuit 30 uses the value of the counter 28 to compare the position to be corrected in other codewords among the positions to be corrected. Detect small correlations. Then, set the FF 27 corresponding to that position. Next, the switch 29 is turned up to input the code word in the line memory 31 into the error correction circuit 9, and at the same time the code word in the line memory 31 is corrected and its position is displayed. The AND gate 32 performs a logical product between the display and the FF 27. When the value of any AND corresponding to each bit in one code word becomes 1, the OR (Oa) gate 33 outputs to the output terminal 34 an indication that the error correction of that code word is an error. . When there is no display on the output terminal 34, the corrected code obtained at the output terminal 5 is used, and when there is a display, it is an erroneous correction, so as described above, the code of the previous line is used as a substitute.

The above embodiment describes a case in which regular interleaving is performed such that the error positions between code words are equal; Similar results can be obtained in this case. That is, it is sufficient to set a position OFF shifted by the relative position. 9. An error correction circuit with an error correction detection function uses not only burst error correction codes but also Hamming codes, B
It goes without saying that a CH code or the like may be used.

〔Effect of the invention〕

As described above, even long burst errors can be corrected and detected relatively easily by interleaving burst errors when they occur and by using a burst error correction code.

(9) If there is a possibility that a large error exceeding the correction capability of the error correction/detection device of the present invention may occur, the function of the present invention to detect whether the correction is correct or incorrect is provided in preparation for erroneous correction. By adding @ to the correction circuit, the effect of errors can be reduced.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the principle configuration of the error correction/detection device of the present invention, FIG. #I2 is a functional explanatory diagram of each component of the error correction/detection device of the present invention, and FIG. FIGS. 4 and 5, which show the correction results when errors exceeding the correction ability occur, are block diagrams of an error correction circuit according to the present invention, which is equipped with a function of detecting whether the correction is correct or incorrect. 1... Encoder, 2... Decoder, 3... Storage section (f
B air tape) or transmission line, 4... input terminal, 5...
...Output terminal, 6...Test point addition circuit, 7...Interleap circuit, 8...Reverse interleap circuit, 9...
Error correction circuit. Atsushi I Figure 2 Figure 3

Claims (1)

[Claims] an encoder comprising a check point adding circuit for adding check points for code error correction to input digital information; and an interleaving circuit; and a rounding storage unit or In an error correction/detection device consisting of a decoder equipped with an inverse interleaving circuit that receives input via a transmission path and an error correction circuit, the interleaving circuit and the inverse interleaving circuit are connected to the interleaving circuit and the inverse interleaving circuit. An error correction/detection device characterized in that it is configured to cause burst errors and uses a burst error correction code to correct the code IK.