JPS58175822A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS58175822A JPS58175822A JP57058835A JP5883582A JPS58175822A JP S58175822 A JPS58175822 A JP S58175822A JP 57058835 A JP57058835 A JP 57058835A JP 5883582 A JP5883582 A JP 5883582A JP S58175822 A JPS58175822 A JP S58175822A
- Authority
- JP
- Japan
- Prior art keywords
- film
- polycrystalline
- substrate
- onto
- insulating film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
- H01L21/02675—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
- H01L21/02683—Continuous wave laser beam
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02381—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02488—Insulating materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02587—Structure
- H01L21/0259—Microstructure
- H01L21/02595—Microstructure polycrystalline
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
- H01L21/02691—Scanning of a beam
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Optics & Photonics (AREA)
- Materials Engineering (AREA)
- Recrystallisation Techniques (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は非晶質絶縁膜上に結晶性の良い、Ｓｔ等の半導
体層を形成する方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of forming a semiconductor layer made of St or the like with good crystallinity on an amorphous insulating film.
従来よりエネルギービームにより表面ノーのみの溶解に
よって非晶質又゛は多結晶Ｓｔ（シリコン）の膜質を改
善する方法が行なわれているが、大面積においてすべて
を結晶化させるには、至っていない。また、この結晶成
長をおこす為には表面Ｓｉ層の溶融ガス不可欠である為
、溶融していない下地の絶縁膜（Ｓ １０２や５ｉ３Ｎ
４）はレーザの場合にはエネルギーを吸収しない為、温
度がほとんど上昇しないとともに、多少一度が上昇して
も溶融温度が高くて溶融が起らないため、熱ヒズミが生
じ、非常なストレスの発生があり、Ｓｉ層のノ１ガレ等
が生じる。したがって、膜買改署のために十分に強力な
パワーを与えることができず、ノ１ガレが生じる寸前の
レーザパワー条件が要求される。Conventionally, methods have been used to improve the film quality of amorphous or polycrystalline St (silicon) by melting only the surface layer using an energy beam, but it has not yet been possible to crystallize all of the film over a large area. In addition, in order to cause this crystal growth, molten gas from the surface Si layer is essential, so the underlying insulating film (S102 or 5i3N
4) In the case of a laser, it does not absorb energy, so the temperature hardly rises, and even if the temperature rises a little, the melting temperature is high and no melting occurs, so thermal strain occurs and extreme stress occurs. This results in cracking of the Si layer. Therefore, it is not possible to provide a sufficiently strong power for the purpose of refining the membrane, and a laser power condition that is on the verge of causing splashing is required.
その為、やむなく単結晶化が十分とはいえないレーザ出
力で膜質の改善を行う必要があり、十分な効果を得にく
い現状であった。Therefore, it was necessary to improve the film quality with a laser output that was not sufficient for single crystallization, and it was difficult to obtain sufficient effects.
５Ｏ８（ｓｉｌｉｃｏｎ ｏｎ ５ａｐｈａｉｒ、）’
ｆｆ＠わる寄生容量の小さい基板として大いに利用され
る、非晶質絶縁物上に形成され素子形成の行われる５ｉ
７−は結晶性についてもすぐれていないといけないが、
前述したように結晶性の良い５ｉ７−を得ることは困難
な現状である。5O8 (silicon on 5ahair,)'
5i, which is formed on an amorphous insulator and is used to form elements, is widely used as a substrate with low parasitic capacitance.
7- must also have excellent crystallinity,
As mentioned above, it is currently difficult to obtain 5i7- with good crystallinity.
本発明は、上に述べた欠点にかんがみなされたもので、
非晶質絶縁膜上に形成した半導体ノーのノ１ガレを小さ
クシ、半導体層へのより高出力のビーム照射を可能とし
て良好な膜質の改善を行うことのできを方法を提供する
ものである。The present invention has been made in view of the above-mentioned drawbacks.
The present invention provides a method for improving the film quality by combing the semiconductor layer formed on an amorphous insulating film into a small comb and making it possible to irradiate the semiconductor layer with a beam of higher power. .
まず、本発明の詳細な説明を行なう。一般にビームアニ
ールによる多結晶Ｓｉの粒成長には、酸化膜や窒化膜上
に堆積した多結晶Ｓｉをもとにして、成長させる方法を
とっている。この下地の酸化膜や窒化膜は、熱処理の為
高密度−であり、非常にち密性密化されたものを用いて
いる。この為、の上に形成された多結晶Ｓｉがビームア
ニールにて溶融状態になった場合の熱ストレスの逃げる
部分が極めて少なく、ノ）ガレに結びつくものである。First, the present invention will be explained in detail. Generally, grain growth of polycrystalline Si by beam annealing is performed using a method of growing polycrystalline Si deposited on an oxide film or a nitride film. The underlying oxide film or nitride film has a high density due to heat treatment, and is extremely dense. For this reason, when the polycrystalline Si formed thereon becomes molten during beam annealing, there is a very small portion from which thermal stress can escape, leading to (3) cracking.
一方、低＠（ｔｏｏｒ）での気相化学蒸着法すなわちＣ
Ｖ Ｄ （ｃｈｅｍｉａａｌ ｖａｐｏｕｒ ｄｅｐｏ
ｓｉｔｉｏｎ）法を用いて堆積した８ １０２はＪ堆積
直後はその密度が低く、十分な前述した緻密な酸化膜と
して利用する為には、高温（９００Ｃ）以上の熱処理が
必要である。本発明はこの堆積直後が又はａＯＯＣ以下
での熱処理後の酸化膜等の絶縁膜が一般の前述した酸化
膜等の絶縁膜に比べ屈折率から１ｌＩｌ断すると密贋が
未だ低くストレスの発生が少ないことに着目してなされ
たものである。On the other hand, vapor phase chemical vapor deposition method at low @(toor), that is, C
V D (chemical vapor depot)
Immediately after J deposition, 8102 deposited using the J deposition method has a low density, and in order to be used as a sufficiently dense oxide film as described above, heat treatment at a high temperature (900 C) or higher is required. In the present invention, the insulating film such as an oxide film immediately after deposition or after heat treatment at a temperature below aOOC has a lower refractive index by 1lIl than the general insulating film such as the above-mentioned oxide film. This was done with this in mind.
以下、本発明の一実施例を工程図に基づいて説明を行な
う。第１，２図は工程を示すものである。An embodiment of the present invention will be described below based on process diagrams. Figures 1 and 2 show the process.
基板１上に１μｍ厚の密度の低いＣＶＤ ８１０２２を
４００Ｃで堆積した（第１（ロ）。その上に６００Ｃで
、ＬＰＣＶＤ（ｄ圧ＣＶＤ）法？５０００人の非晶質又
は多結晶Ｓｉ膜３を形成した。なお、膜３はプラズマＣ
ＶＤ法で形成してもよい。その後基板を３２０ｔ：’に
加熱した状態で、連続発振Ａｒレーザビーム４を試料面
すなわち多結晶８１ ａ面上で幅４０μｍ程度に絞って
照射した。すなわち４０μｍ幅で多結晶Ｓｔ３を溶融す
る。−８ｔ層３の全面’１１００．／Ｓで１０μｍピッ
チでビーム４にて走査し、多結晶ｓｉａを溶融した（第
２図）ａ一方、比較の為、いわゆる緻密な１μｍの熱酸
化膜に形成した多結晶Ｓｔに同様のビーム４の照射を行
なった。この場合人力レーザ出力が１８Ｗで、ハガレ、
クラックが生じたのに対して本発明に従がう前述の試料
については２１Ｗにレーザ出力が達してもハガレること
なく多結晶Ｓｉ３の表面が十分に溶融され、成長した結
晶化膜の粒径に関しても２００μｍ Ｘ ３０μｍのも
のが１ｄ中に多数個得られ、従来のものでは同粒径が数
１０Ｘ２００μｍのものは１−当り数個のオーダーであ
った。本発明にかかる方法では多数のものが、１０Ｘ２
０μｍを超えており、界面でのストレスを除いた為これ
らの効果は非常に大きい。A low-density CVD 81022 with a thickness of 1 μm was deposited at 400C on the substrate 1 (first (b)).Amorphous or polycrystalline Si film 3 of 5,000 layers was deposited on top of it at 600C using the LPCVD (d-pressure CVD) method. The film 3 was formed using plasma C.
It may also be formed by a VD method. Thereafter, while the substrate was heated to 320 t:', a continuous wave Ar laser beam 4 was irradiated onto the sample surface, that is, the polycrystalline 81a surface, with a width of about 40 μm. That is, polycrystalline St3 is melted with a width of 40 μm. -8t layer 3 entire surface '1100. /S with beam 4 at a pitch of 10 μm to melt the polycrystalline Sia (Fig. 2). On the other hand, for comparison, the same beam 4 was applied to polycrystalline St formed on a so-called dense thermal oxide film of 1 μm. irradiation was performed. In this case, the human power laser output was 18W, and there was no peeling.
Whereas cracks occurred in the above sample according to the present invention, the surface of the polycrystalline Si3 was sufficiently melted without peeling even when the laser output reached 21 W, and the grain size of the grown crystallized film decreased. Also, many particles of 200 .mu.m x 30 .mu.m were obtained per 1 d, whereas in conventional products, particles with the same diameter of several 10 x 200 .mu.m were on the order of several particles per 1 d. In the method according to the invention, a large number of
It exceeds 0 μm, and since the stress at the interface is removed, these effects are very large.
なお、本発明の実施において高温熱処理を受けたＳｉＯ
又はＳｉ３Ｎ４膜が形成されている基板の場合には、こ
の上に低温でＣＶ Ｄ Ｓ ｉ０２膜を堆積することに
よって、本発明の効果を発揮することが可能となる。と
ころで、本発明における基板上への低温絶縁膜たとえば
ＣＶＤ５ｔＯ２膜に、８００Ｃで熱処理を加えるとＣＶ
Ｄ Ｓ １０２膜の屈折率は１．４６に近づき熱酸化
膜の密度になり、５ｉ０２膜がかなり硬化し本発明の効
果は発揮されにくい。In addition, in the implementation of the present invention, SiO
Alternatively, in the case of a substrate on which a Si3N4 film is formed, the effects of the present invention can be exhibited by depositing a CVD Si02 film thereon at a low temperature. By the way, if a low-temperature insulating film on a substrate in the present invention, such as a CVD 5tO2 film, is heat treated at 800C, CV
The refractive index of the D S 102 film approaches 1.46, resulting in the density of a thermal oxide film, and the 5i02 film is considerably hardened, making it difficult to exhibit the effects of the present invention.
壕だ本発明に用いる低温形成される絶縁膜は、Ｓｉ
Ｎ 膜等の他の絶縁膜でもよいとともしこルｒＪＫ
４
方法もＣＶＩ）法以外の他の１戊錨形成方法を／４Ｊし
１でもよい。また、基板１としてはシリコン（１）単＃
１与１１＾基板を用いてもよい０
以上のように本発明によれば８００Ｃ以下’１．／）４
大態で非晶質又は多結晶半導体膜を形成し工不ルキーピ
ームにより、容重することＶＣより、絶縁＋ｊ’ＡトＱ
こ艮好な＋ｇ實を有する半導体膜を形成すること〃二で
き、浦注目ヒな半纏１杢装置の製造に大きく谷与−ｒる
ものである。The insulating film formed at a low temperature used in the present invention is made of Si.
It may be possible to use other insulating films such as N film.
4 Method may also be /4J and 1 other than the CVI method. In addition, the substrate 1 is made of silicon (1) single #
1 and 11^ substrate may be used.0 As described above, according to the present invention, 800C or less'1. /)4
In general, an amorphous or polycrystalline semiconductor film is formed, and by using a mechanical beam, the insulation + j'A and Q
It is possible to form a semiconductor film having such excellent +g-reality, which greatly contributes to the production of a half-layered device that attracts attention.
図
第１図、第２ぐは本発明の一央り夕りこかかる下−導体
４族の製造工程所面図である。
１・・・・・基板、２・・・・・ＣｖＬ）Ｓ１０２戻、
３・・・・・・非結質又は多結晶シリコン膜、４・・
・ レーザビーム。FIGS. 1 and 2 are diagrams showing the manufacturing process of the fourth group of lower conductors, which is the central stage of the present invention. 1... Board, 2... CvL) S102 return,
3...Non-crystalline or polycrystalline silicon film, 4...
・Laser beam.
Claims (2)
こえる温度での熱処理を加えることなしに、前記絶縁膜
の上に多結晶又は非晶質半導体膜を堆積する工程と、８
０ｏＣをこえる温度での熱処理を加えることなしにエネ
ルギービームを照射し、前記半導体膜を溶融して膜質を
向上させる工程とを備えたことを特徴とする半導体装置
の製造方法。(1) a step of depositing an insulating film on a substrate; and a step of depositing a polycrystalline or amorphous semiconductor film on the insulating film without applying heat treatment at a temperature exceeding 80°C; 8
A method for manufacturing a semiconductor device, comprising the step of irradiating the semiconductor film with an energy beam to melt the semiconductor film and improve the film quality without applying heat treatment at a temperature exceeding 0oC.
する特許請求の範囲第１項に記載の半導体装置の製造方
法。(2) The method for manufacturing a semiconductor device according to claim 1, wherein the insulating film is formed using a CVD method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57058835A JPS58175822A (en) | 1982-04-08 | 1982-04-08 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57058835A JPS58175822A (en) | 1982-04-08 | 1982-04-08 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS58175822A true JPS58175822A (en) | 1983-10-15 |
Family
ID=13095704
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57058835A Pending JPS58175822A (en) | 1982-04-08 | 1982-04-08 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58175822A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01308090A (en) * | 1988-06-07 | 1989-12-12 | Fujitsu Ltd | Stabilization of oscillation frequency of semiconductor laser |
-
1982
- 1982-04-08 JP JP57058835A patent/JPS58175822A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01308090A (en) * | 1988-06-07 | 1989-12-12 | Fujitsu Ltd | Stabilization of oscillation frequency of semiconductor laser |
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