JPS58170042A - ダイオードのバイアス接続を形成する方法 - Google Patents

ダイオードのバイアス接続を形成する方法

Info

Publication number
JPS58170042A
JPS58170042A JP58047787A JP4778783A JPS58170042A JP S58170042 A JPS58170042 A JP S58170042A JP 58047787 A JP58047787 A JP 58047787A JP 4778783 A JP4778783 A JP 4778783A JP S58170042 A JPS58170042 A JP S58170042A
Authority
JP
Japan
Prior art keywords
diode
layer
module
metal
dielectric ring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58047787A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0471338B2 (enExample
Inventor
マリアンヌ・ブ−ド
ミシエル・エ−ツマン
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Thales SA
Original Assignee
Thomson CSF SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thomson CSF SA filed Critical Thomson CSF SA
Publication of JPS58170042A publication Critical patent/JPS58170042A/ja
Publication of JPH0471338B2 publication Critical patent/JPH0471338B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/043—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64—Impedance arrangements
    • H01L23/66—High-frequency adaptations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32153—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate
    • H01L2224/32175—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate the item being metallic
    • H01L2224/32188—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate the item being metallic the layer connector connecting to a bonding area protruding from the surface of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01057—Lanthanum [La]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1203—Rectifying Diode
    • H01L2924/12032—Schottky diode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)
JP58047787A 1982-03-23 1983-03-22 ダイオードのバイアス接続を形成する方法 Granted JPS58170042A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR8204920 1982-03-23
FR8204920A FR2524202B1 (fr) 1982-03-23 1982-03-23 Module preadapte pour diode hyperfrequence, et procede de realisation de la connexion de polarisation de la diode

Publications (2)

Publication Number Publication Date
JPS58170042A true JPS58170042A (ja) 1983-10-06
JPH0471338B2 JPH0471338B2 (enExample) 1992-11-13

Family

ID=9272292

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58047787A Granted JPS58170042A (ja) 1982-03-23 1983-03-22 ダイオードのバイアス接続を形成する方法

Country Status (6)

Country Link
US (1) US4864384A (enExample)
EP (1) EP0089898B1 (enExample)
JP (1) JPS58170042A (enExample)
CA (1) CA1206275A (enExample)
DE (1) DE3367043D1 (enExample)
FR (1) FR2524202B1 (enExample)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5334872A (en) * 1990-01-29 1994-08-02 Mitsubishi Denki Kabushiki Kaisha Encapsulated semiconductor device having a hanging heat spreading plate electrically insulated from the die pad
US5202288A (en) * 1990-06-01 1993-04-13 Robert Bosch Gmbh Method of manufacturing an electronic circuit component incorporating a heat sink
DE4209983A1 (de) * 1992-03-27 1993-09-30 Daimler Benz Ag Verfahren zur Herstellung von in einem Gehäuse angeordneten Halbleiterbauelementen
US5550403A (en) * 1994-06-02 1996-08-27 Lsi Logic Corporation Improved laminate package for an integrated circuit and integrated circuit having such a package
US7449780B2 (en) * 2003-03-31 2008-11-11 Intel Corporation Apparatus to minimize thermal impedance using copper on die backside
US20050127121A1 (en) * 2003-12-15 2005-06-16 George Wells Quick release holster
JP4690938B2 (ja) * 2006-05-16 2011-06-01 株式会社東芝 高周波素子モジュール
CN104795453B (zh) * 2015-04-24 2018-06-12 中国电子科技集团公司第十三研究所 一种多梁式引线砷化镓基肖特基倍频二极管

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52142968A (en) * 1976-05-24 1977-11-29 Fujitsu Ltd Assembling method of semiconductor devices
JPS5481271U (enExample) * 1977-11-18 1979-06-08

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SE373689B (sv) * 1973-06-12 1975-02-10 Asea Ab Halvledaranordning bestaende av en tyristor med styrelektrod, vars halvledarskiva er innesluten i en dosa
US3894895A (en) * 1973-10-29 1975-07-15 Trw Inc Mesa etching without overhang for semiconductor devices
GB1504025A (en) * 1974-09-03 1978-03-15 Hughes Aircraft Co Microwave coupling device
US3974518A (en) * 1975-02-21 1976-08-10 Bell Telephone Laboratories, Incorporated Encapsulation for high frequency semiconductor device
US4415025A (en) * 1981-08-10 1983-11-15 International Business Machines Corporation Thermal conduction element for semiconductor devices

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52142968A (en) * 1976-05-24 1977-11-29 Fujitsu Ltd Assembling method of semiconductor devices
JPS5481271U (enExample) * 1977-11-18 1979-06-08

Also Published As

Publication number Publication date
EP0089898B1 (fr) 1986-10-15
DE3367043D1 (en) 1986-11-20
CA1206275A (en) 1986-06-17
JPH0471338B2 (enExample) 1992-11-13
FR2524202B1 (fr) 1985-11-08
EP0089898A3 (en) 1984-02-22
US4864384A (en) 1989-09-05
FR2524202A1 (fr) 1983-09-30
EP0089898A2 (fr) 1983-09-28

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