JPS58169976A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To eliminate unevenness easy to generate on an element forming region divided by an SiO2 film for element isolation by a method wherein an Si3N4 film is changed into an SiO2 film by being exposed to O2 plasma, after the Si3N4 film is formed on an Si substrate. CONSTITUTION:The SiO2 film 12 and the Si3N4 film 13 of fixed patterns are adhered by lamination on the Si substrate 11, then heat-treated, and the thick SiO2 film 14 for element isolation is formed in the periphery thereof. Next, the films 13 and 12 are removed, then a thin Si3N4 film 15 is adhered thereon, and a gate electrode 16 constituted of polycrystalline Si is provided at the center thereof, and exposed to O2 gas plasma, thus the film 15 is changed into the Si3N4 film 17, and simultaneously an SiO2 film 18 is generated on the exposed surface of the electrode 16. Thereafter, As ions are implanted with the electrode 16 as a mask, thus N type source region 19 and drain region 20 are formed in the substrate 11 of both sides of the electrode 16, then the entire surface is covered with a PSG film 21, opening windows 22 and 23, and Al electrodes 21 contacted with the regions 19 and 20 are mounted. In this manner, the surface of an element forming region is formed into a flat surface.

Description

DETAILED DESCRIPTION OF THE INVENTION 4. Technical Field of the Invention The present invention relates to an improvement in a method for manufacturing a semiconductor device.

(to) Technology background MOS) MO8iMIC-MO8 including Fungistar
2. Description of the Related Art Semiconductor devices such as type LSIs have a relatively simple structure and a relatively short manufacturing process, so they are used as large-capacity memories and large-scale logic circuits.

1 to 8 show the steps of a conventional manufacturing method of a semiconductor device. A predetermined pattern of 510g112 for isolation between elements is formed on a tp-type Si substrate 1.

This method involves forming a thin 5 inch photoresist film on an 81 substrate with thermal acid in a predetermined pattern.Then, using the prepared photoresist film as a mask, plasma etching is performed to form a lower silicon nitride film and a thin 510s film for the inter-element region. Sin, @ is left in the area other than the planned formation area. After that, using the knee structure of Sing[ and the electrification S1- as a mask, thermal oxidation of the substrate is performed to form 8 for isolation between elements.
An ins film 2 is formed.

After that, as shown in FIG. 1, a Si film for the gate is applied to the substrate.

v48 is formed by thermal oxidation of the substrate. Further, a polyV silicon film is formed on the substrate in a predetermined shape (turn game) mfflt using a photolithography method and a plasma etching method. 4 in FIG. 1 is the gate electrode formed in this manner.

*@2 As shown in the figure, 1 m around the gate electrode ff14
Then, using the gate wLfjA as a mask, A8 atoms and the like are ion-implanted as shown by the arrows to form a source region 6 and a drain region 6.

As shown in IK FIG.
SG) After forming m7', a photolithography method and a laser etching method are used to form a predetermined 7 (window is opened in the turn. Thereafter, a wiring film made of aluminum (1) was formed to connect with the source region and the drain region to form a semiconductor device.

However, in such a conventional method, the 5iOs@2 for element isolation is
iOa @Thin 810g formed in areas other than the planned formation area
When forming the 81 substrate by thermal oxidation using a two-layer structure of 8N4111 and Si as a mask, the 5
There is a tendency for the 5-ins film 2 to spread in the lateral direction of the substrate from the end A of the 5-ins film 2 by a dimension that is approximately the same as the thickness of the 5-ins film 2 formed under the substrate. This phenomenon is generally referred to as a bird's beak, and when this bird's beak is formed, the dimensions of the element formation area fixed by 5iOfil12 become narrower, and therefore the number of elements formed in this area is also limited. This results in a disadvantage that the degree of integration of the device is reduced.

Therefore, as a way to prevent such defects, 5i is installed on the 81 board.
Direct II without going through ns II! A method is used in which a silicon nitride film is formed and the substrate is thermally oxidized using the silicon nitride film as a mask to form a 5102 film for element isolation. In this way, the nitrided 5ill [is the substrate S1 and the nitrided 3I
! Due to the reaction with the atoms, the 81 substrate and the nitrogen atoms are chemically bonded and the adhesion is strong, so that the 8.10g1II for isolation between elements is less likely to spread in the lateral direction.

However, the nitride S1- formed in this way needs to be removed in a later step and then diffused to introduce impurities into the source/drain regions.At this time, if the 5LsN4111t is peeled off, it can be removed using hot phosphorus (H3PO4). and S1&
Etching by Taves Batter etching in jPo4 was also attempted, but the etched substrate surface became rough.

Furthermore, as shown in Figure 1, in the conventional method, 5iO
fil18 is formed by thermal oxidation of the S1 substrate.
211', since it is obtained by direct reaction between the S1 substrate and oxygen, it is a stable thin film with few defects at the interface and less electrically active materials and ion contamination. By forming electrodes in a predetermined pattern and going through processes such as 1F etching and NAC tape ion etching, the above-mentioned Sxo for gates, 8i0 for isolation between elements. There is a point where the film deteriorates or its insulation deteriorates.Mamaru wire Sing
When 1111 has a large film thickness of 200 A or less, the influence of the interfacial reaction with the gate electrode cannot be ignored.

Therefore, instead of using s'roH@ for the Kuki gate, we introduced a Si cage plate into the reaction tube, introduced purified N[(a) gas into the reaction tube, and heated it. , a high chest wave wax pressure is applied to a high-frequency casting coil outside the reaction tube to form a NHj gas into a ``plasma''.
In this case, it is difficult to form a film thicker than 200 degrees Celsius, and it is difficult to increase the film thickness in the area where the electric field is concentrated, so the magnitude of the voltage to be applied is limited. A small county U was created.

OBJECT OF THE INVENTION An object of the present invention is to eliminate the disadvantages reached with the present invention (ri), and to prevent the so-called element formation area of the Kuryohani, which is fixed with the 810g film for element separation described above, from becoming rough due to etching etc. and exhibiting an uneven shape. The purpose is to

The purpose of this song is to increase the thickness of the silicon nitride film in the element forming area so that it can withstand a predetermined voltage when a voltage is applied to the silicon nitride film from the outside. The purpose is to form a silicon nitride film that is thick and easy to etch. '(e) @Ming - 1l of the semiconductor device of the present invention to achieve the objective
The Li manufacturing method is based on a silidine (Sl) substrate and a silicon oxide (Si).
After forming Si3N4)-, the 81 substrate having the SiaN41m was exposed to an atmosphere of 1 busm of oxygen to form the Si8
This method is characterized by including a step of converting N4 into a silicon dioxide (810 g) film. In addition, the silicon nitride pattern was formed on an 81 substrate or a 510 g
1lIIKI [It is characterized by being a thermal nitrided oxidized silicon fusuma obtained by direct reaction with a nitrogen compound or a thermally oxidized oxidized f/9, or a nitrided oxidized silicon fusuma. Furthermore, after forming a silicon dioxide film for element isolation in a predetermined pattern on the silicon mounting plate 1-, electricity is applied to the substrate defined by the silicon dioxide film for element isolation and on the silicon dioxide film for element isolation. A method characterized by comprising a step of forming a silicon film, and a step of converting the substrate into a silicon nitride film in an area defined by the element isolation film 111 by placing the substrate in an oxygen gas bath. It is. W! A silicon substrate is provided with a predetermined pattern of s1o, , Ws't- for isolation between elements.
a step of forming a silicon nitride pattern in the field region fixed by the Sing @, a step of forming a polysilicon pattern on the substrate and then buttering the polysilicon film to form a gate electrode in the field region. , a step of introducing impurities into the substrate using the gate electrode as a mask to form source and drain regions;
A step of exposing to elementary gas plasma to oxidize the oxidized Si fusuma of the field region 1 including the source/drain mts, and after forming an insulator with the substrate, the source region, the doped V-in H region,
This method is characterized in that it includes the steps of forming a window through the insulation of the gate electrode, and forming a metal film on the substrate to form a predetermined pattern.

(1) Embodiment of the Invention An embodiment of the present invention will be described in detail below using drawing F. 5 to 10 are cross-sectional views showing the steps of the method for manufacturing a semiconductor device of the present invention, and FIG. 11 is a schematic diagram of an apparatus used in the RIATA method for manufacturing a semiconductor device of the present invention.

First, as shown in FIG. 6, a predetermined pattern of 5inj111112 and nitrided 5i
A patterned protective film of 2M1m structure of lllll18 is formed. Next, using the 2-structure Ichigo Ichi as a mask, the substrate is thermally oxidized to form Sing II, L4 for isolation between elements with a shore length of 111 m. So) 2 P#I#I Zou (
D Sing 暎12 h L (J'Si, 5NJI
1 B is etched and removed, and the substrate is then etched into the 11th
A carbon table 102 coated with expanded silicon (StC) in the quartz reaction shown in the figure is installed on a carbon table 102, and the inside of the reaction tube is evacuated to a vacuum level of about 100'l'orr. Ii circle open leg wave induction heating carp sy 1
08ic 200KJ (Z) Shoulder & several teffi cuff KWO
High frequency power is applied to heat the substrate to 0A degrees (approximately ttoo degrees Celsius), and ammonia (NL(a)
Sin in the isolation area between elements due to the reaction with Jli-Saka, ! 11
5is as shown in FIG.
Form N4fl$116. At this time, S for the rate
A part of ing $14 will also be covered with 5iaN*l1II.

A polyethylene tube 1-1 is formed to a thickness of about 4,000 mm by thermal decomposition of Mono V-Fun (5 in 4) gas on the immersed substrate in 7. This is then formed into a predetermined pattern by the 7 Otogasogufui method and the Defusma Etsunang method. be the gate electrode. Figure 6 1
-6 is the gate +1IE- formed in this manner.

In this state, the substrate is placed on the support stand 102 made of silicon carbide in the reaction tube 101 shown in FIG.
After exhausting the air to a temperature of
The high frequency f of the IZ output cuff KW is applied to the coil using the frequency 200K) After applying 1 llc force and heating, oxygen gas plasma is generated in the reaction tube.

In this way, as shown in FIG.
02 Psl 4 Teyu'M Sat'Lri1114 (
D5iaN4li! 15 is oxidized and Sing @
A portion is converted to l7. A 5inlI cap 18 is also formed around Ii1 of the gate capacitor 8A16. Here, the conversion speed of the 5iBN4111 to Sing sl is approximately 601 minutes. Here, OII gas plasma treatment is performed for 2 minutes to form a constant element #[Sl in IjI, N4 sliding door is 81 at the bottom! &
Converted to about 200A Sing 1%ll including the board,
It is formed by Thereafter, using the gate electrode 16 as a mask, ions of arsenic (As) Ii are implanted into the source formation region and the drain formation region as shown by the arrows to form a source region 19 and a drain region 20t. After that, as shown in FIG. 8, after forming PSG@24 for surface protection, the 1'SG@21 and the oxidized nitride Si@17 of the 'F part were etched by the plasma etching method. As shown in the figure, the hole 22 for connection with the source region and the hole 2B for connection with the drain region are opened.In this way, the nitride S1 on the element formation region with the Si-substrate is partially oxidized. Since the etching process is easy, the time required for etching is short and the etched surface of the 81 substrate becomes smooth.

In addition, since the element formation region defined by 5iOH'@ for element isolation is formed of a thick nitrided SIP that is partially oxidized at its end, the field is concentrated in that part. However, the element does not deteriorate easily.

Thereafter, as shown in FIG. 10, a gold W4 film made of aluminum (A4?) is formed by vapor deposition, and then etched into a predetermined pattern to form an A4' wiring film and connect the elements. 24 in FIG. 10 is the A formed in this way.
This is the wiring for I.

Effects of the Invention As described above, the semiconductor device manufacturing method of the present invention makes the element formation region flat and allows the film to be formed thickly, improving the characteristics of the semiconductor device and providing a semiconductor device with high CM@ degree. produce benefits.

[Brief explanation of drawings]

'From Figure 1 to Figure 8 are cross-sectional views showing the steps of a conventional semiconductor device manufacturing method, and Figure 4 is a cross-sectional view of a conventional semiconductor device manufacturing method.
5 to 10 are front views showing the steps of the method for manufacturing a semiconductor device V of the present invention, and FIG. 11 is a schematic diagram of an apparatus involved in the method for manufacturing a semiconductor device of the present invention. It is a diagram. In the figure, 1.11 is the 81 substrate, 2.14 is the Sing for element isolation, 8 is the gate oxidation layer, 4°16 is the polysilicon gate electrode, 5 and 19 are the source regions, and 6.2
0 is the drain region, 7-, 21 is PSGTll, 8,
9, 22.28d toilet connection hole, 12゜18 is 5iOj a
ls 't s, l 5 u Si nitride, 17
is 5inB @ oxidized electrification S1-, 10.24 is AJ
Wiring 1jll, 101ri reaction tube, to2dM & setup i
108 is a high frequency induction coil M%, 104 is a gas introduction pipe, and indicates the end. 1st (31'''l X) 5th figure 6th figure 7th figure 8th figure 9th figure 11th figure 01

Claims (1)

[Claims] +11 Silicon nitride (Si) on a silicon (Sl) substrate
8N4) After forming the film, Si with 1IsiaN411
The 5iaN plate is exposed to an atmosphere of t-m elementary plasma.
1. A method for manufacturing a semiconductor device, comprising a step of converting +811 into VIlcon(5iOi)II dioxide. (2) A patent characterized in that the silicon nitride layer is a nine-thermal silicon nitride film obtained by direct reaction with an 81 substrate, 51ot IIKIII III formed on a substrate, or a nitrogen compound, or a thermal silicon nitride chain of nitrogen plasma. The method for manufacturing a semiconductor device according to claim No. 11, '-. A step of forming a silicon nitride film on the silicon dioxide ah for isolation between elements and on the silicon dioxide ah which is fixed with a silicon dioxide yycon film, and exposing the substrate to an oxygen gas vapor for the amount of the elements.
Electrified V recon film in a constant area with 8108 film for 51
The method for manufacturing a semiconductor device according to claim 1 or claim 2, further comprising a step of converting the film into a 0g film. (4) The amount of elements in the predetermined pattern on the silicon substrate #
@Sing mkllllll+tsuru process, Iil,
Sing film 't'1llll in the defined field region; step of forming electrified silicon N1r, step of forming a polysilicon film on the u4 substrate E, and patterning the polysilicon film to form a gate electrode in the field region; A step of introducing impurities into the substrate using the electrode as a mask to form source and drain regions, a step of exposing the substrate to oxygen gas plasma to oxidize the nitride S1 film on the field region including the source and drain regions, and After forming two insulating films on the substrate, the source region, the drain region, and the gate 1 are separated from the poles by opening a window, forming wiring metal on the substrate, and applying a predetermined batt. Claim No. The method for manufacturing a semiconductor device according to any one of porridge (2) and (8).