JPS58169724U - Numeric value setting device using a counter - Google Patents

Numeric value setting device using a counter

Info

Publication number
JPS58169724U
JPS58169724U JP6568382U JP6568382U JPS58169724U JP S58169724 U JPS58169724 U JP S58169724U JP 6568382 U JP6568382 U JP 6568382U JP 6568382 U JP6568382 U JP 6568382U JP S58169724 U JPS58169724 U JP S58169724U
Authority
JP
Japan
Prior art keywords
counter
setting device
value setting
numeric value
input terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6568382U
Other languages
Japanese (ja)
Inventor
紀夫 池田
Original Assignee
太洋無線株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 太洋無線株式会社 filed Critical 太洋無線株式会社
Priority to JP6568382U priority Critical patent/JPS58169724U/en
Publication of JPS58169724U publication Critical patent/JPS58169724U/en
Pending legal-status Critical Current

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  • Channel Selection Circuits, Automatic Tuning Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案実施例の構成を示した図、第2図は第1
図の装置の特性を示した線図、第3図は第1図の装置の
使用例を示した線図である。なお図において01は固定
周波数発振器、02は可変周波数発振器、sl、s2は
スイッチ、Cは可逆計数器である。
Figure 1 is a diagram showing the configuration of an embodiment of the present invention, and Figure 2 is a diagram showing the configuration of an embodiment of the present invention.
FIG. 3 is a diagram showing the characteristics of the device shown in FIG. 1, and FIG. 3 is a diagram showing an example of how the device shown in FIG. 1 is used. In the figure, 01 is a fixed frequency oscillator, 02 is a variable frequency oscillator, sl and s2 are switches, and C is a reversible counter.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 可逆計数器の加算入力端と減算入力端とに、少なくとも
一方は発振周波数を□任意に変化することのできる2つ
の発振器の出力端をそれぞれ接続した計数器による数値
設定装置。
A numerical value setting device using a counter, in which the output terminals of two oscillators, at least one of which can arbitrarily change the oscillation frequency, are connected to the addition input terminal and the subtraction input terminal of the reversible counter.
JP6568382U 1982-05-07 1982-05-07 Numeric value setting device using a counter Pending JPS58169724U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6568382U JPS58169724U (en) 1982-05-07 1982-05-07 Numeric value setting device using a counter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6568382U JPS58169724U (en) 1982-05-07 1982-05-07 Numeric value setting device using a counter

Publications (1)

Publication Number Publication Date
JPS58169724U true JPS58169724U (en) 1983-11-12

Family

ID=30075629

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6568382U Pending JPS58169724U (en) 1982-05-07 1982-05-07 Numeric value setting device using a counter

Country Status (1)

Country Link
JP (1) JPS58169724U (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5299704A (en) * 1976-02-18 1977-08-22 Tokyo Chiyuunaa Kougiyou Kk Device for switching channel
JPS5526770A (en) * 1978-08-16 1980-02-26 Sony Corp Channel selector of synthesizer receiver

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5299704A (en) * 1976-02-18 1977-08-22 Tokyo Chiyuunaa Kougiyou Kk Device for switching channel
JPS5526770A (en) * 1978-08-16 1980-02-26 Sony Corp Channel selector of synthesizer receiver

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