JPS6444710U - - Google Patents
Info
- Publication number
- JPS6444710U JPS6444710U JP13972987U JP13972987U JPS6444710U JP S6444710 U JPS6444710 U JP S6444710U JP 13972987 U JP13972987 U JP 13972987U JP 13972987 U JP13972987 U JP 13972987U JP S6444710 U JPS6444710 U JP S6444710U
- Authority
- JP
- Japan
- Prior art keywords
- input
- circuit
- nand
- crystal
- output terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000013078 crystal Substances 0.000 claims description 6
- 239000003990 capacitor Substances 0.000 claims description 2
- 230000010355 oscillation Effects 0.000 claims 3
- 238000010586 diagram Methods 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 1
Landscapes
- Oscillators With Electromechanical Resonators (AREA)
Description
第１図は本考案の一例の構成図、第２図〜第４
図は従来の技術の説明のための図である。
２ａ，２ｂ，１２は抵抗器、３ａ，３ｂは水晶
振動子、４ａ，５ａ，４ｂ，５ｂは容量、７は装
置の出力端子、１１は電源端子、１３はスイツチ
、１４ａ，１４ｂ，１６はナンド回路、１５はイ
ンバータ回路である。
Figure 1 is a configuration diagram of an example of the present invention, Figures 2 to 4
The figure is a diagram for explaining a conventional technique. 2a, 2b, 12 are resistors, 3a, 3b are crystal oscillators, 4a, 5a, 4b, 5b are capacitors, 7 is the output terminal of the device, 11 is a power supply terminal, 13 is a switch, 14a, 14b, 16 is a NAND The circuit 15 is an inverter circuit.
Claims (1)
それぞれ第１の入力端子に供給される第１及び第
２の２入力ナンド回路が設けられ、 上記第１及び第２のナンド回路にはそれぞれそ
の出力端子と第２の入力端子との間に抵抗器と水
晶振動子の並列回路が接続されると共に、上記出
力端子と第２の入力端子とがそれぞれ容量を介し
て基準電位に接続されて第１及び第２の水晶発振
部が形成され、 上記第１及び第２のナンド回路の出力端子が第
３の２入力ナンド回路の第１及び第２の入力端子
に接続されてなり、 上記スイツチ回路を切換えることにより上記第
３のナンド回路の出力端子から上記第１及び第２
の水晶発振部を択一的に動作させた発振信号が取
出されるようにした水晶発振装置。[Claims for Utility Model Registration] First and second two-input NAND circuits are provided in which a switching signal from the switch circuit and its inverted signal are respectively supplied to first input terminals; A parallel circuit of a resistor and a crystal oscillator is connected between each NAND circuit's output terminal and a second input terminal, and the output terminal and the second input terminal are connected to each other via a capacitor as a reference. first and second crystal oscillators are formed by being connected to a potential, and output terminals of the first and second NAND circuits are connected to first and second input terminals of a third two-input NAND circuit. By switching the switch circuit, the output terminal of the third NAND circuit is connected to the first and second NAND circuits.
A crystal oscillation device from which an oscillation signal is extracted by selectively operating a crystal oscillation section of the crystal oscillator.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13972987U JPS6444710U (en) | 1987-09-11 | 1987-09-11 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13972987U JPS6444710U (en) | 1987-09-11 | 1987-09-11 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6444710U true JPS6444710U (en) | 1989-03-17 |
Family
ID=31403260
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13972987U Pending JPS6444710U (en) | 1987-09-11 | 1987-09-11 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6444710U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7433486B2 (en) | 2003-05-26 | 2008-10-07 | Pioneer Corporation | Speaker and manufacturing method for the same |
-
1987
- 1987-09-11 JP JP13972987U patent/JPS6444710U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7433486B2 (en) | 2003-05-26 | 2008-10-07 | Pioneer Corporation | Speaker and manufacturing method for the same |
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