JPS58167966A - Multi-channel display device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a multi-channel display device in which analog information applied to a plurality of channel input terminals is displayed on a display screen spaced apart from each other.

The object of the present invention is to provide a device as described above that is simple and easy to use.

A multi-channel display device according to the invention to achieve the above objects comprises an analog multi-solexing unit for switching the channel input terminals of the device into a sample-and-hold circuit; an analog-to-digital converter for converting the sampled analog signal into a digital signal, and a memory circuit for storing the digital signal;
A digital/analog converter connected to the output terminal converts the digital signal received from the memory circuit into an analog signal and supplies it to the output terminal, and the output terminal is connected to the deflector of the display unit. and a control circuit connected to the memory circuit to ensure that the analog signal at the input terminal is sampled at high speed and that the stored information is read out channel by channel from the memory circuit. and the control circuit has an output terminal connected to the input of the display unit and means for introducing an offset t so that the information associated with each channel is displayed spaced apart from each other. It is.

Hereinafter, the present invention will be described in detail with reference to the attached drawing rIIi. The apparatus of the invention includes a plurality of channel input terminals, collectively designated 10. In use, these terminals 10 are connected to a plurality of transducers 4C of, for example, an internal combustion engine. In this example, the channel input terminals are 8
tb, and these terminals are offset unit II.
K is connected.

The offset unit applies a specific offset signal, C, to each channel input voltage so that the voltages applied to the input terminals are displayed separately.

The channel output terminals of the offset unit are connected to the analog multiplexing unit 12.

The above unit 12 has 2 sample and hole circuits 1
It has one output connected to 3. The output of the circuit 13 is connected to an analog/digital controller 14, and the output of the controller is connected to the write power of a memory circuit 15.The memory circuit 15 has 4KX, 10
Preferably, it is a random access memory. The readout output of memory circuit 15 is applied to digital/analog computer 16. Converter 16 has an output terminal connected to the deflection power which connects to display unit 17. The display unit 17 is preferably an oscilloscope.

The memory unit operates using address multiplexer 1.
8, a write address counter 19, and a read address counter 20. A clock generator 21 and a channel counter logic unit 22 are connected to the read address counter 20. Logic unit 22 has an output connected to a trigger input of display unit 17.

Connected to the write address counter is a write control logic unit 23, which includes a sample-and-hold circuit 13 and an anamig/digital
It has an output for connection to a controller/monitor 14. This output is also connected to channel control logic 24, which controls the operation of multisolexing unit 12.

Channel control logic 24, channel counter
The logic 22 and the a-take generator 21 are supplied with a signal indicating the number of the channel to be displayed, and the write control logic determines the desired sample rate! A signal indicating [ and a departure signal are supplied.

The operating principle of the device according to the invention is to sample the analog signal applied to the input terminal as quickly as possible and record in memory a modified version of the input signal. Information is extracted channel by channel from the memory circuit. That is, all information for one channel is read from memory and displayed, and then the same is done for the next channel. Thus, the time difference between the display of the first channel and the display of the last channel is equal to the time difference between the sampling of the first channel and the sampling of the last channel.

In a particular example of operation of the apparatus of the present invention, it is necessary to display the signals applied to all channel inputs, and how many channels are displayed when the start signal is applied to the write control logic 23. The channel control logic 24, knowing what to do, controls the multisolexing unit 12 so that the offset signal applied to each input lO is fed to the sample-and-hold circuit 13. Switch.

The signal values are digitized and stored in memory.

This process is repeated 9 times for each channel input IO, and the process is designed to be done as quickly as possible. In a particular embodiment, the time required to sample, digitize, and store all channels is 101,470 seconds. This process is repeated as necessary, and the repetition rate is determined according to the rate of variation of the human input signal. When the memory circuit fills, the oldest of the previously stored information is replaced by new information.

The memory read process described above is performed channel by channel, and the oscilloscope's sweep time is preferably slightly longer than the time needed to read out all the information stored in memory for a single channel. ensuring that all information provided is displayed. Assuming that the readout time per channel is 2.2 milliseconds, the readout time for eight channels is 17.6 milliseconds.

The display of each channel is therefore updated every 18 milliseconds, so there is no perceptible flicker on the display. In the above example, each channel has 512
Indicated by pit. K to improve the display
, the digital/analog converter 16 comprises a so-called staircase coupling network so that the output of the converter 16 is connected to the second
It should be continuous as shown by 25 in the figure. Second
In the figure, a waveform 26 indicates a pulse applied to the input of the oscilloscope, and a waveform 27 indicates a count value of the counter 20.

As the number of channels to be displayed decreases, the time spent digitizing and storing channel information decreases proportionally, thus increasing the amount of memory that can be provided per channel. . If the amount of memory can be increased, the quality of the display can be improved.

The sample rate mentioned above is selected knowing the rate of variation of the signal applied to the input. As the sample rate decreases,
The display shows that the signal fluctuations are Σ over a long period of time.

The control logic 23 is configured to update the memory Yt only for the selected channel.

Updating the memory and reading the contents of the memory cannot be performed at the same time; these two operations must therefore be synchronized.

The offset unit 10 is equipped with a variable gain intensifier to enable the amplitude of each trace of the signal applied to the human power 10 to be adjusted separately.

WK, an offset unit can be placed between the computer 16 and the display unit 17. In this case, it must be configured to receive a control signal from the logic unit 22 so that an appropriate offset voltage is applied. Further, in this case, the amplifier described above occupies the position of offset 11 in FIG.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing a block diagram of each element of the device of the present invention, and FIG. 2 is a diagram for explaining the operation of the device of the present invention. Symbols in the figure: 10...Channel input terminal, 11...
Offset unit, 12... Analog multiplexing unit, 13... Sample amplifier P.
Hold circuit, 14... Analog/differential converter, 15... Memory circuit, 16... Digital/analog converter, 17... Display
Unit, 18...Address multiplexer, 19
...Write address counter, 20...Address counter, 21...Clock generator, 2
2...Channel counter logic unit,
23...Write control logic unit, 24...
・Channel control logic

Claims (1)

[Claims] l) A multi-channel display device for displaying analog information applied to a plurality of channel inputs on a display screen in mutually spaced relation; It is equipped with an analog multiplexing unit for switching to a P-hold circuit, an analog-to-digital converter for converting the sampled analog signal into a digital signal, and a memory circuit for storing the digital signal. A digital/analog converter 4- connected to the output terminal converts the digital signal received from the memory circuit into an analog signal and supplies the analog signal to the output terminal.
said output terminal is connected to the input of the deflector of the display unit and connected to a memory circuit to ensure high speed sampling of the analog signal at said input terminal and to store the stored information. A control circuit is provided to ensure that each channel is output from the memory circuit, and said control circuit introduces a further output terminal connected to the trigger input of the display unit and an offset associated with each channel. 1. A multi-channel display device, comprising means for displaying information separated from each other. 2) A-biasing a Nayan channel offset unit placed between the channel input and the analog multiplexing unit, the offset unit applying an offset voltage to each of the analog voltages applied to the channel input; A multi-channel display device according to claim 1, characterized in that the display on the display screen of the voltages applied to the channel inputs is spaced apart. 3) A multi-channel display device according to claim 1, characterized in that it comprises a channel offset unit for applying an offset voltage to the analog signal at the output terminal. 4) a channel counter logic unit 22 comprising an address multiplexer connected to the memory circuit, a read address counter and a write address counter, comprising a clock generator and connected to the write address counter; , wherein said channel counter logic comprises said further output terminal.・
display device. 5) The above write address counter and the above sample
a write control logic unit connected to the and-hold circuit and the analog-to-digital converter, and a channel control logic unit for controlling the operation of the analog multisolexing unit; A multi-channel display device according to claim 1, characterized in that the unit is also in contact with the write control logic unit. 6) The multi-channel display device according to item at of the claimed scope, characterized in that it comprises a variable gain amplifier connected to each of the channel input terminals.