JPS58166814A - Addition amplifying circuit - Google Patents

Abstract

PURPOSE:To realize the individual setting of amplification factor for an amplifying circuit which obtains an output of addition of two differential input signals, by connecting the output current path of a current mirror circuit and the output current path of the other side of the 1st differential amplifying circuit to an output terminal. CONSTITUTION:When a differential input signal is impressed to a differential amplifying circuit 31, the output of a transistor (TR) 2 of the other side is supplied to a common emitter terminal of a differential amplifying circuit 32. As a result, the 1/2 output is amplified double by a current mirror circuit 33 and delivered to an output terminal 13 together with the output of a TR3 of the other side. When a differential input signal is impressed to the circuit 32, the collector output of a TR6 is amplified double by the circuit 33 to be delivered to the terminal 13. Therefore no effect is produced to the amplification factor between the circuits 31 and 32 although their amplification factors are changed individually.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a summing amplifier circuit that adds two differential input signals and obtains a single-ended output.

FIG. 1 shows an embodiment of the present invention. In FIG. 0, the base of transistor 2 as the first transistor is connected to the input terminal IK, and the emitter is commonly connected to the emitter of transistor 3 as the second transistor. At the same time, foot I
The current source 14 is connected to the negative power supply (-B) K, and the collectors are both connected to the emitters of the transistor 6 as the third transistor and the transistor 7 as the fourth transistor. The transistor 60 is connected to the base & 1 input terminal 5, and the collector is connected to the base of the transistor 12 as the fifth transistor. Contact. The base of the transistor 7 is connected to the input terminal 8, and the collector is connected to the positive power source (+B) K. The emitter of the transistor 12 is connected to the positive power supply (10B) via the resistor 11, and the collector is connected to the output node 13 and the collector of the transistor 3 (KW).

The base of the transistor 3 is connected to the input electronics 4.

In the above configuration, the differential input signal applied between input terminals 1 and 4 is amplified by differential amplifier circuit 3L, which is composed of transistors 2 and 3 and serves as a first differential amplifier. A differential input signal applied between input terminals 5 and 8 is amplified by a differential amplification circuit 32, which is a second differential amplification circuit consisting of a tra/dystero and 7. The output of the differential amplifier circuit 32 is connected to a diode 9, resistors 10 and 11. The signal is outputted to the output terminal 13 via a current mirror circuit 33 consisting of a transistor 12.

Here, if the resistance value of the resistor 10 of the input circuit of the current mirror N path is twice the resistance value M of the resistor 11, then the resistance value of the resistor 1
0Kfift, since twice the current flowing through the resistor 11 flows through the differential amplifier circuit 32! The Q output is amplified twice by the current mirror circuit 31 and output to the output terminal 13.

The DC operation of such a circuit is as follows: transistors 2, 3 and 6
Assuming that the characteristics of
Since the current in the differential amplifier circuit 320 also operates as a current source, 1/2 of the current value of the transistor 20 flows through the differential amplifier circuit 320 and transistors 6 and 7, and the current value of the transistor 6 increases. 'fllR twice as much as
flows into the transistor 12 of the caret mirror circuit 33. Therefore, the current value of the transistor 12 is equal to the current value of the transistors 2 and 30, and no output current is generated at the output terminal 13 of the 6th order differential amplifier circuit 3.
When a differential input signal is applied to the differential amplifier circuit 3, the output of the transistor 2, that is, the output of the differential amplifier circuit 31, is applied to the differential amplifier circuit 3.
-49 Since human power is applied to the common emitter 4, 1/1 of the output is
2 is amplified twice by the current mirror circuit and sent to output terminal 1.
3, and the other output (output of transistor 3) is also output to the output terminal, child 13. Therefore, the differential amplifier circuit 31
For the input signal to the differential amplifier circuit 3-4, as in the case of a combination of a general differential amplifier circuit and a current mirror circuit, the output pin 13K is an amplified push-pull signal. I get the output.

Next, when a differential input signal is applied to the differential amplifier circuit 3, it is amplified by the three differential amplifier circuits, and the collector output of the transistor 6 is amplified twice by the current mirror circuit 33 to form an output terminal. 13. Therefore, transistor 2
, S%, and 7 are equal, the differential input signal to the differential amplifier circuit 31 is a push-pull output of the differential output of the differential amplifier circuit 31 as described above, and the amplifier circuit 32 Since the output of the differential amplifier circuit 32 is 02 times the single output of the differential input signal to the differential input signal, each differential input signal is amplified with the same amplification degree. Also, as is well known, the amplification degree of the differential amplifier circuits 31 and 32 is 3.
By inserting appropriate resistances into the emitter circuits of 6S and 7, it is possible to individually set different amplification degrees for each, and even when the amplification degrees of differential amplifier circuits 31 or 32 are changed individually, they are different from each other. Does not affect the amplification degree of the amplifier circuit In the above explanation, the differential amplifier circuit uses an NPN transistor, and the current mirror circuit uses a PNP transistor. Of course, the same operation can also be achieved using FETs.

In addition, in FIG. 1, in order to operate the transistor 2 of the differential amplifier circuit 31 normally, it is necessary to maintain the necessary tItw pressure between the collector and the base of the transistor 2. A certain DC potential difference is required between input terminal 1-, which applies a differential input signal to the dynamic amplifier circuit 31, and input terminal 548, which applies a differential input signal to the differential TJ11-wheel circuit 32. FIG. 2 shows an embodiment in which such a potential difference is provided, and a differential amplifier circuit 84 is provided at the front stage of the differential amplifier circuit in the embodiment of the closed one diagram, or as shown in the dotted line, A differential 11# differential circuit 35 is provided before the differential amplifier circuit 32.

That is, although a detailed explanation of the operation will be omitted, in FIG. The output is applied to differential input terminals 1 and 4 of the differential amplifier circuit 31, and the differential input signal applied between terminals +1 and 4 in FIG. Ru.

Further, the differential amplifier circuit 35 shown in the dotted line is composed of a differential input terminal 4142, a transistor 3637, a resistor 3839, and a constant current source 40, the output of which is applied to the input terminals 5 and 8,
In the wL1 diagram, the differential input signal of the differential amplifier circuit (3) applied to the terminals 5 and 8 is the differential input terminal 41.4.
It is applied between 9 and 9.

Direct vt of the collector of such a differential amplifier circuit 31 or 3Σ
By adjusting the L voltage, the differential amplification N paths 31 and 3
It is possible to add two DC operating points.

As described above, since the differential amplifier circuit 34 or 35 is provided before the differential amplifier circuit 31 or 32, it is possible to achieve good operation without being restricted by the respective DC potentials of the valley differential input signals. I can do it.

It is of course possible to use both of the differential amplifier circuits 3 and 3Σ depending on the case.

Although not shown, input terminals 1.4 in Figure 1
After applying appropriate DC potentials to and 5 and 8,
Of course, a differential input signal may be applied to each input terminal via a cup +1 ring capacitor.

As described above, according to the present invention, two pairs of differential input signals can be added and amplified to obtain a single-ended output.
The pair of differential input signals can be individually increased without being influenced.

[Brief explanation of drawings]

FIG. 1 and FIG. 2 each show an embodiment of the present invention.
This is a schematic diagram. In the figure, the ox and 扛Ix are differential amplifier circuits, respectively, and the ox is a caret mirror circuit.

Claims (1)

[Claims] Consisting of a first differential amplifier circuit, a second differential amplifier circuit, and a current mirror circuit, the second differential amplifier circuit is connected in series to the 10,000 output current path of the first differential amplifier circuit. And applicable @2
The output current path of the 10,000 transistors of the differential amplifier circuit is connected to the input current path of the current mirror circuit, and the output current path of the current mirror circuit and the other output current path of the differential amplifier circuit of @1 are connected to the input current path of the current mirror circuit. A summing amplifier circuit characterized in that a summation output of the first and second differential amplification circuits is obtained by connecting the above to an output terminal.