JPS58166074A - Thermal head - Google Patents

Thermal head

Info

Publication number
JPS58166074A
JPS58166074A JP57048870A JP4887082A JPS58166074A JP S58166074 A JPS58166074 A JP S58166074A JP 57048870 A JP57048870 A JP 57048870A JP 4887082 A JP4887082 A JP 4887082A JP S58166074 A JPS58166074 A JP S58166074A
Authority
JP
Japan
Prior art keywords
thermal head
current
time period
input
inputted
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57048870A
Other languages
Japanese (ja)
Inventor
Nobuhiro Oshima
大島 信洋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP57048870A priority Critical patent/JPS58166074A/en
Publication of JPS58166074A publication Critical patent/JPS58166074A/en
Pending legal-status Critical Current

Links

Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/315Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of heat to a heat sensitive printing or impression-transfer material
    • B41J2/32Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of heat to a heat sensitive printing or impression-transfer material using thermal heads
    • B41J2/35Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of heat to a heat sensitive printing or impression-transfer material using thermal heads providing current or voltage to the thermal head
    • B41J2/355Control circuits for heating-element selection

Landscapes

  • Electronic Switches (AREA)
  • Facsimile Heads (AREA)

Abstract

PURPOSE:To make the speed fast and to make it possible to record a picture with a intermediate tone by providing serial-in parallel-out shift registers in two stages in a driving ICs for DD type thermal head, and providing a gate circuit group for resistor units. CONSTITUTION:Video signals 2<0>-2<2>, which are digitalized by an AD converter, are inputted to input terminals E0-E2. The first bit of the binary coded video signal is inputted to the shift register 1G1-1Gn, and the binary coded second bit is simultaneously inputted to the shift registers 2G1-2Gn. Then the terminal E1 is turned On, the terminal E2 is turned OFF, and a current is conducted under this state for a time period T1. Then E1 is turend ON and E2 is turned and the current is conducted for a time period T2. Then the current is conducted during the time period T1 for the video signal 2<0>, the current is conducted during the time period T2 for the 2<1>, and the current is also conducted during the time period (T1+T2) for the 2<2>. Thus the half tone picture can be obtained.

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明は5発熱抵抗体と、これを駆動する半導体集積回
路とが同一基板上に形Fltされ九ナーマルヘッドに関
する。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a nine-terminal head in which five heating resistors and a semiconductor integrated circuit for driving them are formed on the same substrate.

〔発明の技術的背景とその問題点〕[Technical background of the invention and its problems]

サーマルヘッドに於ては、0ム喝木などますます高速化
が要求され、またビデオ信号など文字だけでなくハーフ
トーンを含むIm儂を高速に記録出来る装置が必要とな
ってくる。
Thermal heads are required to have higher speeds, such as zero frame recording, and there is also a need for a device that can record images such as video signals at high speed, including not only characters but also halftones.

従来、このようなサーマルヘッドの構成の一方法として
R11図に示す如き、ナーマルヘッドカアリ、発熱抵抗
体R1t1−&rVnk対して、複赦澗mコをまとめて
1ブロツクとし、各々ブロック毎に#p導導体集積回路
名れ九チップC1−,Cnで構成され、且つ半導体集積
回路化され九チップC1,CnKは、発熱抵抗体R’l
、t−BIn、m K対応し九駆―素子at、を荀n、
mが接続され、駆動素子DI、1””Dfl、ffmは
、シフトレジスタ()1−、Onそれぞれ接続されてい
る。
Conventionally, as a method of configuring such a thermal head, as shown in Fig. R11, for the thermal head burner and the heating resistor R1t1-&rVnk, multiple pardons are grouped together into one block, and each block is divided into two blocks. #p Conductor integrated circuit name: It is composed of nine chips C1-, Cn, and the nine chips C1, CnK, which are made into semiconductor integrated circuits, have heating resistors R'l
, t-BIn, m K corresponding nine drive-element at, Xun n,
The drive elements DI, 1''Dfl, and ffm are connected to the shift registers ()1- and On, respectively.

この第1図のサーマルヘッドにおいて、ビデオ信号のよ
うなノ・−フトー/を含む信号で紀鍮―作を行なう場合
、第2図に示すよりな入り変118によりビデオ信号を
A/D変換し九ディジタル信号を用いる。この例につ−
て説明する。
In the thermal head shown in Fig. 1, when performing a photocopy with a signal containing no. -ft/, such as a video signal, the video signal is A/D converted by the converter 118 shown in Fig. 2. 9 digital signals are used. For this example
I will explain.

第381(b)は1ライン分のビデオ信号(1)を、ス
ライスレベル、vI、■2.v3で振り分は九ディジタ
ル信号2°21 、2 Nである。このディジタル備考
2°、21゜22を用いて、次のような1鐘動作を行な
う、tηディジタル信号2°データを第1図のシフトレ
ジスタA1q1へ入力し、11時間印字する。
No. 381(b) converts the video signal (1) for one line to the slice level, vI, ■2. In v3, the distribution is 9 digital signals 2°21, 2N. Using these digital notes 2°, 21° and 22, tη digital signal 2° data, which performs the following one-bell operation, is input to the shift register A1q1 in FIG. 1 and printed for 11 hours.

次K、21のデータを入力し、T2時間印字する。Next, input the data of K and 21 and print for T2 time.

次に2”のデータを入力し、T3時間印字する、と1う
ように繰返し1鎌動作を行な−、1う多ンを印字する。
Next, input data of 2'', print for T3 hours, repeat one sickle motion as in 1, and print 1 count.

このようKlラインの紀鎌動作を行なうのに、3個のデ
ータ転送を行なわなければならない。例えばA4サイズ
8本/Wのサーマルヘッドでは、発熱抵抗体の数が17
28ドツトにも適する。
In order to perform such a Kl line switching operation, three data transfers must be performed. For example, in an A4 size 8/W thermal head, the number of heating resistors is 17.
Also suitable for 28 dots.

そのため、このドツトaに相当するビットデータt 転
送f ルf) K、 りo y l IMHgで1.7
28rfllかかり、これを3回も繰返すと、5.18
4ffllKもなる。
Therefore, the bit data t corresponding to this dot a is 1.7 in IMHg.
It takes 28 rflll and if you repeat this 3 times, it will be 5.18
4ffllK will also be.

1ラインの1鍮動作を5ms以上にするか、クロックI
 Mdgを2MHz、3劇震と上げなければならない。
Make the 1 line operation 5ms or more, or clock I.
I have to raise the Mdg to 2MHz, 3 tremors.

初めの1ラインの1鎌動作を5ms以上にするという間
1は、ますます高速化が進む墳状からしてよくない、1
ラインの紀1aIIb作は短ければ短い程よい。まえ、
クロック1 ■zを2M、3Mt(gK上げるという問
題は、半導体集積回路の性能そのものにかかる問題で、
性能を上げると轟然ながら製造歩留りは下がり、コスト
は高くなる。このようにコスト高の半導体集積回路を内
蔵し九チップを複数個も配設したサーマルヘッドはかな
り高価なものKなる。し九がって従来のす−マルヘッド
は、ビデオ信号のようなハーフトーンを含む画像を記録
するKは、不同きである。
It is not good to make one sickle movement for the first line more than 5ms, considering the shape of the mound, which is becoming faster and faster.
The shorter the Rhine Era 1aIIb work, the better. front,
Clock 1 ■The problem of raising z by 2M, 3Mt (gK) is a problem that affects the performance of the semiconductor integrated circuit itself.
Improving performance dramatically lowers manufacturing yields and increases costs. A thermal head incorporating a high-cost semiconductor integrated circuit and having a plurality of nine chips is quite expensive. Therefore, in conventional universal heads, the K for recording images including halftones, such as video signals, is not the same.

〔発明の目的〕[Purpose of the invention]

本発明は、このような従来のサーマルヘッドの欠点に鑑
みてなされ九もので、高速化に適し、しかもビデオ信号
のようなハーフトーンを含むIII#IIを速度を減じ
ることなく1鎌を行なうことの可能なサーマルヘッドを
提供することを目的とする。
The present invention has been made in view of the shortcomings of the conventional thermal head, and is suitable for high-speed processing, and is capable of processing III#II including halftones such as a video signal without reducing the speed. The purpose is to provide a thermal head that is capable of

〔発明の概要〕[Summary of the invention]

本発明は、DD型サーマルヘッドの駆動用ICK2段以
上のシリアルインパラレルアウトのシフトレジスタとゲ
ート回路群を抵抗体単位に設け、中間調を実現し丸もの
である。
In the present invention, a shift register with two or more stages of serial-in-parallel output and a gate circuit group for driving an ICK for a DD type thermal head are provided for each resistor, and halftones are realized in a circular manner.

〔発明の実施例〕[Embodiments of the invention]

第4図に本発明和係る一実施例の具体的なサーマルヘッ
ドの構成を示す。
FIG. 4 shows a specific configuration of a thermal head according to an embodiment of the present invention.

同図において、サーマルヘッドの発熱抵抗体at、t〜
ルn、m K対して、複数個をまとめて1ブロツクとし
、各々ブロック毎に半導体集積回路化したチップC1−
Cnが配設されている。半導体集積回路化したfyプC
1−、CnKは発熱抵抗体Rs、ran、mに対応した
駆動素子Dt、1−J)、1.、Bが接続され、駆動素
子01.l荀。、、nKは、鍮珊和ゲート回路ムl−礒
n、mが接続されている。また論理和ゲート回路A1.
1%A1 、(Hには、論理積ゲート回路1 al、l
〜t En、me 2Bt、r4Brvnがそれぞれ接
続されている。一層積グート回路I Bl、1〜I E
3n、mの@10入力は共通となっており、出力端子F
1に接続されてお沙、第2の入力は、それぞれシフトレ
ジスタIG1〜IGnの並列出力端にそれぞれ接続され
ている。同様に論理積ゲート回路2 BrJBmの第1
の入力は共通となってお9%出力端子F2に接続され、
!s2の入力はそれぞれシフトレジスタ2 G1−20
nの並列出力端にそれでれ接続されている。また、シフ
トレジスタIG、〜IGg、2(h〜2Gnは、それで
れ直列に接続され、エンコーダEの出力端子にそれぞれ
接続されている。このサーマルヘッドを用いて紀鎌動作
を行なうには次のようKする。第2図及び第3図で説明
したディジタル化されたビデオ信号2°−22を第4図
のエンコーダEの入力端子Ha−g2に入力してやれば
、シフトレジスタl Gl、l Gnには2連数コード
化され九ビデオ信号の第1ビツト、シフトレジスタ2(
h〜2Goには246コード化され九ビデオ信号の第2
ビツトが同時に入力される0次に端子斑を開状態、[2
を01i’lF状趨でT1時間通電し九後続いてElを
ON% E2をON K してT2時間通電すればよい
In the figure, heating resistors at, t~ of the thermal head are shown.
For the blocks n and mK, a plurality of chips are combined into one block, and each block is made into a semiconductor integrated circuit chip C1-
Cn is provided. FYP C made into a semiconductor integrated circuit
1-, CnK is the drive element Dt corresponding to the heating resistor Rs, ran, m, 1-J), 1. , B are connected, and the driving elements 01. l. , , nK are connected to the brass separator gate circuit Ml-Iso n, m. Also, the OR gate circuit A1.
1% A1, (H has AND gate circuit 1 al, l
~t En, me 2Bt, and r4Brvn are connected, respectively. Single-layer gout circuit I Bl, 1 to I E
The @10 inputs of 3n and m are common, and the output terminal F
The second inputs are connected to the parallel output terminals of the shift registers IG1 to IGn, respectively. Similarly, the first of AND gate circuit 2 BrJBm
The input is common and connected to the 9% output terminal F2,
! The inputs of s2 are each shift register 2 G1-20
It is connected to the parallel output terminal of n. In addition, shift registers IG, ~IGg, 2 (h ~ 2Gn) are connected in series, and are respectively connected to the output terminals of encoder E. To perform the kicking operation using this thermal head, follow the steps below. If the digitized video signal 2°-22 explained in FIGS. 2 and 3 is input to the input terminal Ha-g2 of the encoder E in FIG. is encoded twice and is the first bit of the nine video signals, shift register 2 (
h~2Go is encoded with 246 and is the second of nine video signals.
The 0th order terminal spot is open when bits are input at the same time, [2
It is sufficient to energize for T1 hours in the 01i'lF state, and then turn on El and E2 for T2 hours.

このようKすれば、ビデオ信号2°に対してT1時間1 2  Knt、テT’211i14.2  K対t、テ
(T1+T2)時間の通罐が行なわれる。
With K in this manner, a conversion of T1 time 1 2 Knt, T'211i14.2 K to t, and Te(T1+T2) time is performed for the video signal 2°.

尚上記実1111例では、シフトレジスタのR数を2段
で説明し九がこの@数を増加させればNHK対して、白
も含めて2Nlllllの八−7トーン−儂を得ること
が可能であることは首うまでもない。
In addition, in the above real example 1111, if the R number of the shift register is explained as 2 stages, and 9 increases this @ number, it is possible to obtain 2Nlllll 8-7 tones - me including white for NHK. It goes without saying that this is true.

〔発明の効果〕〔Effect of the invention〕

以上述べ九ように本発明に係るサーマルヘッドの紀録勅
作は、簡尋であ抄、且つ1回の転送で済む丸め高速化が
容易である。まえ、クロック局波数をヒげることなく、
現状の製造技術で安価な歩留りの阪いチップを使用する
ことが可能で、サーマルヘッドも安価に製作できる。
As described above, the thermal head journal according to the present invention is simple and abridged, and it is easy to round up and speed up the process by transferring it only once. Before, without decreasing the clock station wave number,
With current manufacturing technology, it is possible to use inexpensive chips with low yields, and the thermal head can also be manufactured at low cost.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のサーマルヘッドの構成図、第2図は第1
図のサーマルヘッドにおいて用いるA/D変換器を示す
図、第31は第2図に示し九ム/D&喚器によって生ず
る波形図、第4図は本発明に係る一実施例の構成図であ
る。 Rt、t−4n、+n・・・発熱抵抗体、D〜p島0m
・・・駆動素子、A1−幅・・・fi1理和ゲート回路
、1B1−〜on、m ”、論虐積ゲート回路、2B1
.1〜2Bn1.n・・・!l/IJl積ゲート回路。 IGl〜IGn、2G1(on・・・シフトレジスタE
・・・エンコーダ。 181図 第2図 第8図 第4図
Figure 1 is a configuration diagram of a conventional thermal head, and Figure 2 is a diagram of a conventional thermal head.
Fig. 31 is a diagram showing the A/D converter used in the thermal head shown in Fig. 2; Fig. 31 is a waveform diagram generated by the D &amp; . Rt, t-4n, +n...heating resistor, D~p island 0m
...Drive element, A1-width...fi1 Logical sum gate circuit, 1B1-~on, m'', logical product gate circuit, 2B1
.. 1-2Bn1. n...! l/IJl product gate circuit. IGl~IGn, 2G1 (on...shift register E
...encoder. 181Figure 2Figure 8Figure 4

Claims (1)

【特許請求の範囲】 −列に配列され先夜数個の発熱1itIc体と、この発
熱抵抗体を各々、対応して駆−する複数濶毎に鐙けられ
先夜数個の半導体集積回路を同一基板上に配設して成る
サーマルヘッドに於て、前記発熱抵抗体を1鍮信号デー
タに応じて各々饋別に駆動する駆動素子と、これらの駆
動素子に並列に紀鍮信号を供給する紀鍮信号供給@路と
を備え、前記配録信号供給回路は、直列に入力される起
鎗信号データを並列に出力する複数段のシフトレジスタ
と。 このシフトレジスタの各段に’1)vhて各々の出力を
第1の入力とし、これら各段のシフトレジスタの各々の
出力の送出を制御する九めIt)4kRに共通な制御信
号を第2の入力とする嬉1のダート回路群とこれら11
のダート回路群の出力で、同一〇前記発熱抵抗体に対応
するものを入力とし、前記駆動孝子を出力とする嬉2の
ダート回路群を具備して成ることをITI黴とするサー
マルヘッド。
[Scope of Claims] - Several heat-generating 1itIc elements arranged in a row, each of which drives the heat-generating resistors in a corresponding manner. The thermal head disposed on the same substrate includes drive elements that drive the heating resistors individually according to signal data, and a controller that supplies a signal to these drive elements in parallel. and a multi-stage shift register for outputting serially input signal data in parallel. For each stage of this shift register, the output of each '1)vh is used as the first input, and the control signal common to 4kR is inputted to the second input. The dirt circuit group of Raku 1 and these 11 as inputs
An ITI thermal head comprising a dirt circuit group of 2 whose input is the output of the dart circuit group corresponding to the same heat generating resistor and whose output is the drive element.
JP57048870A 1982-03-29 1982-03-29 Thermal head Pending JPS58166074A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57048870A JPS58166074A (en) 1982-03-29 1982-03-29 Thermal head

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57048870A JPS58166074A (en) 1982-03-29 1982-03-29 Thermal head

Publications (1)

Publication Number Publication Date
JPS58166074A true JPS58166074A (en) 1983-10-01

Family

ID=12815316

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57048870A Pending JPS58166074A (en) 1982-03-29 1982-03-29 Thermal head

Country Status (1)

Country Link
JP (1) JPS58166074A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61227074A (en) * 1985-03-30 1986-10-09 Toshiba Corp Thermal head driving circuit
US4697938A (en) * 1984-04-17 1987-10-06 Tokyo Electric Co., Ltd. Multi-tint thermal printing apparatus control system
JPS648049A (en) * 1987-06-30 1989-01-12 Toshiba Corp Recording device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5714315A (en) * 1980-07-02 1982-01-25 Nishida Kk Drying hanger fixed only by hanging

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5714315A (en) * 1980-07-02 1982-01-25 Nishida Kk Drying hanger fixed only by hanging

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4697938A (en) * 1984-04-17 1987-10-06 Tokyo Electric Co., Ltd. Multi-tint thermal printing apparatus control system
JPS61227074A (en) * 1985-03-30 1986-10-09 Toshiba Corp Thermal head driving circuit
JPS648049A (en) * 1987-06-30 1989-01-12 Toshiba Corp Recording device

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