JPS58165732U

JPS58165732U - Dropout detection circuit

Info

Publication number: JPS58165732U
Application number: JP6164482U
Authority: JP
Inventors: 吉久　功三; 奥井　勇
Original assignee: 株式会社東芝
Priority date: 1982-04-27
Filing date: 1982-04-27
Publication date: 1983-11-04
Also published as: JPH0337175Y2

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of drawings]

第１図は従来のドロップアウト検出回路を示す回路図、
第２図ａ−ｇは第１図の回路の各部信号波形図、第３図
はこの考案の一実施例を示す回路−図である。９・・・・・・リミッタ回路、１０・・・・・・位相ロ
ックループ回路、１１．　１２．　１３・・・・・・第
１、第２、第３の位相検波器、１４．１５・・・・・・
出力回路、Ｃ工・・・・・・容量。ｉ　　　　　　　　　　　　　　　　　　　　　　　；
−一一一丁一一］−一Figure 1 is a circuit diagram showing a conventional dropout detection circuit.
2a to 2g are signal waveform diagrams of various parts of the circuit of FIG. 1, and FIG. 3 is a circuit diagram showing an embodiment of this invention. 9... Limiter circuit, 10... Phase locked loop circuit, 11. 12. 13...First, second, and third phase detectors, 14.15...
Output circuit, C engineering...Capacity. i ;
−111cho11】−1

Claims

[Scope of utility model registration request]

(1) Detection circuit means for obtaining a judgment output of one level during the dropout period of the input FM signal and the other level during the period excluding this period at the output terminal, and an integrating circuit connected between the output terminal and the reference potential terminal. and an output differential amplifier in which an integral output from the capacitor is applied to one input terminal, a bias is applied to the other input terminal, and a dropout detection signal is obtained at the output terminal. Dropout detection circuit.

(2) The detection circuit means uses an FM signal obtained by passing the input FM signal through a limiter circuit, and a synchronization signal generated by inputting the input FM signal into a phase-locked loop circuit, and the FM signal a first phase detector that obtains a first phase detection output of the positive phase signal of the synchronization signal;
a second phase detector that obtains a second phase detection output of the M signal and a negative phase signal of the synchronization signal; a logical sum output of the first and second phase detection outputs and a negative phase signal of the synchronization signal; the third with
a third phase detector that obtains a phase detection output of Scope of claim for utility model registration, which is characterized by the following:
Dropout detection circuit described in section.