JPS58161337U

JPS58161337U - Multiple switch drive circuit

Info

Publication number: JPS58161337U
Application number: JP5812082U
Authority: JP
Inventors: 川崎　富美雄; 典男小宮山
Original assignee: 日本電気株式会社
Priority date: 1982-04-21
Filing date: 1982-04-21
Publication date: 1983-10-27

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of the drawing]

第１図はこの考案の実施例の回路図である。図において
、１・・・・・・ＲＦ信号入力端子、２，３・・・・・
・第１ゲートバイアス端子、４・・・・・・ドレインバ
イアス端子、５・・・・・・ＲＦ信号出力端子、６．８
・・・・・・第２ゲート、７・・・・・・第１ゲート、
９・・・・・・駆動回路制御端子、１０．１１・・・・
・・駆動回路出力端子、２０・・・・・・ＦＥＴスイッ
チ部、２１・・・・・・スイッチ共通駆動回路、３１．
　３３．　３５．　３Ｂ、　　４２．　４４・・・′・
・・チョークコイル、３２．３４，３６，３７゜３９．
４３．４５・・・・・・コンデンサ、４０．４１・・・
・・・デュアルゲートＦＥＴ、５　ｌ・・・・・・トラ
ンジスタ、５４．５７・・・・・・ダイオード、５５．
５６・・・・・・可変抵抗、５２．５８・・・・・・抵
抗である。FIG. 1 is a circuit diagram of an embodiment of this invention. In the figure, 1...RF signal input terminal, 2, 3...
・First gate bias terminal, 4...Drain bias terminal, 5...RF signal output terminal, 6.8
...Second gate, 7...First gate,
9... Drive circuit control terminal, 10.11...
...Drive circuit output terminal, 20...FET switch section, 21...Switch common drive circuit, 31.
33. 35. 3B, 42. 44...'・
...Choke coil, 32.34,36,37°39.
43.45... Capacitor, 40.41...
...Dual gate FET, 5 l...Transistor, 54.57...Diode, 55.
56...variable resistor, 52.58...resistance.

Claims

[Scope of utility model registration request]

In a multiple switch drive circuit that controls on/off of an amplification type switch including a plurality of dual gate FETs and supplies a bias voltage to one gate of the dual gates, one of the bias voltages is set as a variable voltage at which the FET is turned on. a first circuit including a variable resistor made as a variable resistor; a second circuit including a resistor making one of the bias voltages as a constant voltage at which the FET is turned on; and a diode is provided in each of these first and second circuits. a plurality of switch drive circuits including a drive circuit including transistors connected through the transistors and each supplying a voltage at which the FET is turned off;