JPS58159161A - Electronic device having self-diagnosing function - Google Patents

Abstract

PURPOSE:To simplify both the circuit constitution and a diagnosis program and to assure the display of the result of diagnosis, by allotting a display storage region over plural RAMs. CONSTITUTION:An ROM24 stores a program by which a CPU21 controls a device 22 to be controlled and the arithmetic processing is given to the signal supplied from the device 22. A diagnosis program of each block is stored in a diagnosis ROM26. A multiplexer 18 connects selectively RAM16 and 28 to a bus 10 or a display control circuit 20 in response to the control signal given from the circuit 20. A display RAM region covers the RAM16 and 28 consecutively. In case the CPU12 uses the CPURAM region and the display RAM region of the RAM16 and 28, the multiplexer 18 connects the RAM16 and 28 to a main bus 10.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention comprises a processing means, a plurality of random access memories, and a read-only memory storing a diagnostic program.
The present invention relates to an electronic device C1 having a memory and displaying self-diagnosis results.

In recent years, various electronic devices have incorporated processing means (hereinafter referred to as CPU) such as microprocessors, and this CPU has read-only memory (read-only memory circuit 2 or below).
Accordingly, various controls and calculations are performed in the programs stored in the program (referred to as M).In such electronic devices, ROM, random - Access memory (hereinafter referred to as RAM) and circuits related to the CPU+2, such as the keyboard, may fail, and even if there is a partial failure, the CPU cannot perform accurate control and calculations.Therefore, These electronic devices (2) are equipped with a self-diagnosis function, perform self-diagnosis as appropriate, confirm that each circuit is normal, and display a message if there is a faulty circuit.

FIG. 1 is a block diagram of a conventional electronic device having a self-diagnosis function. The main bus 10, which has control lines, address lines, and data lines, includes, for example, a Z80A micro
A CPU 12 which is a processor; a keyboard 14 which is an input device; RAM (1) 16° multiplexer 182 display control circuit 20. Controlled device 22, such as a logic analyzer. A ROM 24 that stores a program for the CPU 12 to control the controlled device 22 and to process signals from the controlled device 22. A diagnostic ROM 26 storing a program for diagnosing each block is connected.

The multiplexer 18 is controlled by the display control circuit 20 to
AM (If) 28 is selectively connected to the main bus 10 or the display control circuit 20 (-).Display control circuit 20
The multiplexer 18 is controlled by the signal from the bus 10, and the signal from the display RAM (storage) area of the RAM 28 is transmitted to the cathode ray tube (hereinafter referred to as CRT) which is the display means.
Display on CRT 30 (2) Convert to appropriate signal and display on CRT 3
Controls the display of 0.

RAM16, RAM28, RO-M24 and diagnostic ROM
The allocation of 26 is as shown in FIG. That is, the total storage capacity is 65 bytes, so the address is 000.
It ranges from 0 to FFFF (hexadecimal notation). The diagnostic ROM 26 has a capacity of 4 bytes and has an address of 0000.
ROM 24 has a capacity of 4 bytes and occupies addresses 1000 to DFFF, and RAM 16 has a capacity of 4 bytes and addresses E00.
The RAM 28 has a capacity of 14 bytes and occupies addresses F000 to FFFF. The RAMs 16 and 28 act as a CPU RAM area as a temporary storage circuit for the CPU 12 and the above-mentioned display RAM area, and the display RAM area is located at address F0 of the RAM 28.
IK bytes are divided from 00 to F3FF)
Ru. Therefore, the CPURAM area is 7 nodes from addresses gooo1 to EFFF and F2O3 to FFFF.

When the CPU 12 controls the controlled device 22 or performs arithmetic processing on signals from the device 22, the display control circuit 2
0 to the CPU 12 via the main bus 10.
(Two connections are made. Therefore, the C of RAM28)'URAM area operates in conjunction with the temporary storage circuit of the CPU12, and the CPU
12 processing results etc. are stored in the display RAM area of the RAM 28. When displaying this processing result etc. on CRT30,
A control signal from CPU 12 via display control circuit 20 causes multiplexer 18 to connect RAM+28 to display control circuit 20 . The display control circuit 20 repeatedly reads out the contents of the display RAM area of the RAM 28 and displays them on the CRT 30. The reason why the display control circuit 20 directly reads the contents of the RAM 28 without going through the bus 10 is because the clock frequency of CPtJ and the clock frequency of the display control circuit are different.

When the power switch is turned on or when a self-diagnosis command is input from the keyboard, the CPU 12
Perform self-diagnosis using program 6. However, C.P.
'It is assumed that U12 and ROM26 are not malfunctioning.

This self-diagnosis is performed according to the flowchart shown in FIG. First, in step 40, the RAM 28 is connected to the bus 10, and the R
Diagnose AM16 and AM28. This diagnosis is CPU
2 writes predetermined data such as the output of a counter to each address of the RAMs 16 and 28, and then reads out the written data and compares it with the predetermined data. In step 42, if there is an error (failure) in the RAM (5), the process moves to step 44 and the content of the error is displayed on the CPU 2.
Then, the process moves to step 46.

Even if there is no error in step 42, step 4
6, the ROM 24 is diagnosed. Since the contents of the ROM 24 are predetermined, the CPU 12
The contents of each address of M24 are sequentially added and compared to see if the final value is equal to a predetermined value, thereby diagnosing the ROM.

In step 48, if there is an error (failure) in )<0M24, the process moves to step 50, and the content of the error is
2 and moves to step 52 (1). Even if there is no error in step 48, the process moves to step 52 and diagnoses the keyboard 14. This diagnosis checks whether all keys on the keyboard 14 are pressed or not. When the person presses the keys in a predetermined order, it is checked whether a predetermined key code is generated.In step 54, if there is a second error (failure) on the keyboard 14, step 56 (changes the content of the first shift error to C) is checked.
It is stored in the register of the CPU 12 and moves to step -38 (1. If there is no error in step 54, the process moves to step 58. (6) In step 58, the content of the error or the information that there is no error stored in the register of the CPU 12 is stored. Display R of RAM28
The self-diagnosis results are transferred to the AM area, the RAM 28 is connected to the display control circuit 20, and the self-diagnosis results are displayed on the CRT 30.

However, in this conventional electronic device, since it is allocated to the display, the entire RAM 28 or the display R of the RAM 28
If the AM area is out of order, the diagnosis result is CRT30
was not displayed, and we could only assume that at least RAM 28 was out of order. Therefore, even though other blocks were diagnosed, the diagnosis results could not be obtained.

In order to improve this drawback, it is conceivable to make the allocation (address) of the display RAM area variable, at least in the display during self-diagnosis, and to allocate the display RAM area to a normal RAM. However, in order to make the address of the display RAM area variable, a function is required to shift the address signal for the display RAM area in accordance with the RAM diagnosis result. If the clock frequencies of the CPU 2 and the display control circuit 20 are different, this address signal shift function cannot be performed by the CPU 12, and a new variable address shift circuit is required, which has the disadvantage of becoming expensive if the configuration becomes complicated. be. Furthermore, even if the clock frequencies of the CPU 2 and the display control are made equal and the shift function of the address signal is performed by the CPU 12, the program for this must be stored in the diagnostic ROM 26f, which increases the cost of program development and , there is a disadvantage that the capacity of the ROM 26 increases.

SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide an electronic device having a self-diagnosis function that overcomes the drawbacks of the prior art described above.

Another object of the present invention is that the circuit configuration and diagnostic program are simple, and that at least one RAM having a display RAM area is used.
The purpose of the present invention is to provide electronic equipment that can display diagnostic results even if the equipment malfunctions.

Hereinafter, a preferred embodiment of the present invention (two will be explained in detail). Fig. 4 is a block diagram of a preferred embodiment of the present invention, and this block diagram is partially the same as the block diagram of Fig. 1. Like blocks are given the same reference numerals because of their similarity.The embodiment of the present invention shown in FIG. 4 differs from the prior art example shown in FIG. The point is that the multiplexer 18 is connected to the multiplexer 18.The multiplexer 18 is connected to the R
AMs 16 and 28 are selectively connected to bus 10 or display control circuit 20. In addition, RAM16 and 28, ROM
24 array (-The layout of the diagnostic ROM 26 is as shown in FIG. 5. That is, the diagnostic ROM 26, ROM 24, RA
The allocation of addresses for M16 and M28 is the same as in the conventional example shown in FIG. 2, but the display RAM area spans RAM16 and M28 consecutively. 3.5 bytes from RAM16 address E000 to EDFF are CPU
Acts as an AM area, from address EEOO to EFFF
The 0.5 Kbytes act as part of the display RAM area, and are responsible for, for example, the upper (9) half of the display screen of a CRT 30 (see FIG. 6A). Also, the bytes from address F200 to FFFF 3.5 of RAM28 are CPU
Acts as a RAM area, from address FO00 to FIF
The 0.5K bytes up to
(see Figure A).

Therefore, the display RAM area is continuous IK bytes from addresses EEOO to FIFF in RAMs 16 and 28.

The CPU 12 uses the CPU RAM areas of RAMs 16 and 28 as temporary storage circuits, diagnoses the RAMs 16 and 28, and sends arithmetic processing results and self-diagnosis results to RA.
When storing data in the display RAM areas M16 and M28, the multiplexer 18 stores the RAMs 16 and 28 as the main memory area according to a control signal from the CPU 12 via the display control circuit 20.
Connect to path 10. The arithmetic processing by the CPU 12 and the self-diagnosis according to the flowchart in FIG. 3 are performed in the same way as in the conventional example described above, except that the address of the CPU RAM area is different from the conventional example in FIG. (10) Even if the responses are different, there is no problem in operation since these addresses are fixed. However, the diagnosis results during self-diagnosis are stored in each of the display RAM areas of RAM 16 and 28. In other words, the same contents are It is stored in each of the display RAM areas of RAMs 16 and 28.

To display the contents of the display RAM area on the eRT 30, multiplexer 18 connects RAMs 16 and 28 to display control circuit 20, which repeatedly reads the contents of the display RAM area. Therefore, the diagnosis result is displayed on the display screen of the CRT 30 as shown in FIG.
, RAM 28, ROM 24, and keyboard 14 are respectively displayed as EOI, BO2, EO3, and EO4. In the case of the display shown in FIG. 6B, the ROM 24 is out of order, but the RAMs 16 and 28 are not out of order. 6th
In the case of the display in figure C, RAM28 is faulty, but RA
Since M16 is not out of order, only the contents of the display RAM area of RAM16 are displayed. In FIG. 6D, the case of FIG. 6C is reversed, and RAM 16 is out of order, but RAM 28 is not out of order. In the case of Figure 6E, the keyboard 14 and R
AM28 is out of order, and the display RAM area of RAM 16 is being used for display. RAM including display RAM area
It should be noted that even if block 28 fails, the diagnostic results of other blocks can also be determined from the display.

In Figures 6B to 6E, the results of each diagnosis are collectively displayed in accordance with the flowchart in Figure 3 (step 42 in Figure 3).
．． At 48 and 54, the diagnosis results may be displayed each time each diagnosis is completed. Figure 6F shows the display after step 48, and l'-ERROR8: R from the display of EO3J.
It turns out that the OM24 is broken, and the CRT30
Since it is only displayed in the lower half of the display screen, R
It can also be determined that AM16 is out of order. FIG. 6G shows a display when both RAMs 16 and 28 are out of order and/or the display control circuit 20 is out of order.

However, it should be noted that the probability that both RAMs 16 and 28 fail is very small.

As described above, according to the electronic device having the self-diagnosis function of the present invention, since the display 1 (AM area spans multiple RAMs (two) and the diagnosis results are stored in the display RAM area of each RAM) , temporarily due to a RAM failure.
Even if part of the area does not work, display RAM of other RAM
The diagnostic results stored in the area are displayed. Therefore, even if some of the plurality of RAMs fail, all diagnosis results including those of other blocks can be displayed. Further, it is possible to determine whether the RAM is malfunctioning from the diagnosis result display position on the display means. Furthermore, since the display 1 (AM area address is always fixed and continuous) divided into multiple RAMs, the display RA
Continuous and repeated reading of the M area is easy.

The above is a preferred embodiment of the present invention (although it has been described as two).
It will be understood by those skilled in the art that various modifications can be made without departing from the spirit of the invention.

For example, the display RAM area divided into a plurality of RAMs may be assigned to the right half and left half of the display means instead of the upper and lower halves. Furthermore, when the clock frequencies of the CPU and the display control circuit are the same, the multiplexer may be omitted and the display control circuit may read the contents of the display RAM area via the main (13) path or one of the main path and the CPU. . Furthermore, the display means may be a flat display device such as a liquid crystal display or a plasma display device in addition to the CRT.

[Brief explanation of drawings]

Fig. 1 is a block diagram of a conventional electronic device with a self-diagnosis function, Fig. 2 is a diagram showing the allocation of each memory in Fig. 1, Fig. 3 is a flowchart explaining self-diagnosis, and Fig. 4 is a diagram of the present invention. FIG. 5 is a diagram showing the allocation of each memory in FIG. 4, and FIG. 6 is a diagram showing the display of the display means in FIG. 4. 12: Processing means 16. 28: Random access memory 26: Read-only memory in which a diagnostic program is stored 30: Display means Patent applicant 2 Sony Tektronix Corporation (14) FIG, 2 FIG, 5 FIG, 6A

Claims (1)

[Claims] a processing means; a plurality of random access memories;
and a read-only memory storing a diagnostic program, wherein the processing means performs a self-diagnosis according to the diagnostic program and displays the diagnosis result on a display means, wherein the plurality of random access memories An electronic device having a self-diagnosis function, characterized in that a part of each area is allocated to a display storage area for displaying the diagnosis results.