JPS5815806B2 - Initial value setting method for information processing equipment - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an initial value setting method in an information processing device.
The main target is the auto-clear circuit of the memory circuit in electronic desktop calculators.

Electronic desktop calculators and the like have memory circuits made up of flip-flop circuits and the like.

In these flip-flop circuits, the stored value is not determined at the time the power is turned on, and therefore it is necessary to clear the meaningless stored contents at the time the power is turned on before performing calculations.

Therefore, the inventors of the present application have already made an invention in which the contents of the memory circuit are automatically cleared when the power is turned on.

In this invention, when the power is turned on, the output signal of the flip-flop circuit, which is stabilized at one value, is directly supplied as a clear signal to a predetermined memory circuit, and the flip-flop circuit is inverted and cleared by the human input signal of the first key pressed. The purpose is to cancel the signal and input the above-mentioned key manual signal.

This automatically replaces the conventional manual clear signal generation part, and also replaces the flip-flop circuit with an insulated gate field effect transistor (hereinafter referred to as
This is intended to incorporate a clear signal generating circuit into the semiconductor integrated circuit of an electronic desk calculator configured as a one-chip semiconductor integrated circuit.

The above auto clear circuit is PLA (Program).
FIG. 2 shows an example of the main part applied to an electronic desktop calculator using the Logic Array method.

In this PLA, system control in a digital system can be realized with a simplified circuit, and costs can be lowered by reducing the number of parts accordingly.

This system control involves supplying the address information specified by the address register 2 to the fixed memory circuit 3, specifying the X register 4 by the output of the fixed memory circuit 3, for example, the output R2, and opening the AND gate AG4 to input the address information from the adder. i-ho AD
D is set in the X register 4, and address information A1 to A8 of the next step is sent to the address register 2 to advance the operation sequence.

Such digital systems include various memory circuits whose memory contents must be cleared before starting calculations after power is turned on.

For example, X register 4, X register 5, Z register, M
These include a register (not shown), a conditional flip-flop 6 for storing the types of four arithmetic calculations, and an address register 2.

Conventionally, when the power is turned on, the output Q of a flip-flop circuit, which is stabilized at one value, is first applied to these various storage circuits to clear meaningless stored contents.

In other words, the flip-flop 6 is reset by human power R and O.
A clear signal is applied through the R gate circuit 0G1o' to reset the flip-flop 6, and the X register 4, Y register, etc., which are constituted by shift registers, are connected to AND gate circuits AG1 and AG3 forming a feedback loop. The memory contents are cleared by applying a clear signal to each digit to break this feedback loop, and the clear signal is commonly input to each digit of the address register 2, which is composed of an RS flip-flop, to set an initial value. It is something.

Note that, as shown in the figure, the flip-flop circuit 1 has a load MISFET M3 as a depletion type MISFET.
SFET, and by making the load MISFET M1 an enhancement type MISFET, the gate voltage of the drive MISFET M2 reaches its threshold voltage first when the power is turned on, so this MISF
It is stabilized so that ETM2 turns on first.

Further, as another example, the same operation as described above can be performed by making the threshold voltage of the driving MISFET M2 smaller than that of the MISFET M4.

However, in the conventional rear system where a clear signal is automatically or manually generated as described above and this clear signal is directly supplied to the memory circuit to be cleared when the power is turned on, the signal is not supplied. The problem is that the wiring becomes complicated and that the number of circuit elements is relatively large (gate circuits NO1 and NO2 are required).

Therefore, the inventors of the present invention considered using the PLA method to simplify wiring and the like when setting initial values for auto-clear operations in electronic desktop calculators and the like.

Therefore, it is an object of the present invention to simplify the initial value setting circuit in an information processing apparatus that is system-controlled by the PLA method.

Hereinafter, the present invention will be specifically explained with reference to the drawings along with examples.

FIG. 1 is a circuit diagram showing an example of a main part when the present invention is applied to an auto-clear operation of an electronic desktop calculator.

As shown in the figure, the present invention provides an output Q of a flip-flop circuit 1 having a configuration similar to that of FIG.
6 to the other digits F4 to F1□8 of the address register 2 except for the lower two digits.

This allows the initial value of the upper six digits of address register 2 to be fixed.

If these digits F4 to F1□8 are fixed to 1'', the lower two digits F1. Since the value of F2 stabilized at power-on is uncertain, the address designated by address register 2 is one of addresses 252 to 255.

Therefore, until the clear signal is released, these 252 to 2
By repeatedly specifying address 55 and installing a program for clearing a predetermined memory circuit at these addresses, the contents of the predetermined memory circuit can be cleared.

This clearing operation is performed by the following operation.

For example, when clearing all the stored contents of the X register 5 to 0'', the address register 2 specifies address 252, and the output R1 of the fixed memory circuit (ROM) 3 into which this address information is input is set to This is done by applying the voltage to the gate circuit AG1 forming the feedback loop of the register 5 and breaking this feedback loop.

Further, regarding the flip-flop 6, the address register 2 designates address 253 in the same manner as above, thereby deriving the output μ0 of the fixed memory circuit 3, and applying this output μ0 to the reset input H of the flip-flop F. .

In addition, regarding the X register 4 whose output is sent to the display device, only the lowest digit is displayed as 0, and the other digits are 12
, the AND gate A is input from the fixed memory circuit 3 at address 254 specified by the address register
While obtaining an output signal R2 that opens G4, a control signal is sent to an adder (not shown), which forms 12 pieces of information, and this information is passed through the gate circuit AG4 to other digits except the least significant digit. Information of 12 is set in all digits, and information of 0 is inputted from the adder for the lowest digit.

Thereafter, at address 255, other registers, such as the Z register, are cleared in the same manner as above.

Next, when the first pressed key force is applied to the reset force R of the flip-flop circuit 1 through the OR gate circuit OG7, the flip-flop circuit 1 is inverted and the clear signal is released.

When this clear signal is released, the address information designated by the fixed memory circuit 3 is input to the address register, so the program exits from the program loop of the clearing operation and the program address for predetermined system control is entered. Jump.

According to the present invention as described above, unlike in the past, a clear signal is not directly applied to the memory circuit, but instead a clear signal is used for system control using the PLA method. A signal line for supplying signals is unnecessary, and wiring can be simplified.

The flip-flop circuit 1 having the configuration as shown in FIG. 2 has a load MISFET M1. M
3 mutual or driving MISFET M1. It is only necessary to change the mutual characteristics of M4, and it does not include any other circuit elements such as capacitors that are difficult to integrate into a semiconductor integrated circuit.

Therefore, the entire circuit of the embodiment of FIG. 1 can be easily constructed as a one-chip semiconductor integrated circuit.

The present invention is not limited to the above-mentioned embodiments, and can take various other embodiments.

For example, the number of program steps and address for clearing the memory circuit may be set arbitrarily depending on the system.

Moreover, it goes without saying that the present invention may be configured to set an initial value in accordance with the requirements of the system, such as in the case of setting the initial value of the X register, in addition to the auto-clear operation.

INDUSTRIAL APPLICABILITY The present invention can be widely used as an initial value setting method in information processing devices such as electronic desktop calculators that are system-controlled using the PLA method.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an example of the main part of the present invention, and FIG. 2 is a circuit diagram for explaining an auto-clear circuit according to an earlier application of the applicant of the present invention. 1...Flip-flop circuit, 2...
Address register, 3...Fixed memory circuit, 4.
...X register, 5...X register, 6
...Flip-flop circuit.

Claims (1)

[Claims] 1 a fixed memory circuit that stores a program for information processing; an address register that receives the next program step information output from the fixed memory circuit and outputs the program step information to the fixed memory circuit; In an initial value setting method for an information processing device including program information output from a memory circuit (and a plurality of memory circuits controlled thereby), a pair of driving insulated gate field effect transistors whose gates and drains are cross-connected; A pair of load means connected to the drain of the driving insulated gate field effect transistor is included, and the characteristics of the pair of load means or the pair of driving insulated gate field effect transistors are different from each other. a flip-flop circuit that stabilizes in one state and outputs a signal at a predetermined level when the power is turned on; a circuit that changes the flip-flop circuit to the other state after the power is turned on; and a circuit that receives the signal at the predetermined level from the flip-flop circuit. By using a gate circuit that forcibly sets a predetermined bit of the address register to a predetermined level, the contents of the plurality of storage circuits are read from the address register by a signal of the predetermined level that is input to the gate circuit. An initial value setting method for an information processing device, characterized in that program step information to be used as an initial value is output.