JPS5815805B2 - integrated circuit device - Google Patents

Description

[Detailed description of the invention] The present invention relates to a large-scale integrated circuit device.

As the scale of integrated circuits increases, power consumption and heat dissipation have become important issues.

To address this problem, several methods are available in current integrated circuit technology.

In memory, when it comes to 4 to 16 bits, power consumption can be kept below IW by adopting dynamic circuit technology, and the memory can be housed in an ordinary ceramic package.

Static memory of 1 to 4 bits uses circuit technology such as lowering the power supply voltage and increasing the impedance of the memory cell compared to dynamic memory to keep power consumption to about IW. is the current situation.

In terms of power consumption, it is difficult to take measures for integrated circuits for logic operations.

Such an element is generally called a random logic circuit, and although it may have a memory section as a part thereof, the function and configuration of the circuit are complicated.

This makes it difficult to adopt the circuit technology used in memory, and is often ineffective at the cost of introducing considerable circuit waste.

For this reason, in current random logic circuits with about 3000 gates, the power consumption is low even when using a low power supply voltage.
There are many things that exceed W.

Increased power consumption in integrated circuits often causes problems in a variety of ways.

Even if we ignore problems that occur on the power supply side, an increase in power consumption within an integrated circuit will lead to an increase in the temperature of the semiconductor chip, and changes in device characteristics (in particular, changes in speed due to a decrease in the mobility characteristic of semiconductors). (e.g. decrease), but also cause a decrease in reliability.

Let us consider an MO8 structure microprocessor as one of the most typical large-scale integrated circuits.

In such circuits, dynamic circuits are difficult to use due to their function and circuit configuration.

When using dynamic circuits, (1) extra wires must be installed to transmit several phases of clock signals, and (2) devices such as microprocessors can be activated for a short period of time. (3) In dynamic circuits, it is necessary to transmit clock signals to parts that are not operating, which results in wasted energy being supplied. In order to do this, an extra circuit must be provided, but this circuit has the disadvantage that it occupies a fairly large proportion in the case of random logic.

Therefore, the effects of dynamic circuit technology are not as apparent in random logic as they are in memory.

Complementary MO8 (CMOS Com
It is conceivable to use a complementary MOS).

The characteristics of CMOS inverters are that P, N
Either one of both channel elements is turned off, and no current flows between the power supply terminal and ground.

In order to transmit the signal to the next stage, current flows to charge and discharge the load capacitor in the next stage, and the circuit consumes the minimum amount of current necessary to transmit the signal.

Therefore, when a microprocessor is configured with such a CMO8 circuit, even if a certain moment is captured, there is no energy consumption in the non-operating parts, and power consumption is limited to the necessary minimum even in the operating parts, so the power consumption is reduced. This is an ideal circuit configuration.

However, despite these characteristics, the reality is that CMOs
The limited use of the CMO8 circuit is due to other drawbacks of the CMO8 circuit.

In other words, (1) the manufacturing process becomes complicated because both P and N channel elements must be made; (2) P and N channel elements must be made;
In order to isolate both channel elements, it is necessary to provide a large distance between them, which hinders the increase in the degree of integration.Due to two manufacturing problems, the characteristics of the circuit configuration have not been adjusted. However, CMOS is limited to integrated circuits for low power consumption.

This invention was made in view of the above points, and is an integrated circuit that effectively reduces power consumption without reducing operating speed, especially when circuits such as random logic are integrated on a large scale. It provides equipment.

That is, the present invention provides an integrated circuit device that receives a coded signal from the outside, decodes the signal, and performs logical operation processing on the data. It is equipped with a decoder that has the function of classifying part or all of the parts, and (b) controls the power supply current of the circuit parts that do not operate based on the decoding result, thereby reducing power consumption. ) A feature of the present invention is that it includes a means for shortening the time required for a non-operating circuit section whose power supply current is cut off or reduced to return to an operating state, thereby preventing a decrease in operating speed due to power supply control.

First, a detailed explanation of this invention will be given.

FIG. 1 shows a block diagram of an example of a microprocessor.

A simple case in which this element functions is explained as follows.

A signal on an internal address bus 1 is taken out through a buffer 2, and data corresponding to the address is taken in from, for example, an external memory onto an internal data bus 4 through a data buffer 3.

If this data is an instruction, it is placed in the instruction register 5.

The command part of this instruction is decoded by a decoder 6, and various operations are performed inside the microprocessor.

For example, it may lead the data stored in the temporary register and accumulator 8 to the logic operation unit 9 to perform logical or arithmetic operations, or it may retrieve data from the internal memory 10, or it may be used to retrieve data from the internal memory 10.
Data may be transferred between the internal data bus 4 and the external data bus through the external data bus.

By decoding the instructions stored in the instruction register 5 in this way, it is determined which part of the microprocessor must be operated.

Generally, in the case of a microprocessor, the parts where the circuit must operate by decoding instructions are often limited to only a few parts.

That is, in the microprocessor shown in FIG. 1, the circuit parts that operate instantaneously are often limited to only a few (although they change from moment to moment).

Therefore, with the exception of storage blocks such as register memory, the non-operating parts have no effect even if the power is turned off (or even if the current is prevented from flowing in some way).

That is, by decoding the instructions entered into the instruction register 5, the power is turned off to the circuits that do not operate, and the power is supplied only to the necessary parts that operate.

In the next instruction, a new power cutoff section and a power supply section are determined.

By doing so, it becomes possible to considerably save power consumption.

As for the memory part, you cannot turn off the power just because it is not being used at that time.

Since this part is used to hold data, there is no way to turn off the power and let the data volatilize.

However, even for this part, by deciphering the instructions, reading from the memory part at this time,
Alternatively, if it is determined that no data will be written to the memory section, the power consumption of the entire circuit can be reduced by lowering the power supply voltage of the memory section and supplying the minimum amount of energy necessary just to save the data. can be lowered.

Specific means for realizing these will be explained below.

The microprocessor receives instructions from external memory and places them in the instruction register 5.

At that time, the operation of the microprocessor is not only decoded by the decoder 6 as usual, but also by providing another decoder.
The decoder decodes which circuit block operates.

On the other hand, as shown in FIG. 2, the inside of the microprocessor is divided in advance into circuit blocks A and B and a memory section M, and a switch S1. S2. S3
Set it up.

If it is determined that only the circuit block B operates, the circuit block B is connected to the power supply line VDD by closing the switch S2, as shown in FIG.

The unused circuit block A is disconnected from the power supply line VDD by opening the switch S1.

For the circuit of the memory section M where data must not be volatile, the 5.power supply line VDD for operation is switched to the 3.power supply line VDD' for data storage only.

By doing so, the power consumption of the circuit block A can be eliminated and the power consumption of the memory section M can be reduced.

This same operation is performed by switch S1 as shown in FIG. S
This can also be done by replacing 2 with the zero power line VSS side.

These switches S1. S2 is each circuit block A.

It is often better to place it on the side where the impedance of B is lower.

The switches shown in FIGS. 2 and 3 can be made using transistors used in integrated circuits, but in order to reduce the on-state impedance, it is necessary to use large transistors.

When cutting off and turning on the power supply current for each circuit block as shown in FIGS. 2 and 3, one of the things that must be taken care of is the following.

As shown in FIG. 4, circuit block A. Particularly if circuit block B shares at least one signal line and the input impedance of circuit block A seen from that signal line is small, the adverse effects of circuit block A that is interrupted while circuit block B is in operation will cause the signal You have to be careful not to step out on the line.

For this purpose, circuit blocks A and B are also required for the signal line IJC.
Switches 81' and 82' are provided to separate or connect the
′ should be opened.

Figure 2 shows the case where circuit block B operates, but in the next step, when the instructions are decoded, circuit block B does not operate but circuit block A and memory section M operate, as shown in Figure 5. show.

In this case, if the node voltage within the circuit block A has dropped to zero potential in the situation shown in FIG. 2, the circuit block A cannot operate until the normal state is restored after the power supply is connected.

If circuit block A takes a long time to recover,
This will reduce the speed of the microprocessor accordingly.

Accordingly, the present invention includes means for shortening the time it takes for a non-operating circuit portion to return to an operating state.

FIG. 6 shows an example of this. As shown in FIG. 6, each block A, B, and M has small impedance transistors Q1A and Q when on with respect to the power supply line VDD.
It is connected to t B and Qt M via a high impedance transistor Q2 A t Q2 B t Q2 M.

When circuit block A operates, current is supplied through low impedance element QrA (at this time, high impedance element Q2A may be in the on state), and when circuit block A does not operate, low impedance element Q1A is turned off. state, high impedance element Q2
Turn on A.

That is, during non-operation, the power supply current is limited by a high impedance element, and during operation, current is supplied from a low impedance element.

By doing so, it is possible to reduce the power consumption of the circuit and shorten the time required for the circuit block to recover from the non-operating state to the operating state.

Although FIG. 6 shows a case where two elements are used for power supply current control, the same function can be achieved with one element.

Figure 7 shows another embodiment, in which a high voltage is applied to the control line of the transistor connecting the power line and the circuit block when the circuit block is in operation to reduce the impedance of the transistor, and the circuit block is inactive. Sometimes, a low voltage is applied to the control line to make the impedance high.

According to the embodiments described above, by controlling the power supply current for each circuit block in the integrated circuit depending on its operation and non-operation, it is possible to reduce the power consumption of the integrated circuit element, and at the same time to reduce the power consumption of the integrated circuit element. It is possible to prevent a decrease in operating speed due to power supply current control.

In order to fully utilize the effects of the present invention, it is desirable to arrange the circuits in the integrated circuit in blocks so that they can be easily turned on, turned off, or increased or decreased in addition to normal operation.

Further, some other embodiments of the present invention will be described. (1) The connection between the power supply line and the circuit block does not have to be made only by the elements controlled by the control line, as shown in FIG. 7, for example.

For example, as shown in FIG. 8, MOS transistor T1. T
When a certain circuit block consisting of 2... is connected to a power supply line, it is classified into lines connected to high input impedance (in this example, the gate) and lines connected to low input impedance. As shown in FIG. 9, a power supply current control element is inserted only between the low input impedance location and the power supply line.

The power supply line connected to a place with high input impedance has a small supply current and low power consumption, so when the power supply current is turned on,
There is less need to turn it off or increase or decrease it.

In this way, by constantly connecting the power supply line to the gate, it is possible to reduce the charging/discharging current of the gate capacitance due to changes in the power supply current, thereby shortening the time required for the circuit to return to the operating state.

(2) When each element is formed on a common substrate as in a normal MO8 integrated circuit, and the impedance of the element changes greatly depending on the potential of other electrodes with respect to the substrate, the power supply current control element is It is often better to insert it on the zero power line side as shown in the figure.

This is because in the case shown in Figure 3, the elements in each circuit board are kept in a low impedance state because the power supply voltage is applied to them, and the power supply voltage control elements are in the on state. This is because the time it takes for the circuit to recover is shortened.

(3) It takes time for a circuit block whose power supply current has been cut off or controlled to be low to recover (recovery), so in order to prevent this from reducing the speed of the integrated circuit as a whole, It would be better to improve the system as well.

For example, in the case shown in FIG. 1, the instruction register 5 is divided into a plurality of parts.

For example, as shown in FIG.
t52.

53 is provided.

Assume that the instruction currently being executed by the microprocessor is in register 5□.

It is assumed that the next instruction to be executed is stored in the register 52, and the next instruction to be executed is stored in the register 53.

Since the instruction in register 5□ is currently being executed, power supply current should be supplied to the circuit blocks necessary for this.

The next instruction to be executed is stored in the register 5□, and by decoding the instruction, it is possible to determine which circuit block should be newly supplied with power supply current in order to execute this instruction.

By performing this work while the instructions stored in the instruction register 5□ are being executed, the recovery time of the circuit block can be effectively shortened.

However, it goes without saying that the power supply current of the circuit functions necessary for executing the current instruction by register 51 cannot be cut off just because it is unnecessary for executing the instruction stored in instruction register 52. It is.

To cut off the power supply current of the circuit block, use command register 5□~
Looking at the instructions stored in the instruction register 53, the circuit that is unnecessary for executing the instruction stored in the instruction register 52 and 53, but necessary for executing the instruction stored in the instruction register 51 The block must be executed upon execution of the instructions stored in instruction register 52.

If the recovery time of a circuit block is long, it is better to increase the number of instruction registers and comprehensively judge instructions over long steps to turn on/off or increase/decrease the power supply current.

As explained above, according to the present invention, in a large-scale logic operation integrated circuit, the power supply current can be controlled according to its operating mode, and at the same time, the time required for returning a non-operating circuit portion to an operating state can be shortened. By taking this into consideration, it becomes possible to effectively reduce power consumption while maintaining high-speed operation as a whole.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing a schematic configuration of a microprocessor for explaining the present invention in detail, FIGS. FIG. 6 is a diagram for explaining one embodiment of the present invention, and FIGS. 7 to 10 are diagrams for explaining other embodiments.

Claims (1)

[Claims] 1. In an integrated circuit device that receives encoded signals from the outside, decodes the signals, and performs logical operation processing on the data, the receiver removes some or all of the circuit parts that do not operate in response to the input signals. A decoder with a classification function is provided, and a means is provided for controlling the power supply current of some or all of the circuit parts that are not in operation based on the decoding result, and shortening the time it takes for the circuit parts that are in the non-operation state to return to the operation state. An integrated circuit device comprising: