JPS58156207A - 自動利得制御回路 - Google Patents
自動利得制御回路Info
- Publication number
- JPS58156207A JPS58156207A JP3874282A JP3874282A JPS58156207A JP S58156207 A JPS58156207 A JP S58156207A JP 3874282 A JP3874282 A JP 3874282A JP 3874282 A JP3874282 A JP 3874282A JP S58156207 A JPS58156207 A JP S58156207A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- gain
- automatic
- gain control
- loop filter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
- H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
- H04L27/38—Demodulator circuits; Receiver circuits
- H04L27/3809—Amplitude regulation arrangements
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
- H04L25/03006—Arrangements for removing intersymbol interference
- H04L25/03012—Arrangements for removing intersymbol interference operating in the time domain
- H04L25/03019—Arrangements for removing intersymbol interference operating in the time domain adaptive, i.e. capable of adjustment during data reception
- H04L25/03038—Arrangements for removing intersymbol interference operating in the time domain adaptive, i.e. capable of adjustment during data reception with a non-recursive structure
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Power Engineering (AREA)
- Control Of Amplification And Gain Control (AREA)
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3874282A JPS58156207A (ja) | 1982-03-11 | 1982-03-11 | 自動利得制御回路 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3874282A JPS58156207A (ja) | 1982-03-11 | 1982-03-11 | 自動利得制御回路 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS58156207A true JPS58156207A (ja) | 1983-09-17 |
JPS644698B2 JPS644698B2 (enrdf_load_stackoverflow) | 1989-01-26 |
Family
ID=12533762
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3874282A Granted JPS58156207A (ja) | 1982-03-11 | 1982-03-11 | 自動利得制御回路 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58156207A (enrdf_load_stackoverflow) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2688367A1 (fr) * | 1993-03-01 | 1993-09-10 | Alcatel Nv | Commande de gain automatique dans un recepteur radioelectrique comportant un circuit d'egaliseur temporel. |
EP0554120A3 (enrdf_load_stackoverflow) * | 1992-01-31 | 1994-01-19 | Fujitsu Ltd | |
WO1996014700A3 (en) * | 1994-11-08 | 1996-07-25 | Zenith Electronics Corp | AGC circuit for a digital receiver |
-
1982
- 1982-03-11 JP JP3874282A patent/JPS58156207A/ja active Granted
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0554120A3 (enrdf_load_stackoverflow) * | 1992-01-31 | 1994-01-19 | Fujitsu Ltd | |
US5598433A (en) * | 1992-01-31 | 1997-01-28 | Fujitsu Limited | Automatic equalizer and data mode convergence method |
FR2688367A1 (fr) * | 1993-03-01 | 1993-09-10 | Alcatel Nv | Commande de gain automatique dans un recepteur radioelectrique comportant un circuit d'egaliseur temporel. |
WO1996014700A3 (en) * | 1994-11-08 | 1996-07-25 | Zenith Electronics Corp | AGC circuit for a digital receiver |
Also Published As
Publication number | Publication date |
---|---|
JPS644698B2 (enrdf_load_stackoverflow) | 1989-01-26 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP0609828B1 (en) | Adaptive matched filter | |
US5093847A (en) | Adaptive phase lock loop | |
US5008903A (en) | Adaptive transmit pre-emphasis for digital modem computed from noise spectrum | |
US4458355A (en) | Adaptive phase lock loop | |
US4718073A (en) | Demodulator for facsimile equipment | |
US20090137212A1 (en) | Non-Linear Signal Distortion Detection Using Multiple Signal to Noise Ratio Measurement Sources | |
EP0482927B1 (en) | Digital radio receiver | |
EP0512712A2 (en) | Equaliser, operable in decision-feedback or fractional modes | |
US4953186A (en) | Phase jitter tracker | |
US6148046A (en) | Blind automatic gain control system for receivers and modems | |
US5153527A (en) | Demodulation apparatus having reception state evaluation | |
US3434056A (en) | Distortion monitoring by comparing square and cubic law distortion to carrier | |
JPH025343B2 (enrdf_load_stackoverflow) | ||
JPS58156207A (ja) | 自動利得制御回路 | |
US5598434A (en) | Automatic equalizer with a branched input for improved accuracy | |
EP0316842B1 (en) | Phase control device | |
US20010016015A1 (en) | Transmission apparatus and method of signal-point generation | |
JP3141591B2 (ja) | 自動等化器 | |
JPH08317012A (ja) | ディジタル復調器 | |
US6947099B2 (en) | Automatic chroma control circuit with controlled saturation reduction | |
JPH06216955A (ja) | バースト信号用agc回路 | |
JP2861778B2 (ja) | 復調装置 | |
JP3205111B2 (ja) | 変復調装置 | |
JPH01194614A (ja) | 自動等化器 | |
KR100275703B1 (ko) | 위상 추적 회로 및 위상 검출방법 |