JPS5815297A - Printed circuit board - Google Patents

Printed circuit board

Info

Publication number
JPS5815297A
JPS5815297A JP11399581A JP11399581A JPS5815297A JP S5815297 A JPS5815297 A JP S5815297A JP 11399581 A JP11399581 A JP 11399581A JP 11399581 A JP11399581 A JP 11399581A JP S5815297 A JPS5815297 A JP S5815297A
Authority
JP
Japan
Prior art keywords
terminal
width
terminal electrodes
solder
electrodes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11399581A
Other languages
Japanese (ja)
Inventor
大濱 泰造
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP11399581A priority Critical patent/JPS5815297A/en
Publication of JPS5815297A publication Critical patent/JPS5815297A/en
Pending legal-status Critical Current

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  • Combinations Of Printed Boards (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 本発明は互いに端子部で半田接合される印刷配線板に関
し、端子電極間の短絡を発生させずに接合強度を高める
ことを目的とするものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to printed wiring boards that are soldered to each other at their terminal portions, and an object of the present invention is to increase the bonding strength without causing short circuits between terminal electrodes.

まず第1図ないし第3図は従来例を示して説明する。第
1図、第2図は互いに接合されるべき印刷配線板1,2
の平面図で、3.4はそれぞれ配線の箔である。5.6
はそれぞれの端子部でありて、この端子部には上記の箔
3,4より幅広に形成された複数の箔7.8が端子電極
列として構成されている。この端子電極は幅がそれぞれ
aで、互いの間隔はbC図ではa>b)となりている。
First, FIGS. 1 to 3 will explain a conventional example. Figures 1 and 2 show printed wiring boards 1 and 2 to be joined to each other.
In the plan view, 3 and 4 are wiring foils, respectively. 5.6
are respective terminal portions, in which a plurality of foils 7.8 having a width wider than the foils 3 and 4 described above are configured as a terminal electrode array. Each of these terminal electrodes has a width of a, and the distance between them is a>b in Figure bC.

なお9は位置合わせのための基準穴である。Note that 9 is a reference hole for alignment.

上記の端子部6,6を基準穴9をもとにして対向すべく
位置合わせし、半田を介在させて端子電極7,8を熱圧
着によ多接合する。その断面を第3図(7)に、さらに
要部拡大図を同図(イ)に示す。いま熱圧着すれば、溶
融した半田10が矢印F1゜F2方向に力を受けて広が
ろうとするので、前記端子電極間隔すが小さければ半田
1oが隣りの端子電極に触れて固着し、すなわち短絡が
発生する。
The terminal portions 6, 6 are aligned to face each other based on the reference hole 9, and the terminal electrodes 7, 8 are bonded by thermocompression bonding with solder interposed. Its cross section is shown in FIG. 3 (7), and an enlarged view of the main part is shown in FIG. 3 (A). If we do thermocompression bonding now, the molten solder 10 will receive force in the directions of arrows F1 and F2 and try to spread, so if the terminal electrode spacing is small, the solder 10 will touch and stick to the adjacent terminal electrode, which will cause a short circuit. occurs.

ここで端子電極列全体の幅は、実装密度の向上のために
は小さい方がよい。したかりて限られた電極列幅の中で
上記の短絡という問題点に鑑みて端子電極間隔すを広げ
ようとすると、端子成極幅aが小さくなり、互すの接合
強度が弱ぐなりて断線が発生するという欠点がありた。
Here, the width of the entire terminal electrode array is preferably smaller in order to improve packaging density. Therefore, if an attempt is made to widen the terminal electrode spacing within the limited electrode array width in view of the short circuit problem described above, the terminal polarization width a becomes smaller and the mutual bonding strength becomes weaker. There was a drawback that wire breakage occurred.

本発明は上記従来の欠点を解消するものであり、接合強
度を低下させることなく短絡を防止した印刷配線板を提
供するものである。
The present invention solves the above-mentioned conventional drawbacks, and provides a printed wiring board that prevents short circuits without reducing bonding strength.

本発明の一実施例を第4図ないし第6図に示しべき印刷
配線板11.12の平面図で、それぞれ複数の配線の箔
13.14が設けられている。
An embodiment of the invention is illustrated in FIGS. 4 to 6 in plan view of a printed wiring board 11.12, each provided with a plurality of wiring foils 13.14.

16.16は端子部で、この上面には複数の端子電極列
が形成されている。この端子電極列において、両端の端
子電極t7a、t7b、taa、 1abは幅がCと大
きく、それらの内側のA子電極19.20は幅をeとな
し、互いの電極間隔をdまたはfとしている。ここで本
実施例の電極間隔は従来のものよシ広ぐ、すなわちd>
b、d>fである。なお21は位置決めのための基準穴
である。
Reference numeral 16.16 denotes a terminal portion, and a plurality of terminal electrode rows are formed on the upper surface of this terminal portion. In this terminal electrode row, the terminal electrodes t7a, t7b, taa, and 1ab at both ends have a large width C, and the A electrodes 19 and 20 inside these have a width e, and the electrode spacing between them is d or f. There is. Here, the electrode spacing of this embodiment is wider than that of the conventional one, that is, d>
b, d>f. Note that 21 is a reference hole for positioning.

上記の構成において内側の端子電極19.20の幅eは
、従来例の電極幅Cより小さいものである。したがりて
上記実施例の端子部15.16を基準穴21をもとにし
て対向すべく位置合わせし、半田を介在させて端子電極
17aと1sa、17bとtab、19と20を熱圧着
により接合すると、第6図の断面図に示すように、電極
間隔が広いために半田22が隣の電極にプリクジを起こ
すことがなく、短絡の発生を防止することができる。−
なりているが、両端の端子電極17a、17b、18a
In the above configuration, the width e of the inner terminal electrodes 19 and 20 is smaller than the electrode width C of the conventional example. Therefore, the terminal parts 15 and 16 of the above embodiment are aligned to face each other based on the reference hole 21, and the terminal electrodes 17a and 1sa, 17b and tab, and 19 and 20 are bonded by thermocompression with solder interposed. When bonded, as shown in the cross-sectional view of FIG. 6, since the electrode spacing is wide, the solder 22 does not cause prisms on adjacent electrodes, and short circuits can be prevented. −
However, the terminal electrodes 17a, 17b, 18a at both ends
.

18bの幅は十分に広いため、接合′後の強度を十分に
保つことが可能である0すなわち、端子電極列全幅を変
えることなく、接合後の半田による短絡を防止しかつ接
合強度を持たすことが可能である0 以上の実施例から明らかなように本発明によれば、互い
に半田によシ接合される基板の端子部に、両最外側の端
子電極の幅を犬となし、それ以外の内側の端子電極の幅
を小となした印刷配線の端子電極列を設けたことにより
、接合したとき半田による端子電極間の短絡を発生する
ことがなく、また同時に接合後の強度も十分持たせるこ
とができるなど優れた特徴を有する印刷配線板を提供で
きるものである。
Since the width of 18b is sufficiently wide, it is possible to maintain sufficient strength after bonding. In other words, it is possible to prevent short circuits due to solder after bonding and maintain bonding strength without changing the overall width of the terminal electrode array. 0 As is clear from the above embodiments, according to the present invention, the width of both outermost terminal electrodes is set as a dog, and the width of the other terminal electrodes is set as a dog in the terminal portions of the boards that are bonded to each other by soldering. By providing a printed wiring terminal electrode row with a small inner terminal electrode width, there is no short circuit between the terminal electrodes due to solder when they are bonded, and at the same time, it has sufficient strength after bonding. This makes it possible to provide a printed wiring board with excellent features such as the ability to

【図面の簡単な説明】[Brief explanation of the drawing]

第1図、第2図は従来の印刷配線板の要部上面図、第3
図(7)は同接合部の断面図、@)はその拡大断面図、
第4図、第6図は本発明の一実施例を示す要部上面図、
第6図はその接合部の断面図である0 11.12・・・・・・基板、13,14・・・−・・
箔、16、 16 ・=−・一端子部、17a、j7b
、18a。 18b・・・・・・両端の端子電極、19.20・・・
・・・端子電極、22・・・・・・半田。 代理人の氏名 弁理士 中 尾 敏 男 ほか1名第1
図 第4図 403
Figures 1 and 2 are top views of the main parts of a conventional printed wiring board;
Figure (7) is a cross-sectional view of the joint, @) is an enlarged cross-sectional view,
4 and 6 are top views of essential parts showing one embodiment of the present invention,
Figure 6 is a cross-sectional view of the joint part.
Foil, 16, 16 ・=-・One terminal part, 17a, j7b
, 18a. 18b...Terminal electrodes at both ends, 19.20...
...Terminal electrode, 22...Solder. Name of agent: Patent attorney Toshio Nakao and 1 other person 1st
Figure 4 403

Claims (1)

【特許請求の範囲】[Claims] 互いに半田によ多接合されるそれぞれの基板の端子部に
複数の端子電極を設け、前記複数の端子電極のうち両最
外側の端子電極の幅を大となし、それ以外の内側の端子
電極の幅を小となしたことを特徴とする印刷配線板。
A plurality of terminal electrodes are provided on the terminal portions of the respective substrates that are to be connected to each other by solder, and among the plurality of terminal electrodes, both the outermost terminal electrodes are made wide, and the width of the other inner terminal electrodes is made large. A printed wiring board characterized by its small width.
JP11399581A 1981-07-20 1981-07-20 Printed circuit board Pending JPS5815297A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11399581A JPS5815297A (en) 1981-07-20 1981-07-20 Printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11399581A JPS5815297A (en) 1981-07-20 1981-07-20 Printed circuit board

Publications (1)

Publication Number Publication Date
JPS5815297A true JPS5815297A (en) 1983-01-28

Family

ID=14626414

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11399581A Pending JPS5815297A (en) 1981-07-20 1981-07-20 Printed circuit board

Country Status (1)

Country Link
JP (1) JPS5815297A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6236569U (en) * 1985-08-22 1987-03-04
JPH05145209A (en) * 1991-11-22 1993-06-11 Sharp Corp Connection structure of terminal

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6236569U (en) * 1985-08-22 1987-03-04
JPH05145209A (en) * 1991-11-22 1993-06-11 Sharp Corp Connection structure of terminal

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