JPS58151622A - Microprocessor - Google Patents

Microprocessor

Info

Publication number
JPS58151622A
JPS58151622A JP57034716A JP3471682A JPS58151622A JP S58151622 A JPS58151622 A JP S58151622A JP 57034716 A JP57034716 A JP 57034716A JP 3471682 A JP3471682 A JP 3471682A JP S58151622 A JPS58151622 A JP S58151622A
Authority
JP
Japan
Prior art keywords
circuit
clock signal
frequency
signal
inputted
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57034716A
Other languages
Japanese (ja)
Other versions
JPH0522249B2 (en
Inventor
Joji Murakami
村上 丈示
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP57034716A priority Critical patent/JPS58151622A/en
Publication of JPS58151622A publication Critical patent/JPS58151622A/en
Publication of JPH0522249B2 publication Critical patent/JPH0522249B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04Generating or distributing clock signals or signals derived directly therefrom

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Microcomputers (AREA)

Abstract

PURPOSE:To obtain a microprocessor device which does not generate a problem of external radiation, by multiplying a clock signal applied from the outside of a package, and operating it as an operation clock signal. CONSTITUTION:An output of a crystal oscillating circuit 1 is inputted to a package through a wire 8, and also is inputted to a frequency multiplying circuit 5 through an amplifying circuit 2 and a buffer circuit 3. Oscillation frequency of the circuit 1 is, for instance, 0.5MHz, it is 4-multiplied by the circuit 5, and a clock signal of 2MHz is formed. An output signal 6 raised to necessary frequency by the circuit 5 is inputted to a CPU7, and is used as a clock signal. According to this system, a signal loaded on the wire 8 has comparatively low frequency, and its external radiation quantity is small, but to the CPU7, a clock of necessary frequency is supplied. As for the part operated by low frequency, and input signal 4 of the circuit 5 is inputted directly to the CPU7.

Description

【発明の詳細な説明】 (a)発明の技術分野 本発明はマイクロプロセッサとそのクロック信号に関す
るもので、特に、高周波信号を取り扱う装置内に設けら
れた場合にも、クロック信号の外部輻射による障害発生
のないマイクロプロセッサに関するものである。
DETAILED DESCRIPTION OF THE INVENTION (a) Technical Field of the Invention The present invention relates to a microprocessor and its clock signal. In particular, even when installed in a device that handles high-frequency signals, interference caused by external radiation of the clock signal can be avoided. It concerns a microprocessor without generation.

(b)技術の背景 マイクロプロセッサ技術の進歩は近年著しく、多くの分
野の機器装置にマイクロプロセッサを内蔵さセ、その機
能を高めることが行われている。
(b) Background of the Technology Microprocessor technology has made remarkable progress in recent years, and devices in many fields are now incorporating microprocessors to improve their functionality.

例えばテレビ受像器の画像信号処理装置にも、制御用の
マイクロプロセッサが内蔵されることがあるが、このよ
うな高周波信号を扱う装置では、マイクロプロセッサを
作動さセる為のクロック信号が外部に輻射し、装置本来
の処理機能を妨害することがある。即ち、前記テレビ受
像器の場合には画面にちらつきを生ずるのであるが、そ
れだけでなく、輻射量によってはFCC規格等の各種規
格に不合格となる場合さえある。
For example, the image signal processing device of a television receiver may also have a built-in microprocessor for control, but in devices that handle such high-frequency signals, the clock signal to operate the microprocessor is externally transmitted. It may radiate and interfere with the device's original processing functions. That is, in the case of the television receiver, flickering occurs on the screen, and depending on the amount of radiation, it may even fail various standards such as FCC standards.

クロック信号の外部輻射は、プリント基板に設けられた
水晶発振装置とプロセッサのパッケージの間を接続する
配線がアンテナの働きをしζ生ずるもので、該配線が長
い程強く、また発振周波数が高い程強い。
External radiation of the clock signal is caused by the wiring that connects the crystal oscillator on the printed circuit board and the processor package, which acts as an antenna.The longer the wiring is, the stronger it is, and the higher the oscillation frequency, the stronger the strong.

(c)従来技術と問題点 前記クロック信号による障害は、クロック信号を低くす
るほど軽減するが、当然マイクロプロセッサの動作速度
も低下し、テレビ受像に於ける画像信号処理のように実
時間処理を行う場合、その機能を果し得ないことになる
(c) Prior art and problems The interference caused by the clock signal is reduced as the clock signal is lowered, but the operating speed of the microprocessor also decreases, making it difficult to perform real-time processing such as image signal processing in television reception. If you do so, you will not be able to fulfill that function.

その為、現在は要求される機能を果し得る程度に高速の
マイクロプロセッサを使用し、外部輻射の問題は、シャ
ーシ等の外部シールドにより、或いは配線を極力短くす
ることによってそれを抑え込む、等の方法が採用されて
いるが、シャーシのコストが上がるばかりでなく、テス
ト装置に於ける評価か、実製品に当て嵌まらない場合に
は、シャーシ設計やプリント板設計を変更しなζJれば
ならない等の問題が生ずる。
Therefore, currently we use microprocessors that are fast enough to perform the required functions, and the problem of external radiation is suppressed by using external shields such as the chassis or by keeping the wiring as short as possible. This method not only increases the cost of the chassis, but also requires changes to the chassis design and printed circuit board design if the evaluation using test equipment does not apply to the actual product. Problems such as this arise.

(d)発明の目的 本発明の目的は上記事情に鑑み、より高いクロック信号
で作動し、しかも外部輻射の問題を生じないマイクロプ
ロセッサ装置を提供することである。
(d) Object of the Invention In view of the above circumstances, an object of the present invention is to provide a microprocessor device that operates with a higher clock signal and does not cause the problem of external radiation.

(e)発明の構成 上記目的を達成する為、本発明のマイクロプロセッサ装
置は、外部より与えられるクロック信号を逓倍する回路
を有し、該逓倍回路の出力信号をクロック信号として動
作するように構成される。
(e) Structure of the Invention In order to achieve the above object, the microprocessor device of the present invention has a circuit that multiplies an externally applied clock signal, and is configured to operate using the output signal of the multiplier circuit as a clock signal. be done.

(f)発明の実施例 第1図に本発明のマイクロプロセッサ装置の構成を示す
(f) Embodiment of the Invention FIG. 1 shows the configuration of a microprocessor device of the invention.

水晶発振回路1の出力は、図示の如く配線8を通じてパ
ッケージに入力され、更に増幅回路2及びバッファ回路
3を経て周波数逓倍回路5に人力される。水晶発振回路
1の発振周波数は例えば0゜5 M Hzで、これが周
波数逓倍回路5によって4逓倍され、2MHzのクロッ
ク信号が形成される。
The output of the crystal oscillator circuit 1 is input to the package through a wiring 8 as shown in the figure, and is then input to a frequency multiplier circuit 5 via an amplifier circuit 2 and a buffer circuit 3. The oscillation frequency of the crystal oscillation circuit 1 is, for example, 0.degree. 5 MHz, which is multiplied by 4 by the frequency multiplier 5 to form a 2 MHz clock signal.

周波数逓倍回路5によって必要な周波数に高められた出
力信号6はCPU7に入力され、クロック信号として使
用される。このような方式を採れば、配線8に乗る信号
は比較的低い周波数であり、外部輻射量は僅かであるが
、CPU7には必要とする周波数のクロック信号が供給
されることになる。
The output signal 6 increased to the required frequency by the frequency multiplier 5 is input to the CPU 7 and used as a clock signal. If such a system is adopted, the signal on the wiring 8 has a relatively low frequency and the amount of external radiation is small, but the CPU 7 is supplied with a clock signal of the required frequency.

なお、CPU7が、CPUだけでなくROM。Note that the CPU 7 is not only a CPU but also a ROM.

RAM等を含むものであってもよいことは、当業者には
容易に理解されるであろう。また、低い周波数で動作す
る部分には逓倍回路5の入力信号も信号4としてCPU
に油接入力することは言うまでもない。
Those skilled in the art will readily understand that it may also include a RAM or the like. In addition, the input signal of the multiplier circuit 5 is also sent to the CPU as a signal 4 in the part that operates at a low frequency.
It goes without saying that oil must be input into the system.

第2図(a)に、前記周波数逓倍回路5をエツジ検出回
路によって構成した例を、(b)にそのタイムチャート
を示す。同図(a)のIN、OU1゛及びA乃至Eの各
点における波形が同図(b)に同し記号を付して示され
ている。かがる周波数逓倍回路では入力INが0点にお
いて2逓倍され、これがさらに2逓倍され、入力INが
4逓倍されている。
FIG. 2(a) shows an example in which the frequency multiplier circuit 5 is constituted by an edge detection circuit, and FIG. 2(b) shows its time chart. The waveforms at each point IN, OU1'' and A to E in FIG. 12(a) are shown with the same symbols in FIG. 2(b). In the frequency multiplier circuit, the input IN is multiplied by two at the 0 point, this is further multiplied by two, and the input IN is multiplied by four.

(g)発明の詳細 な説明した本発明のマイクロプロセッサは、パッケージ
外部では比較的低い周波数のクロック信号を使用するの
で、他の装置に影響を及ぼすことが少なく、パッケージ
内では十分に高い周波数のクロック信号が用いられるの
で必要な処理速度を得ることができる。
(g) Detailed description of the invention The microprocessor of the present invention uses a relatively low frequency clock signal outside the package, so it has little effect on other devices, and a sufficiently high frequency clock signal inside the package. Since a clock signal is used, the necessary processing speed can be obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明のマイクロプロセッサの構成を示す図、
第2図は該マイクロプロセッサに内蔵される周波数逓倍
回路の一例を示す図である。 図において1は水晶発振回路、2は増幅回路、3はバッ
ファ回路、5は周波数逓倍回路、6は周波数逓倍回路の
出力信号であるクロック信号、7はCPU、8は外部ク
ロック信号の配線である。
FIG. 1 is a diagram showing the configuration of a microprocessor according to the present invention;
FIG. 2 is a diagram showing an example of a frequency multiplier circuit built into the microprocessor. In the figure, 1 is a crystal oscillation circuit, 2 is an amplifier circuit, 3 is a buffer circuit, 5 is a frequency multiplication circuit, 6 is a clock signal which is the output signal of the frequency multiplication circuit, 7 is a CPU, and 8 is wiring for an external clock signal. .

Claims (1)

【特許請求の範囲】[Claims] パッケージの外部より与えられるクロック信号を逓倍す
る回路を有し、該逓倍回路の出力信号を動作クロック信
号として動作することを特徴とするマイクロプロセッサ
A microprocessor comprising a circuit that multiplies a clock signal applied from outside the package, and operates using an output signal of the multiplier circuit as an operating clock signal.
JP57034716A 1982-03-05 1982-03-05 Microprocessor Granted JPS58151622A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57034716A JPS58151622A (en) 1982-03-05 1982-03-05 Microprocessor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57034716A JPS58151622A (en) 1982-03-05 1982-03-05 Microprocessor

Publications (2)

Publication Number Publication Date
JPS58151622A true JPS58151622A (en) 1983-09-08
JPH0522249B2 JPH0522249B2 (en) 1993-03-29

Family

ID=12422056

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57034716A Granted JPS58151622A (en) 1982-03-05 1982-03-05 Microprocessor

Country Status (1)

Country Link
JP (1) JPS58151622A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0162870A1 (en) * 1983-11-07 1985-12-04 Motorola Inc Synthesized clock microcomputer with power saving.
JPS6246361A (en) * 1985-08-23 1987-02-28 Hitachi Ltd Data processor
JPS63268020A (en) * 1987-04-27 1988-11-04 Hitachi Ltd Apparatus and system for information processing

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5537121A (en) * 1978-09-05 1980-03-15 Mitsubishi Chem Ind Ltd Preparation of dehydrotestosterone
JPS5580136A (en) * 1978-12-14 1980-06-17 Fujitsu Ltd Clock signal distribution system
JPS58134356A (en) * 1982-02-05 1983-08-10 Toshiba Corp Integrated circuit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5537121A (en) * 1978-09-05 1980-03-15 Mitsubishi Chem Ind Ltd Preparation of dehydrotestosterone
JPS5580136A (en) * 1978-12-14 1980-06-17 Fujitsu Ltd Clock signal distribution system
JPS58134356A (en) * 1982-02-05 1983-08-10 Toshiba Corp Integrated circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0162870A1 (en) * 1983-11-07 1985-12-04 Motorola Inc Synthesized clock microcomputer with power saving.
JPS6246361A (en) * 1985-08-23 1987-02-28 Hitachi Ltd Data processor
JPS63268020A (en) * 1987-04-27 1988-11-04 Hitachi Ltd Apparatus and system for information processing

Also Published As

Publication number Publication date
JPH0522249B2 (en) 1993-03-29

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