KR960000105Y1 - Frequency synthesizer in radio telephone - Google Patents
Frequency synthesizer in radio telephone Download PDFInfo
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- KR960000105Y1 KR960000105Y1 KR2019910000352U KR910000352U KR960000105Y1 KR 960000105 Y1 KR960000105 Y1 KR 960000105Y1 KR 2019910000352 U KR2019910000352 U KR 2019910000352U KR 910000352 U KR910000352 U KR 910000352U KR 960000105 Y1 KR960000105 Y1 KR 960000105Y1
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- pll
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
- H04B1/40—Circuits
Abstract
내용 없음.No content.
Description
제 1 도는 본 고안의 블록구성도1 is a block diagram of the present invention
제 2 도는 종래의 송, 수신 주파수 합성장치의 블록구성도2 is a block diagram of a conventional transmission and reception frequency synthesizer
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
가 : 수신용PLL 주파수 합성회로부A: Frequency PLL for Receiving PLL
나 : 송신용PLL 주파수 합성회로부B: PLL frequency synthesis circuit part for transmission
다 : 주파수 혼합부 1 : 듀플렉서(Duplexer)C: Frequency Mixer 1: Duplexer
2 : 밴드패스필터 3 : 프리앰프2: band pass filter 3: preamplifier
4 : 밴드패스필터 5 : 제 1 혼합기4: band pass filter 5: first mixer
6 : 중간주파앰프 7 : 제 2 혼합기6 intermediate frequency amplifier 7 second mixer
8 : 복조기 9 : 수정발진기8 demodulator 9 crystal oscillator
10 : 버퍼 11 : 수신용 전압제어 발진기10 buffer 11 receiving voltage controlled oscillator
12 : 저역필터 13 : PLL IC12: low pass filter 13: PLL IC
14 : 피드백 앰프 15 : 기준발진기14: feedback amplifier 15: reference oscillator
16 : 서브전압 제어발진기 17 : 저역필터16: sub-voltage controlled oscillator 17: low pass filter
18 : PLL IC 19 : 피드백 앰프18: PLL IC 19: Feedback Amplifier
20,21 : 버퍼 22 : 제 3 혼합기20,21: buffer 22: third mixer
23 : 버퍼 24 : 대출력앰프23: buffer 24: large output amplifier
25 : 밴드패스필터25: band pass filter
본 고안은 900MHZ 대 주파수를 갖는 무선전화기에서의 송, 수신 주파수 합성회로에 관한 것으로 특히 고정된 낮은 주파수(103.1125MHZ)를 합성한후 제1로우컬 신호와의 합 또는 차신호로 변환한 신호를 송신신호로 사용함으로써 제품코스트를 절감할 수 있도록한 것이다.The present invention relates to a synthesis circuit for transmitting and receiving frequencies in a radiotelephone having a frequency of 900 MHz, and in particular, a fixed low frequency (103.1125 MHz) synthesized and then converted into a sum or difference signal with the first local signal. The product cost can be reduced by using it as a transmission signal.
종래의 송, 수신 주파수 합성장치는 제 2 도에서와 같이 안테나(ANT)를 통해 수신되는 신호(하한주파수 대역 : 914.0125-914.9875 MHZ, 상한주파수 대역 : 959.0125-959.9875 MHZ)는 듀플렉서(31) 및 밴드패스필터(32)를 거쳐 프리앰프(33)에서 적절히 증폭된 후 밴드패스필터(34)를 거쳐 제 1 혼합기(35)에 가해진다.In the conventional transmitting and receiving frequency synthesizing apparatus, the signal received through the antenna ANT (lower limit frequency band: 914.0125-914.9875 MHZ, upper limit frequency band: 959.0125-959.9875 MHZ) is the duplexer 31 and the band as shown in FIG. After being properly amplified by the preamplifier 33 via the pass filter 32, it is applied to the first mixer 35 via the band pass filter 34.
이때 제 1 혼합기(35)에는 수신용 PLL 주파수 합성회로부(A)로부터 발생된 제1로우컬 신호가 버퍼(40)를 통해 가해지게 된다.At this time, the first mixer 35 is applied to the first local signal generated from the receiving PLL frequency synthesizing circuit unit A through the buffer 40.
이와같이 제 1 혼합기(35)에 가해진 두 신호를 혼합하여 그의 출력단에 나타나는 신호중 45 MHZ 주파수를 갖는 신호를 중간주파앰프(36)를 거쳐 증폭시키고 이어서 제 2 혼합기(37)를 통해 455 MHZ 주파수를 갖는 신호를 출력하여 복조기(38)에 가해지게 된다.Thus, two signals applied to the first mixer 35 are mixed to amplify a signal having a frequency of 45 MHZ among the signals appearing at the output terminal thereof through the intermediate frequency amplifier 36 and then having a frequency of 455 MHZ through the second mixer 37. The signal is output and applied to the demodulator 38.
이때 제 2 혼합기(37)의 일측입력단에 가해지는 제 2 로우컬 신호는 57.6575 MHZ 발진주파수를 갖는 수정발진기(39)로부터 생성된다.In this case, the second low-frequency signal applied to one input terminal of the second mixer 37 is generated from the crystal oscillator 39 having the 57.6575 MHZ oscillation frequency.
한편 송신신호(하한주파수 대역 : 959.0125-959.9875 MHZ, 상한주파수 대역 : 914.0125-914.9875 MHZ)는 송신용 전압 제어 발진기(46), 로우패스필터(47), PLL IC(48) 및 피드백앰프(49)로 구성된 전용인 송신용PLL 주파수 합성회로부(8)로부터 발생되고 버퍼(50), 대출력앰프(51), 밴드패스필터(52) 및 듀플렉서(31)를 거쳐 안테나(ANT)로 복사되며, 이때 수신용 및 송신용 PLL 주파수 합성회로부(A), (B)의 기준발전 주파수는 기준발전기(45)로부터의 12.8 MHZ 주파수가 공통으로 가해진다.On the other hand, the transmission signal (lower limit frequency band: 959.0125-959.9875 MHZ, upper limit frequency band: 914.0125-914.9875 MHZ) includes a voltage controlled oscillator 46 for transmission, a low pass filter 47, a PLL IC 48, and a feedback amplifier 49. It is generated from a dedicated transmission PLL frequency synthesizing circuit section 8 composed of: and is copied to an antenna ANT via a buffer 50, a large output amplifier 51, a band pass filter 52, and a duplexer 31. The reference generation frequencies of the reception and transmission PLL frequency synthesizing circuit sections A and B are commonly applied by the 12.8 MHZ frequency from the reference generator 45.
그러나 이와같은 종래의 장치는 고가인 송, 수신용 PLL 주파수 합성회로부를 각각 독립적으로 구비해야만 하므로 이로인해 장치의 코스트가 상승되는 문제점이 있었다.However, such a conventional apparatus has to independently provide expensive PLL frequency synthesizing circuit sections, thereby increasing the cost of the apparatus.
본 고안은 이러한 종래의 문제점을 감안하여 이루어진 것으로서, 종래의 경우와 같이 고가인 전용의 송신용 PLL 주파수 합성회로부를 설치하지 않고 고정된 낮은 주파수를 합성한 후 제 1 로우컬 신호와의 합 또는 차 신호로 변환시킨 신호를 송신신호로 사용할 수 있도록 하여 제품 코스트의 절감을 도모할 수 있도록 함을 목적으로 한 것으로, 이하 본 고안을 첨부된 도면에 의하여 상세히 설명하면 다음과 같다.The present invention has been made in view of the above-mentioned conventional problems, and the sum or difference with the first low-frequency signal after synthesizing a fixed low frequency without installing an expensive dedicated transmission PLL frequency synthesizing circuit part as in the conventional case In order to reduce the product cost by using the signal converted into a signal as a transmission signal, the present invention will be described in detail below with reference to the accompanying drawings.
본 고안은 제 1 도에서와 같이 안테나(ANT)를 통해 수신되는 신호(914-959 MHZ)가 듀플렉서(1), 밴드패스필터(2) 및 프리앰프(3)를 거쳐 적절히 증폭된 후 밴드패스필터(4)를 거친 신호와 수신용 PLL 주파수 합성회로부(가)로부터 가해지는 소정의 제1로우컬 신호(58.1125 MHZ)와를 제 1 혼합기(5)를 통해 혼합한 후 중간주파앰프(6)를 통한 신호와 수정발진기(9)로부터의 소정의 발진주파수(57.6575 MHZ)를 갖는 신호와를 제 2 혼합기(7)를 통해 혼합한 후 복조기(8)에 가해주는 수신계와, 송신용 PLL 주파수 합성회로부(나)로부터 발생되는 송신신호는 버퍼(23), 대출력앰프(24), 밴드패스필터(25) 및 듀플렉서(1)를 거쳐 안테나(ANT)로 복사되는 송신계가 구비된 것에 있어서,According to the present invention, the signal 914-959 MHZ received through the antenna ANT is properly amplified through the duplexer 1, the bandpass filter 2 and the preamplifier 3, as shown in FIG. After mixing the signal passed through the filter (4) and the predetermined first local signal (58.1125 MHZ) applied from the receiving PLL frequency synthesizing circuit section (1) through the first mixer (5), the intermediate frequency amplifier (6) is And a PLL frequency combination for transmitting and receiving a signal having a predetermined oscillation frequency (57.6575 MHZ) from the crystal oscillator 9 through the second mixer 7 and then applying the demodulator 8 to the demodulator 8. The transmission signal generated from the circuit section (b) is provided with a transmission system which is copied to the antenna ANT via the buffer 23, the large output amplifier 24, the band pass filter 25 and the duplexer 1,
상기 송신용 PLL 주파수 합성회로부(나)가 서브전압제어 발진기(16), 저역필터(17), PLL IC(18) 및 피드백앰프(19)로 이루어지는 동시에 상기 수신용 PLL 주파수 합성회로부(가)로부터의 수신신호를 적절히 증폭하는 버퍼(21)와, 상기 송신용 PLL 주파수 합성회로부(나)로부터의 송신신호를 적절히 증폭하는 버퍼(20)와, 상기 버퍼(20),(21)의 출력을 혼합하는 제 3 혼합기(22)로 이루어진 주파수 혼합부(다)를 상기 버퍼(23)의 입력단에 개재하여서 된 것이다.The transmitting PLL frequency synthesizing circuit section (b) comprises a sub-voltage controlled oscillator (16), a low pass filter (17), a PLL IC (18) and a feedback amplifier (19). A buffer 21 for properly amplifying the received signal of the signal, a buffer 20 for properly amplifying the transmission signal from the transmission PLL frequency synthesizing circuit section (b), and an output of the buffers 20, 21. The frequency mixing section (C) consisting of the third mixer 22 is provided at the input terminal of the buffer 23.
미설명부호 15는 기준발진 주파수(11.3 MHZ)를 생성하는 기준 발진기이다.Reference numeral 15 is a reference oscillator that generates a reference oscillation frequency (11.3 MHZ).
이와같이 구성된 본 고안의 작용효과를 설명하면 다음과 같다.Referring to the effect of the present invention configured as described above are as follows.
본 고안에서 수신계의 구성은 제 2 도와 동일하므로 이에 대한 설명은 생략하며, 다만 수신용 PLL 주파수 합성회로부(가)로부터 발생되는 제 1 로우컬 신호(하한주파수 대역 : 855.9-856.875 MHZ, 상한주파수 대역 : 1017.125-1018.1 MHZ)와 밴드패스필터(4)로부터 출력되는 신호를 제 1 혼합기(5)를 통해 혼합하여 58.1125 MHZ주파수를 갖는 신호를 중간주파앰프(6)의 입력단에 가해주는 점이 상이하다.In the present invention, since the configuration of the receiving system is the same as that of the second diagram, the description thereof will be omitted. However, the first low-frequency signal (lower limit frequency band: 855.9-856.875 MHZ, upper limit frequency) generated from the receiving PLL frequency synthesis circuit unit Band: 1017.125-1018.1 MHZ) and the signal output from the band pass filter 4 is mixed through the first mixer 5 to apply a signal having a frequency of 58.1125 MHZ to the input terminal of the intermediate frequency amplifier (6) .
한편 송신신호는 고정주파수를 발생시키는 송신용 PLL 주파수 합성회로부(나)로부터의 출력을 버퍼(20)를 통해 낮은 주파수(103.1125 MHZ)를 갖는 신호를 출력하고, 이 신호와 수신용 PLL 주파수 합성회로부(가)로부터 출력되는 수신신호를 버퍼(21)를 통해 적절히 증폭시킨 신호와를 제 3 혼합기(22)에서 혼합시키게 된다.On the other hand, the transmission signal outputs a signal having a low frequency (103.1125 MHZ) through the buffer 20 through the output from the transmission PLL frequency synthesis circuit section (b) generating a fixed frequency, and this signal and the reception PLL frequency synthesis circuit section. In the third mixer 22, the received signal output from (a) is properly amplified through the buffer 21.
이 경우에 하한 주파수 대역에서는 제 1 로우컬 주파수와 상기 낮은 주파수(103.1125 MHZ)의 합을 이용하고, 상한 주파수 대역에서는 제 1 로우컬 주파수와 낮은 주파수의 차를 이용한 신호를 버퍼(23), 대출력앰프(24)및 밴드패스필터(25)를 거쳐 증폭 및 필터링 시킨후 듀플렉서(1)와 안테나(ANT)를 통해 복사 시키게 된다.In this case, a signal using the sum of the first low frequency and the low frequency (103.1125 MHZ) in the lower limit frequency band and the difference between the first low frequency and the low frequency in the upper limit frequency band is used as a buffer (23). After the amplification and filtering through the output amplifier 24 and the band pass filter 25 is copied through the duplexer 1 and the antenna (ANT).
그리고 본 고안에서 수신용 PLL 주파수 합성회로부(가)와 송신용 PLL 주파수 합성회로부(나)에 기준발진 주파수를 가해주는 기준발진기(15)의 주파수는 11.3 MHZ 이다.In the present invention, the frequency of the reference oscillator 15 which applies the reference oscillation frequency to the receiving PLL frequency synthesizing circuit unit (A) and the transmitting PLL frequency synthesizing circuit unit (B) is 11.3 MHZ.
이상에서와 같이 본 고안에 의하면 송신신호 발생을 위하여 종래 경우와 같이 독립적으로 고가인 송신전용 프로그래머를 PLL 주파수 합성회로를 사용하지 않고 고정된 낮은 주파수(103.1125 MHZ)를 합성하여 제 1 로우컬 신호와의 합 또는 차 신호로 변환할 수 있는 주파수 혼합부를 채용함으로써 제품 코스트 절감을 꾀할 수 있는 실용적인 고안인 것이다.As described above, according to the present invention, a transmission-only programmer, which is independently expensive as in the conventional case, synthesizes a fixed low frequency (103.1125 MHZ) without using a PLL frequency synthesizing circuit to generate a transmission signal. It is a practical design that can reduce the product cost by adopting a frequency mixing section that can be converted into a sum or difference signal.
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KR2019910000352U KR960000105Y1 (en) | 1991-01-12 | 1991-01-12 | Frequency synthesizer in radio telephone |
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KR2019910000352U KR960000105Y1 (en) | 1991-01-12 | 1991-01-12 | Frequency synthesizer in radio telephone |
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KR960000105Y1 true KR960000105Y1 (en) | 1996-01-04 |
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