JPS58144928A - Controlling system of power supply - Google Patents

Abstract

PURPOSE:To simplify the structure and driving system of a power supply controlling system and to simplify the constitution of a power supply circuit, by using a memory element, a relay or a semiconductor switch element which is not normal self-support type and a control circuit. CONSTITUTION:When a switch C is turned on, a reset pulse generating circuit 5 generates a reset pulse E by the output voltage F of a power supply 4 of the control part. A control circuit 2 starts its operation when the pulse E changes to a high level from a low level after the voltage F is applied. In this case, a power supply 9 of a part B to be controlled is controlled by a power supply switch 7, and the control signal G is applied from the circuit 2. The self-supporting action is carried out through the circuit 2 and a memory element 3 which is held by a device 3'. The circuit 2 is reset to its initial state by the pulse E when the electric power H is applied and after the power H of the input side of the switch 7 is cut off. Thus the switch 7 is kept at a state set before the power H is cut off.

Description

[Detailed description of the invention] This invention relates to a universal power supply control system.

When self-holding the power supply in various systems,
Conventionally, self-protection was used to open and close the power supply 41? I used a boring relay. There are various types of self-holding relays, but for example,
It is as shown in the figure. That is, 51 is self ff
This is an l holding type relay, and when the off signal 53 is applied from the lIl# circuit 52, the drive lIE! An on-pulse 55 tpb is applied to the relay 51 by the 1 circuit 54 to turn the relay 51t-on, and even when the 11III# signal 53 disappears, the relay 51 maintains the off-state Il. Further, when the off signal 56 is applied from the control circuit 52, the off bus 58 is applied to the relay 51 by the 121 circuit 57, turning the relay 51 off, and even if the control signal 58 disappears, the uV-51 remains in the off state 0. Perform a holding motion. As a result, even if the input voltage is interrupted and then reapplied, the control signal 21 is sent to the relay 51.
Without sending a signal, relay 51 will maintain its previous state.

However, when this self-holding type relay is used, the structure becomes complicated, the driving method becomes complicated, and it is difficult to replace the operation with a semiconductor switching element (try switch, thyristor, transistor, etc.). There was a drawback.

Therefore, it is an object of the present invention to simplify the structure and drive system, and to improve the system by simplifying the structure and driving method. ! It is an object of the present invention to provide a universal power supply control system that can simplify I-circuits.

In other words, the present invention performs the self-holding operation of opening and closing the power supply without using a self-holding relay, but by using a memory element that holds the power supply and a normal self-holding type slanted relay (hereinafter simply referred to as a relay) or It is composed of a semiconductor switch element and a control 1111 circuit.

Embodiments of this invention are shown in FIGS. 1 to 5. First, the reason for ml is that there is a control part A in the system that performs various controls by inputting remote control signals and operation switches, and a controlled part B that is controlled by control part A from control part A. This is what is shown. In the figure, 1 is a remote control (remote control) signal receiving section, 2 is a -1- circuit, 3 is a memory that holds a power supply, 3
' is a device for maintaining the power supply of the memory 3, 4 is a control power supply, 5 is a reset pulse generation circuit, 6 is an operation switch, 7 is a [#A switch, 8 is a controlled lj times circuit 9 is a breakdown Discount
C in the main power supply circuit is a tm switch which is May 7, and when this is in the on state I, this system operates. Let us consider the case where the current control circuit 2 controls #9 of the controlled section B. When the switch C is turned off, the output voltage F of the 1m4 subway streetcar becomes as shown in Fig. 2 1al, and the output voltage F causes the reset pulse generation circuit 5 to output af'lf, which is somewhat delayed from n+2. Figure 2 (bl
A reset pulse E is generated as follows. The control circuit 2 starts operating from the initial state (2) when the reset pulse E changes from the low level V to the high level V after the voltage F is applied. At this time, the electric current fA9 of the control bell section B is controlled by the power supply switch 7, and the +1a signal G for controlling the switch II7 is applied from the control circuit 2. Self-holding of switch 7! One operation is performed by the control circuit 2 and the memory 3 held by the fM113', and is now performed by the switch C.
is in the OFF state, and a signal G is sent from the control 1 circuit 2 to turn the power switch 7T ON or OFF by means of the remote control signal or the operation switch 6, and the electric power summer is being controlled. If the power H on the input side of the switch 7 is interrupted by the switch C or some other factor, then when the power H is applied, the control circuit 2 returns to its initial state by the pulse E, and the power supply is switched on and off. The state of the device 7 is maintained in the state (2) before the power H was cut off.

The details are shown in Figures 3 to 5, and the switch 7
is constituted by a relay 7' or a semiconductor switch element, and is driven by a motor and t-drive circuit 12, and its control signal G' is sent from a control circuit 2. Further, the operation of the memory 3 in which power is maintained is controlled by the control circuit 2 by the fg signal N, and performs operations such as medium address manual input, Ill data reading, (flash) data input, and QVI data writing. That is, Iiii the above t1+ sends address data to the address register 13 by the signal NK, and specifies a certain address in the memory element 14. The (Ill) reads the contents of the specified address into the data register 15 and sends it to the signal N. At this time, the 1-digit N may be a separate signal from the internal signal N. , signal N
Data is input to the data register 15 by. The QVI Vi writes the contents of the data register 15 to the specified address of the memory element 14. Here, one address 1P# of the memory 3 is used as a power supply memory.

Therefore, llf'li of the control circuit will be explained using Figure @6.

Let us now consider the case where the voltage F is applied to the control circuit 2 and it is operating normally. At this time, the operation passes through the main V-chin processing step 29 of the fifth step, where various operations
In response to this, issue number Nf1 was issued.

Of these, the processing related to the power switch 7 is extracted from the sixth section. This is the seventh process. In the sixth step, the switch 6 etc. In step 7, it is determined whether a command to turn on the relay 7' has been issued, and conversely, it is determined whether or not a command has been issued to turn off the relay 7'. When there is no command (that is, NO), the process returns to the fifth process of the l1fl era. If the relay 7' is currently in the off state and a signal to turn on the relay 7' is received from the switch 6 or the like, the process passes through the sixth pass and moves to the third process. In the third step 2, a signal G' for turning on the relay 7' is outputted, and a signal M is thereby outputted for driving the drive circuit 12 to keep the relay 7' off. Thereafter, in the fourth step, the address data Ip# is input to the memory 3 by the signal N, and the VctfIA on/off state is inputted. Then, write the data of [lii ono-shaped Il# to address 2 of memory 3. Next, the process returns to the main V-chin processing step 5, which performs controls other than power supply conditions.

In this state, the power H on the input side of the control unit 2 in FIG.
Consider a case where power H is cut off and power H is applied again.

First, electric power H is applied, a voltage F is generated, and a reset bar A/xE is generated, and when the control section 2 returns to its initial state, the process starts from 8gl shown in FIG. At this time, the signal G' is always in an off state. In the first process, address data 'P' is sent to memory 3 by signal N.
'J-manual operation and further read the data at address 1P'. In the second process, P determines whether the extracted data is in the power-off state or the power-off state is utl-, and the power-on state is Q.
If (YES), proceed to the third step, and as explained above, perform the fourth step 6 to turn on the relay 7' and store the memory 3.
The data of 1 power-on state al# is written to the address 'P# of 1 and the main l-chin processing process begins. Therefore, when the power H is applied after the relay 7' is in the on state and the power H is interrupted, the state of the power supply immediately before the power H is cut off is read from the memory 3, and it indicates the on state lO1. By turning the relay 7' into the ON state 11 when the power H is on, the state immediately before the power H is interrupted can be maintained at-tm, and 1EIIfv similar to a self-holding type relay can be performed.

Next, relay 7' is in the on state and switch 6
Let us consider a case where a signal to turn off relay 7' can be sent by using the following method. At this time, from the main routine processing process, the process proceeds to the eighth process by the sixth process (NO) & the seventh process (YES), and the address data 'p' is sent to the memory 3 by the signal N.
Enter #. Further, the signal N inputs the data of the power source OFF state to the memory 3.

Then, the data in the power-off state is stored at address 1 of memory 3.
Write to Hi. In the ninth step, a signal G' for turning off the relay 7' is output, and the process returns to the main routine processing step.

In this situation, the power H of the control unit 2 is cut off,
Considering the case where the power is applied again, when the power H is applied again, the control section 2 becomes the initial state due to the reset bus EK and enters the first process.

At this time, the signal G' is in an OFF state. Similarly to the @ period, the data at address 1 bit of memory 3 is read in the 1st process, and the data read earlier in the 2nd process' is 1. If n, the main V-17 processing step of the fifth step is entered directly, and the relay 7' is maintained in the OFF state. Therefore relay 7
When ' is in the OFF state, even if the power H is cut off and applied again, the relay 7' remains off'.
It is possible to hold the mosquito net just before the power H is cut off.

As described above, the wffj control system of the present invention allows the swiping circuit to perform self-holding operation using the swiping circuit, the memory element holding the W source, and the control circuit. Friend, it is now possible to realize the same operation as a conventional self-holding relay using a semiconductor switch element, which also simplifies the circuit, reduces costs, and even enables the use of semiconductors. Since the memory element holding the address information is used, there is no need for an address erasing process, which simplifies the control process.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of one embodiment of this invention, Fig. 2 is a 2,000-yard time taken during the initial setup of the control circuit, Fig. 3 is a detailed block diagram of the main part, and Fig. 4 is a detailed block diagram of the memory. 5 is a flowchart, and FIG. 6 is a block diagram of a conventional example. DESCRIPTION OF SYMBOLS 1... Remote control receiver (operation signal), 2... Control path, 3... Memory element, 6... Operation switch (operation signal), 7... Power switch, 7'...・Relay (switching circuit), 8...Rupture - Circuit No. 2, Figure 2

Claims (1)

[Scope of Claims] <11 A switching circuit that controls opening and closing of the power supply of both controlled circuits, and a control circuit that outputs an on signal or an off signal to the switching circuit according to an operation signal, and A power supply control method in which the output state of a signal or an off signal is always written to a memory element that holds a power supply, and is read from this memory or element to a control circuit to cause the switching circuit to perform a self-holding operation. (2) One 11th address of the memory element holding the 1ift power supply is used as a power state memory representing the output state, and when the control circuit starts operating from its initial state, the power supply state memory is used to store the power supply state from the power state memory. A first step of reading the state data, a second step of determining whether the power state data is a power on state or a power off state, and when the power state data is a power on state, the on signal is read out. a third step of outputting to the switching circuit; a fourth step of writing tm on state data into the power state memory; a fifth step of controlling other than power state I;
: A sixth step of determining whether the control is to set the power state g to the OFF state based on the signal;
Seventh step to determine whether the system (goods) is classified as off-state
The power supply control method according to claim 1, wherein the fifth to seventh steps are processed when the control is not for changing the power state. (3) When the power is on, the 711th! In the eighth step, when it is determined that the control is to change the power state to the off state, an eighth step of writing fj off state state data to the power state memory, and outputting the off signal to the switching circuit. 9th step, and then processes the 5th to 7th steps (a power supply control system according to claim 21) +41. The control circuit is used as a memory for the output state I!It-representing !1tfA-like line, and when the control circuit starts operating from its initial state, it performs a first process of reading current data from the power supply state memory, and A second process in which the data in the state is added to indicate whether the power is on, haze or W power off, and a wg3 process in which a control other than power state 1 is performed when the data in the power state I is in the power off state. A process @4 in which it is determined whether the operation signal is used to control the W power source to be turned on; and a step 5 in which it is determined whether or not the operation signal is to be used to control the W power source to be turned on. The power supply control system according to claim (1), which has a process and processes the third to fifth processes in a case other than the control for changing the front distribution power state. 2 in the fourth step when the situation is off.
When it is determined that the control is to turn on the power supply terminal, a sixth step of outputting the on signal to the FJTJtE3 switching circuit and inputting 1f11 to the power supply state memory is performed.
14. The power supply control system according to claim 14, further comprising a seventh step of writing data of an ax shape, and then proceeding to the third step. 16) If the control circuit returns to the initial state 1 during the process of performing control other than the power state [I, the process of determining whether the power state is 0t-on state U or the control to turn off state, the control circuit returns to the initial state 1. In the first step, the power state 0 is extracted from the pre-distributed power state 1 memory, and in the second step, it is determined and the process moves to the next step according to each advantageous state, and the on state 1 or the off state Claim (2) @1
The power supply control method according to item 31, item 14) or item 15).